Semiconductor Equipment Applications Eng Jobs

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Data Science Engineer at Micron, you will employ techniques and theories drawn from areas of mathematics, statistics, semiconductor physics, materials science, and information technology to uncover patterns in data from which predictive models, actionable insights, and solutions can be developed. You will interact with experienced Data Scientists, Data Engineers, Business Areas Engineers, and UX teams to identify questions and issues for data analysis projects and improvement of existing tools. In this position, you will help develop software programs, algorithms and/or automated processes to cleanse, integrate, and evaluate large datasets from multiple disparate sources. There will be significant opportunities to perform exploratory and new solution development activities. Responsibilities include, but not limited to: Design, develop, and program methods, processes, and systems to consolidate and analyze unstructured, diverse “big data” sources to generate actionable insights and solutions for client services and product enhancement. Interact with product and service teams to identify questions and issues for data analysis and experiments. Develop and code software programs, algorithms, and automated proces

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description: For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming the ways people around the globe engage with information to improve life. We are looking for Layout Design engineer at our Micron Technology’s HBM Team in Guadalajara, Mexico. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Responsibilities: Design and development of analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Will bee leading planning, area/time estimation, scheduling, delegation and execution to meet project schedule/breakthroughs in multiple project environment. Effectively communicating with Global engineering teams to assure the success of layout project. Minimum Qualification: 5+ years of experience in analog/custom layout design in advanced CMOS process, in various

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Join our NAND Technology Integration (NTI) team as an experienced Electrical Failure Analysis Engineer , where you will be the go-to expert for diagnosing yield-limiting failures in next-generation NAND products. You will combine deep semiconductor expertise with bench testing, probe data analysis, and physical failure analysis to pinpoint failure mechanisms, accelerate yield learning, and deliver actionable insights that shape the technology development lifecycle. Key Responsibilities Lead electrical failure analysis — characterization, fault isolation, failure verification, and physical de-processing of semiconductor devices. Drive root cause analysis of yield-limiting failures by correlating electrical, inline, parametric, probe, and fab data. Pioneer new FA methodologies and de-processing techniques to improve detection accuracy and turnaround time. Apply data analytics to large-scale semiconductor datasets to surface failure signatures, trends, and anomalies. Deliver clear FA reports and visualizations that communicate findings to technical and executive audiences. Partner with Proc

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking an experienced and motivated System IP RTL Design Lead to drive the definition and implementation of complex datacenter class IP for our next-generation semiconductor products. The ideal candidate possesses a deep understanding of System IP and SoC architecture, IP integration challenges, and is adept at leading a design team to deliver high-quality, scalable IP solutions. This role requires strong hands-on technical leadership, excellent communication skills, and a proven track record in the successful delivery of silicon IP. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned IP / SoC design leader with 20+ yrs of strong expertise in complex SoC architectures, high-speed protocols, and large-scale IP integration. Skilled in RTL design and debug (Verilog/SystemVerilog) with hands-on experience using industry-standard tools for simulation, synthesis, lint, CDC, and power analysis on high-frequency designs. Experienced in driving microarchitecture decisions, authoring design specifications, and performing complex PPA trade-off optimizations. A proactive problem so

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks: Provide expert architectural, functional and process guidance on approach and capabilities. Collaborate with business stakeholders and internal technical partners to understand capability needs and to develop efficient solutions. Partner with architects to maintain a 3-year roadmap addressing capabilities to enable the department strategic plans. Develop and Manage a team of Software Engineers. Work within cross-functional teams to drive successful deployments. Act as the embodiment of the agile attitude; lead teams in iterative product development using lean principles and a quality-first approach to development Own your team performance and enable their career development. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit progra

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks Join our IE Modeling team at Micron and be a key player in driving our success in the semiconductor industry. You will give to daring projects that push technology and innovation boundaries. Apply industrial engineering concepts to model capacity thresholds, ensuring detailed support for both existing and future technologies. Lead capacity modeling projects, coordinating efforts across different departments and sites to achieve outstanding production metrics. Collaborate with site industrial engineering teams to continuously improve production capabilities and optimize capacity. Work closely with ATE and Satellite-Team to plan for future product capacity requirements and evaluate their impact on capital investments. Collaborate with ME, HR, and HVM-Planning teams to bridge the "Plan-To-Performance gap" (P2P gap) by providing comprehensive feedback and thoughtful planning. Capacity Modeling As part of the capacity modeling team, you will be responsible for developing extraordinary models to meet our fab output requirements. Your role will involve: Developing models that accurately reflect fab output capabilities, ensuring they meet the exacting requirements of our production goals. Understanding and facilitating the conversion process for future technology node tr

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. About the Role EnCharge AI is seeking a Senior NPU Architect to join our Architecture Team. In this role, you will collaborate with a team of NPU and system architects, hardware engineers, and software teams to define and optimize key features in our AI accelerator with the cutting-edge in-memory computing technology. You will contribute to designing a holistic AI HW/SW solution that has the best performance and efficiency on the market for the latest AI/ML workloads, such as LLMs, diffusion models, CNNs, and more. Responsibilities Define and develop the spec, architecture, and micro-architecture of key architecture modules (such as the in-memory compute unit, on-chip network, and memory orchestration units) based on the requirements of the workloads and software deployment flow Contribute to the modeling of aforementioned key architecture modules in our C++ simulation framework to ensure a functional implementation of the features Collaborate with the design verification team to deliver a strategy and infrastructure for the testing of the architecture features within said modules Work with the software team and other architects to analyze the performance and efficiency of the architecture modules for key workloads, identify performance bottlenecks, and guide architectural decisions Stay up to date with the latest trends and research in AI workloads, architectures, an

Salary Range: PLN 260,000-352,000 Subject to alignment to the responsibilities and duties of the role About Graphcore At Graphcore, we’re building the future of AI compute. We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale. As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem. To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world. We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence Job Summary We are looking for a senior engineer to design and evolve an application-level simulator for ML workloads that directly influences hardware and software architecture decisions. This role sits at the intersection of machine learning, systems, and hardware design. You will model real-world workloads, predict system behaviour, and provide insights that guide how our platform evolves. Success in this role requires not only strong technical depth, but also the ability to work closely with multiple teams to ensure the simulator reflects reality and drives meaningful decisions. The Team The Tenjin team focuses on building advanced simulation capabilities to model and predict the behaviour of large-scale ML workloads on next-generation hardware and software platforms. We operate at the intersection of machine learning, systems, and architecture, developing tools that enable data-driven decisions long before systems are fully built or deployed. Our work helps shape both hardware and software direction by providing early insights into performance, scalability, and efficiency. The team brings together engineers with backgrounds in simu

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Senior/Staff Global Facilities Engineer - Mechanical at Micron, you will have the opportunity to work on innovative projects that form the future of semiconductor technology. You will be in charge of providing excellent engineering services and support for the planning, development, construction, operation, and maintenance of critical facilities systems. This role highlights Global Standardization and Alignment, Innovation, Reliability and Performance, and Sustainability. Your duties encompass Semiconductor Mechanical and Process Systems like Cleanroom HVAC, Chilled Water, Heating Water, Makeup Air, Recirculation Air, Process Cooling Water, Process Exhaust, Compressed Air, Process Vacuum, General HVAC, Building, and Fire Protection systems, among others. Responsibilities: Serve as the technical domain expert, providing guidance and support to global, regional, and site facilities and manufacturing teams. Collaborate with internal teams (Technology Development, Procurement, Finance, Legal) to implement engineering solutions and drive innovation. Analyze system designs to improve performance, efficiency, and cost-effectiveness, and support problem-solving using standard methodologies. Benchmark engineering practices across Micron and the industry to maintain and evolve best-known methods (BKMs). Lead and support large-scale infrastructure design and construction projects, ensuring alignment with standards, codes, and regula

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. A thorough understanding of semiconductor device physics, process operation, DRAM product specification and product reliability. Responsibilities include but are not limited to the following: rdV, UE_Row, PG, PTS yield improvement Burn dpm and module dpm improvement DL4 enhancement and shift left to probe for coverage MRB case management and postmortem for CAPA enhancement Fab deviation event disposition and hold lot release Product grade yield improvement Wafer level reliability monitoring and shift left to probe for coverage RMA management and analysis for process/probe improvement Problem solving and root cause analysis skills including developing systemic and specific CAPAs for RMA Monitors and drives the quality metrics improvements including, module production fails and RMAs. Monitor Global quality dashboard and report reliability metric not meeting spec and performance Leads the analysis of multiple data sources and ensures appropriate feedback is given to customer Working in collaboration with multiple engineering groups including Process Module Area/RDA/Manufacturing to help identify existing containment action and work towards continuous improveme

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s DRAM Technology Development group, where engineers operate at the leading edge of semiconductor process and product innovation. This role sits at the intersection of process technology, product requirements, and manufacturing execution, and is critical to enabling next generation DRAM technology. As a Principal Node Development Product Engineer, you will play a technical role in driving product readiness through close engagement with process integration, device, yield, test, design, and manufacturing teams. You will own deep process‑aware product knowledge, identify node‑specific risks, and translate silicon behavior into actionable decisions that ensure robust, scalable next generation DRAM products. Responsibilities Serve as a technical contributor during development stage of next gen DRAM! Drive process‑aware product optimization, identifying sensitivities, interactions, and integration risks Analyze silicon data (electrical, parametric, yield, reliability) to identify systematic process or integration limiters Partner with design, process integration, test, and device teams to debug yield and performance issues and converge on root cause Collaborate closely with manufacturing and TD to enable smooth node readiness, learning cycles, and factory ramp Translate process changes into product impact assessments, including PPA, yield, reliability, and test coverage Guide test content and monitoring strategies to ensure early detection of process

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Senior Manager, Workforce Development at Micron is a pivotal role responsible for building, scaling, and sustaining a certified, production-ready, and future-capable workforce. This position offers an outstanding chance to lead and develop the workforce strategy for Micron Semiconductor India. It ensures our operations run flawlessly and our ramp-up goals are met with precise accuracy. Key Responsibilities Workforce Readiness & Ramp Execution Own the overall workforce readiness strategy aligned to Micron ramp plans and hiring roadmap. Ensure operators, technicians, and engineers are certified on time to support volume ramp with minimal learning loss. Translate ramp targets into weekly executable training and certification plans. Drive closure of WFD gaps impacting yield, efficiency, compliance, or safety. Training Program & Curriculum Ownership Define, maintain, and continuously improve role-based training curricula (MA, Technician, Engineer). Ensure inclusion of MES or equivalent experience, SAP, YMS, PR issuance, blocking issue resolution paths, and system differentiation (internal vs external issues). Standardize training modules, assessment methods, and certification criteria across Micron Semiconductor India site. Partner with engineering services, quality control, tech support, manufacturing, and EHS to validate the transfer of learning. Certification, Skills & Proficiency Framework B

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. As a Principal Engineer, you will be an integral part of our HIG HBM Team in Hyderabad, India, responsible for designing and developing complex Application-Specific Integrated Circuits to meet our product's specifications and requirements for High Bandwidth Memories, working for intensive applications such as artificial intelligence and high performance computing solution. Your expertise will contribute to the successful realization of pioneering semiconductor products, enabling our company to maintain its competitive edge in the industry. Role and Responsibilities Must have a solid understanding of die design . This includes knowledge of various die components, their functions, and how they interact within the overall tool. Familiarity with the principles of die design is essential to create effective and efficient layouts. Industry Involvement : You actively participate in standards committees, representing Micron and staying informed about industry developments. Leading Project Layout Team : You lead the establishment and growth of a layout team to meet Micron’s global HBM layout requirements. Technical Expertise :

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are looking for Layout Design engineer at our Micron Technology’s HBM Team in Hyderabad, India. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Role and Responsibilities • Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. • Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design • Perform layout verification like LVS/DRC/Antenna, quality check and documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. • Guide junior team-members in their execu

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are looking for Layout Design engineer at our Micron Technology’s HBM Team in Hyderabad, India. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Role and Responsibilities • Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. • Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design • Perform layout verification like LVS/DRC/Antenna, quality check and documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. • Guide junior team-members in their execu