Semiconductor Equipment Engineer Jobs

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Job Title: Staff/ Senior Staff Physical Design Engineer (Technical Lead) Experience: Staff 8-10 years Senior Staff 11-13 years Location: Bangalore Hybrid/Remote or Remote in India The Role We are seeking a high-impact Staff/ Senior Staff Physical Design Engineer to serve as a Technical Lead for our next-generation silicon products. This is a "player-coach" role designed for a versatile expert who is equally comfortable architecting a convergence strategy as they are mentoring a small team of engineers. You will own the physical delivery of a major sub-chip or complex block, pushing the absolute limits of PPA (Power, Performance, Area) . As a Staff/Senior Staff lead, you are expected to be the "anchor" of the project—assertive in your decision-making, highly analytical in your debugging, and adept at managing stakeholders to ensure we hit our tape-out milestones without compromise. Key Responsibilities Technical Leadership: Lead a small team of PD engineers, providing technical direction, workload management, and architectural oversight for a sub-chip or partition. SOC clocking , FEV/VCLP specialized skills are preferred. Complex Block/Sub-chip Ownership: Take personal hands-on ownership of the most critical, high-congestion, or timing-critical blocks in the desi

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Job Title: Senior Physical Design Engineer Experience: 4–7 Years Focus: Block-Level RTL-to-GDSII & PPA Optimization Location: Bangalore Hybrid The Role We are looking for a high-energy, technically curious Physical Design Engineer to join our advanced silicon team. This isn't a role for someone who wants to just "push buttons" on a vendor flow. We need a driver—someone with 4–6 years of experience who has lived through the trenches of quality tape-outs and is hungry to take full ownership of complex partitions. You will be expected to work with a high degree of independence, using your analytical skills to bridge the gap between a standard recipe and a world-class PPA result . You should be comfortable following expert lead direction while maintaining the "question the status-quo" mindset when you see a more efficient path. Key Responsibilities Partition Ownership: Lead the physical implementation of complex blocks from Synthesis and Floor-planning through to CTS, Routing, and Sign-off. PPA Recipe Development: Don't just run the flow—optimize it. You will perform deep-dive analysis on timing paths, power profiles, and congestion to derive custom optimization strategies. Automation-First Mindset: Use Tcl and Python to automate repetitive tasks, build custom analysis scripts, and enhan

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Job Title: Principal Physical Design Engineer (RTL-to-GDSII) Experience: 14+ Years Technology Focus: Sub-5nm (3nm/2nm) Location: Bangalore Hybrid The Vision We are seeking a Principal Physical Design Engineer who thrives on complexity and rejects the "black box" approach to EDA tools. This role is for a First Principles thinker who questions the status quo. If a standard flow isn't yielding the desired PPA (Power, Performance, Area), you dive into the PDK, the tool algorithms, and the methodology to find a better way. You are responsible for transforming raw RTL into world-class silicon by eliminating systemic bottlenecks and building a scalable, predictable path to GDSII. Key Responsibilities Full-Flow Ownership: Lead the implementation of massive, high-speed blocks/SoCs from Synthesis through Sign-off using the Cadence Digital Suite . PPA Optimization: Push the theoretical limits of the PDK and tools. You will analyze and optimize the interplay between library cells, metal stacks, and tool engines to squeeze out every millivolt and picosecond. Methodology & Scalability: Build and refine a "Push-Button" style execution methodology that is robust, repeatable, and minimizes manual "human-in-the-loop" iterations. Cross-Functional "Left-Shift": Collaborate with RTL, Architecture, and DFT te

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. About the Role EnCharge AI is seeking a highly skilled Device Driver Engineer to design and implement high-performance driver stack for our cutting-edge AI accelerator hardware. In this role, you will work closely with hardware, firmware, and AI software teams to develop low-latency, high-bandwidth communication between the host system and AI accelerator. Responsibilities Develop, optimize, and maintain Linux/Windows PCIe device drivers for AI accelerators. Implement low-level hardware interactions, DMA, memory management, and interrupt handling. Work on driver optimizations to reduce latency and improve throughput for AI workloads. Debug and troubleshoot PCIe protocol, kernel panics, crashes, and performance bottlenecks. Collaborate with hardware, firmware, and AI software teams to define driver interfaces. Ensure compliance with PCIe standards (Gen4/Gen5), SR-IOV, BAR memory mapping, and IOMMU. Support virtualization (VFIO, SR-IOV, DPUs) and containerized environments (Kubernetes, Docker, etc.). Develop tools for profiling, debugging, and monitoring driver performance. Contribute to open-source kernel modules if applicable. Qualifications Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or a related field. 3+ years of experience in device driver development for Linux and/or Windows. Strong experience with PCIe-based hardware, including BAR

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. About the Role EnCharge AI is looking for an Embedded SW Engineer to develop the firmware for our Edge AI processors. The candidate must possess an excellent understanding of computer architecture and operating system concepts including, but not limited to, memory management, virtualization and PCIe address space. The role includes designing and developing the core Firmware for various parts of the SOC. The candidate must possess strong communication skills to interface with Runtime, Architecture and H/W teams. Responsibilities Develop the critical pieces of EAI Firmware used to deploy inference jobs on EAI processors Validate different IP blocks on the SOC Evaluate and integrate third-party device drivers to interface with EnCharge’s SW stack Work closely with the Runtime, Hardware and Architecture teams define the driver architecture Qualifications Bachelors in EE/CS Advanced programming skills in C/C++ for operating system kernel & systems development Understanding of RISC-V architecture is a plus Exposure to PCIe BAR and IOMMU architecture Exposure to virtualization and hypervisor technologies Deep understanding of operating systems concepts, data structures, x86-64 and accelerator architectures Experience with low-level debug tools as well as emulators and simulators Experience running, analyzing, and tuning system performance benchmarks Excellent verb

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. About the Role EnCharge AI is seeking an AI Runtime Engineer to develop and optimize the execution stack for our next-generation AI accelerator. In this role, you will work on low-latency, high-performance runtime software that enables efficient execution of deep learning models on specialized hardware. You will collaborate with hardware, compiler, and AI framework teams to deliver optimized AI inference and training performance across cloud and edge environments. Responsibilities Develop and optimize the AI runtime software stack for executing deep learning workloads on AI accelerators. Implement task scheduling, memory management, and kernel execution strategies for efficient computation. Optimize data movement between host and device using PCIe, DMA, shared memory. Design and implement high-performance APIs for AI Inference frameworks such as OpenVino, ONNX Runtime, vLLM Work on graph execution optimizations, including kernel fusion, pipelining, tensor tiling, and caching. Integrate runtime components with AI compilers (LLVM, MLIR, XLA, TVM) for optimized execution. Ensure scalability and reliability of the AI runtime for cloud-based and edge AI deployments. Qualifications Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or a related field. 3+ years of experience in developing low-level runtime software for AI accelerators, GPUs, or

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. About the Role EnCharge AI is seeking a highly skilled and experienced AI Compiler Engineer to spearhead the efforts in developing and optimizing graph compilers tailored to cutting-edge AI and ML workloads. You will collaborate with hardware architects, and AI researchers to enhance performance, optimize computation graphs, and enable efficient model deployment on EnCharge’s Inference Accelerators. Responsibilities Architect, design, and implement optimizations for AI model execution on graph compilers to improve performance, reduce latency, and maximize hardware utilization. Work closely with ML researchers, hardware engineers, and software developers to design and deploy AI models, understanding and addressing hardware-specific challenges. Work on performance optimizations for neural network models, such as layer fusion, operator fusion, and graph-level transformations. Develop compiler optimizations and passes that convert high-level AI models (e.g., from TensorFlow, PyTorch) into intermediate representations (IR). Implement parsing, semantic analysis, and IR generation for deep learning frameworks. Research and integrate the latest advancements in compiler design, ML model optimizations, and hardware acceleration into graph compilers. Provide leadership, mentorship, and technical guidance to a team of engineers focused on graph compiler optimizations. Qual

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is a global leader in memory and storage solutions, transforming how the world uses information to enrich life for all. At the Mask Technology Center (MTC), we develop and manufacture advanced photomasks that enable next-generation semiconductor technologies. As a Photomask Wet Process Engineering Intern, you will join the MTC Cleans Team and contribute to the development of advanced cleaning and resist strip processes used in the fabrication of DUV and EUV photomasks. This role provides hands-on experience in semiconductor process development, defect reduction, contamination control, and data-driven engineering. You'll have the opportunity to lead an independent summer project with measurable business and technical impact, and present your technical findings and recommendations to engineering teams and site leadership. Project areas include: EUV and DUV defect reduction, Contamination mitigation and control, Advanced wet cleaning chemistry development, Resist strip process optimization, Tool matching and qualification, Yield improvement initiatives, Process characterization and capability enhancement, Data analytics and process monitoring Responsibilities You will gain: Hands-on experience developing advanced processes for groundbreaking EUV and DUV photomask technologies. Exposure to semiconductor manufacturing, defect engineering, and process integration. Mentorship from experienced engineers and technical leaders. Opportunity to lead a high-visibility engineering project and present

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a TCAD Engineer in the DRAM Device Technology group at Micron Technology, Inc., you will work with an industry-leading team to model, simulate, and understand advanced semiconductor devices and processes for future memory products. You will be responsible for physics-based device simulation, supporting technology development by providing quantitative insight into device behavior, variability, and reliability through TCAD tools. Responsibilities and Tasks Develop and apply TCAD simulations to analyze advanced semiconductor devices including DRAM access devices, CMOS devices, diodes, and resistive elements. Build 2D/3D device structures, define physical models (transport, recombination, traps, mobility, quantum effects, etc.), and perform parametric studies to support device and process development. Correlate TCAD simulation results with electrical characterization data to clarify physical mechanisms behind performance, variability, and reliability trends. Investigate impacts of process variations, material properties, defects, and interface states on device characteristics. Support development teams

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Chemistry Lab plays a critical role in advancing semiconductor technology by developing analytical methods that support materials understanding, process development, defect characterization, and next-generation memory innovation. The team applies advanced chemical, optical, and surface characterization techniques to solve complex materials challenges across semiconductor manufacturing and research. We are seeking a highly motivated summer intern to contribute to advanced spectroscopy and nanoscale characterization projects focused on semiconductor thin films, surfaces, interfaces, and process-induced material changes. Working alongside scientists and engineers in Corporate Labs, the intern will develop and apply spectroscopy-based characterization methods, analyze complex materials datasets, and gain experience in experimental design, data analytics, and semiconductor materials research within an industrial laboratory environment. Responsibilities Conduct experiments using advanced spectroscopy and microscopy techniques to characterize semiconductor thin films, surfaces, interfaces, and related materials. Collect, process, analyze, and interpret spectroscopy data, including photoluminescence, fluorescence lifetime, Raman, and AFM-IR datasets, and develop visualization workflows to communicate results. Correlate spectroscopic signatures with material properties, process conditions, surface states, and defect behavior while colla

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today. Design-for-X Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions in AI for Chip Design and AI for Predictions in various use cases in manufacturing testing on some of the industry's most complex semiconductor chips. What you'll be doing: As a senior member in our team, you will work on innovating in the DFT Power, Thermal & Voltage Noise Methodology areas. This will include working on groundbreaking low power & thermal solutions for our manufacturing tests to be enabled at conditions that push the boundaries for our datacenter GPUs. You will work with multi-functional teams including Product Development & Power Architecture, implementing brand-new methodologies on hard-to-solve problems for improving our outgoing quality of chips. You will work on post-silicon data analysis for power to architect the next-gen solutions. In addition, you will help develop and deploy DFT methodologies for our next generation products using Applied ML & Gen AI solutions. You will also help mentor junior engineers on test designs and trade-offs including cost and quality. What we need to see: BSEE (or equ

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips. What you'll be doing: As a senior member in our team, you will work with pre-silicon and post-silicon data analytics - visualization, insights and modeling. Design and uphold sturdy data pipelines and ETL processes for the ingestion and processing of DFX Engineering data from various origins Lead engineering efforts by collaborating with cross-functional teams (execution, analytics, data science, product) to define data requirements and ensure data quality and consistency You will work on hard-to-solve problems in the Design For Test space which will involve application of algorithm design, using statistical tools to analyze and interpret complex datasets and explorations using Applied AI methods. In addition, you will help develop and deploy DFT methodologies for our next generation products using Gen AI solutions. You will also help mentor junior engineers on test designs and trade-offs including cost and quality. What we need to see: BSEE (or equivalent experience) with 5+, MSEE with 3+, or PhD wi

Director, Data Center Cooling Strategy & Partnerships Description - Shape the Future of AI Infrastructure As AI systems continue to scale, cooling has become one of the primary constraints to performance, power efficiency, and data center density. Building on more than 40 years of leadership in thermal management, fluidics, silicon technologies, and high-volume precision manufacturing, HP is exploring advanced microfluidics technologies to address the growing power and cooling challenges of future AI infrastructure. We are seeking a senior strategy and business leader to engage with industry partners, evaluate emerging opportunities, and help shape HP's direction at the intersection of semiconductors, liquid cooling, and data center technologies. This is a unique opportunity to work on emerging technologies at the intersection of semiconductors, liquid cooling, and hyperscale computing. The role combines strategy, ecosystem development, and business creation in one of the fastest-growing segments of the technology industry. Responsibilities Develop Strategy and Business Opportunities: Define market opportunities, customer segments, business models and growth strategy. Monitor competitive, technology, and ecosystem trends across AI infrastructure. Build Strategic Partnership: Develop and strengthen relationships with semiconductor companies, hyperscale cloud providers, server OEMs, contract manufacturers, and cooling solution providers. Identify opportunities to accelerate ecosystem adoption and create long-term strategic value. Drive Product and Market strategy: Translate customer requirements and market insights into product and portfolio recommendations. Align business, technology, and customer priorities to maximize market impact. Lead Cross-Functional Execut

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. If you want to challenge yourself and be a part of something great, join us today! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing! More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities which are hard to tackle, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior DTCO Engineer, CPU Physical Design to join our dynamic and growing team. As a Senior DTCO Engineer, you will evaluate advanced semiconductor foundry nodes to optimize next-generation CPU microarchitecture. You will coordinate between foundry partners, IP development, and hardware design teams to explore target technology nodes during early development phases. What you'll be doing: Evaluate advanced process technologies and help shape technology choices for next-generation CPUs. Run synthesis, place-and-route, and static timing analysis to assess how process features affect power,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description At Micron, we are transforming how the world uses information to enrich life. The High Bandwidth Memory (HBM) Design team develops industry-leading memory solutions that power Artificial Intelligence (AI), high-performance computing, graphics, and data center applications. Our team collaborates across Design, Verification, Physical Design, Product Engineering, and CAD organizations to deliver next-generation memory technologies. As an HBM Design Engineer Intern, you will work alongside experienced engineers on the design, development, and validation of advanced HBM products. This internship provides hands-on experience with semiconductor design methodologies, industry-standard EDA tools, and AI-assisted engineering workflows while contributing to real-world memory design projects in a collaborative global environment. Responsibilities Assist with HBM memory and logic design activities, including RTL development, circuit implementation, simulation, verification, and functional analysis. Deve