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NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work , to amplify human imagination and intelligence. Make the choice to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips. What you'll be doing: As a member in our team, you will own and work with cross functional teams, implementing state-of-the-art designs in test access mechanisms, IO BIST, memory BIST and scan compression. In addition, you will help develop and deploy DFT methodologies for our next generation products. You will have the chance to define, prototype and deploy next generation DFX architectures and methodologies across all our products. This includes high speed test access architectures, the in-system-test architecture, ISO26262 functional safety diagnostic for in-field testing and beyond, silicon debug & bring-up, productization, and silicon life-cycle management among others As a member on our DFX Architecture team, your responsibility will be to craft key DFX architecture and methodologies to meet system level safety diagnostic test quality, in-field test quality, advanced defect screening and diagnosis to enable SLM for automotive, industrial, and robotics safety platforms etc. Collaborate with multi-functional teams like system architecture, chip architecture, ASIC design, verification, CAD, VLSI,

At NVIDIA, our Senior DFT Engineers lead the way in silicon test innovation, ensuring flawless execution and outstanding quality in our next-generation silicon platforms. This is an outstanding opportunity to join a world-class team and make a significant impact in the semiconductor industry! What You'll Be Doing: Design and roll out advanced test methodologies on NVIDIA’s next-generation silicon platforms. Own and work with cross-functional teams to implement the latest in test access mechanisms, IO BIST, memory BIST, and scan compression. Collaborate closely with VLSI and Product Engineering groups to design innovative DFT approaches that advance silicon test technology. Lead end-to-end planning and timely execution of NVIDIA's new chip bring-up efforts, from pre-silicon through production deployment. Develop and standardize methodologies, processes, and workflows for silicon bring-up, crafting reusable checklists and playbooks. Improve cross-team communication, work, and handoffs. Guide and mentor junior engineers, helping them navigate complex build trade-offs to achieve world-class quality and efficiency. What We Need To See: BSEE (or equivalent experience) with 5+ years, MSEE with 3+ years, or PhD in DFT or related domains. Demonstrated knowledge and expertise in defining scan test plans, BIST including memories and IOs, fault modeling, ATPG, and fault simulation. Excellent analytical skills in verification and validation of test patterns and logic on complex and multi-million gate builds using vendor tools. Experience in silicon debug and bring-up with an understanding of pattern formats, failure processing, and test program development. Strong programming and scripting skills. Excellent written and or

This is where your work makes a difference. At Baxter, we believe every person—regardless of who they are or where they are from—deserves a chance to live a healthy life. It was our founding belief in 1931 and continues to be our guiding principle. We are redefining healthcare delivery to make a greater impact today, tomorrow, and beyond. Our Baxter colleagues are united by our Mission to Save and Sustain Lives. Together, our community is driven by a culture of courage, trust, and collaboration. Every individual is empowered to take ownership and make a meaningful impact. We strive for efficient and effective operations, and we hold each other accountable for delivering exceptional results. Here, you will find more than just a job—you will find purpose and pride. RESUME Le.a Senior Specialist, Medical Information sera responsable de la gestion de tous les aspects support de l’information médicale pour tous les produits Baxter pour les clients internes et externes en France & Benelux, avec un support ad-hoc pour la région EMEA au sens large. Il/elle facilite le développement et la mise en œuvre opérationnelle de la stratégie d'Information Médicale dans la région EMEA et plus particulièrement dans la région France & Benelux. TACHES ET RESPONSABILITES PRINCIPALES • Apporter un service d'informations médicales de qualité réactif et non sollicité aux clients internes et externes, en enregistrant des détails complets dans le système de gestion des appels d’informations médicales et assurer la responsabilité de la maintenance du système. • Offrir une formation aux équipes internes et externes susc

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today. Design-for-X Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions in AI for Chip Design and AI for Predictions in various use cases in manufacturing testing on some of the industry's most complex semiconductor chips. What you'll be doing: As a senior member in our team, you will work on innovating in the DFT Power, Thermal & Voltage Noise Methodology areas. This will include working on groundbreaking low power & thermal solutions for our manufacturing tests to be enabled at conditions that push the boundaries for our datacenter GPUs. Partner with multi-functional teams including Product Development & Power Architecture, implementing brand-new methodologies on hard-to-solve problems for improving our outgoing quality of chips. You will work on post-silicon data analysis for power to architect the next-gen solutions. In addition, you will help develop and deploy DFT methodologies for our next generation products using Applied ML & Gen AI solutions. Help mentor junior engineers on test designs and trade-offs including cost and quality. What we need to see: BSEE (or equivalent experience) with 12+, MSEE with 10+, or PhD with 6+ years of experience in DFT design & power

As a member of the Hardware Infrastructure EDA Compute team, you will optimize, scale, and support workload scheduling systems that directly impact design velocity and infrastructure efficiency. Success in this role requires both operational precision along with developing and supporting forward-looking resource management solutions that address evolving compute demands. Beyond day-to-day operations, the role drives improvements in observability, service reliability, and automation, ensuring the EDA compute environment remains resilient, measurable, and aligned with long-term engineering demands. What you'll be doing: Manage, scale, and optimize job scheduling systems (LSF, Slurm, etc.) in a large-scale, multi-site environment supporting EDA and other compute-intensive workloads Analyze scheduler and infrastructure performance data to identify systemic bottlenecks and drive measurable improvements in utilization, throughput, and turnaround time Lead problem solving across scheduler, OS, and workload layers, ensuring timely resolution of service-impacting issues Identify recurring operational challenges and implement targeted automation or process improvements to reduce manual effort and prevent repeat incidents Help define and track reliable metrics and SLOs for service performance and reliability, partnering with customers to ensure expectations are realistic and measurable Contribute to operational standards, documentation, and best practices to improve consistency across sites Partner directly with customer teams to clarify requirements, translate technical tradeoffs, and drive issues to closure What we need to see: Bachelor’s degree in Computer Science or related field, or equivalent experience Minimum 5+ years of experience operating and supporting large-scale Linux-based

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our Revenue Operations and Go to Market Transformation teams play a key role in connecting customer demand, business strategy, and operational execution. We work closely across Sales, Business Units, Supply Chain, and Planning to create data-driven insights that help the organization make better decisions, improve responsiveness, and deliver value to customers worldwide. This role is an important bridge between customers, Sales, Revenue Operations, and planning partners. The individual in this position will translate demand signals, market intelligence, supply conditions, and business priorities into actionable forecasting and planning recommendations. Success requires strong analytical skills, cross-functional collaboration, relationship management, and the ability to influence decision-making in a dynamic global environment. Responsibilities: Analyze demand, supply, market, and customer signals to identify risks, opportunities, and forecast misalignments Partner with Sales, Revenue Operations, Business Units, and planning teams to resolve forecasting and supply issues and drive planning alignment Develop forecasting recommendations, constrained demand plans, and product mix strategies based on customer needs, supply conditions, and business priorities Monitor forecast performance, track design-win pipeline conversion, and provide insights to support continuous process improvement Prepare and deliver planning, forecasting, and business performance insights for leadership reviews

As a member of the HW Infrastructure Storage Strategy team, you will be the bridge between storage infrastructure and the chip design (e.g. NVIDIA GPUs and CPUs) workloads that depend on it. You will focus on going hands-on to understand how storage behavior impacts EDA (Electronic Design Automation) and HPC workload performance in general — and what to do about it. You’ll evaluate next-generation storage technologies, design POCs grounded in real workload profiles, uncover gaps in observability, and drive strategic decisions like data placement during datacenter transitions. This is a rare role where you’ll work at the intersection of storage systems and chip design workflows at a scale few companies reach — petabytes of active data, millions of files per job, and thousands of concurrent users. You’ll develop NVIDIA’s storage strategy and have a direct, measurable impact on engineering velocity. What you'll be doing: Lead storage technology evaluations — design and execute POCs for platforms such as NetApp, VAST, and others, using real EDA workload profiles to benchmark performance, metadata behavior, and compatibility Analyze how storage configurations and architecture choices impact EDA workload runtime in production, and recommend tuning or architectural changes to reduce job execution time Identify gaps in storage telemetry and observability — define what metrics are needed and how to correlate storage behavior with jobs running on the environment Support datacenter lifecycle programs — expansions, technology refreshes, and site exits — by mapping workload placement, identifying required data, and minimizing data replication scope Define storage policies and best practices — data lifecycle, tiering strategies, snapshot/clone workflows (e.g., FlexClone for EDA workspace branching), and capacity planning recommendations Collaborate with IT, EDA tool teams, EDA operations, and

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today. NVIDIA’s DFX team is looking for an exceptional DFT Engineer to help shape the future of compute. As stewards of the entire Scan Test Lifecycle, we drive innovation for the most advanced silicon in the world—spanning 2.5D/3D AI data center platforms, Gaming and Enterprise GPUs, and complex SOCs powering Autonomous Machines, Robotics, and Industrial systems. You will innovate at scale, designing and prototyping breakthrough Test Architectures for reticle sized, multi-chiplet products—from RTL to verification to post-silicon ATE bring-up. Join a globally recognized team that consistently delivers breakthrough performance across multiple high-impact tape-outs each year. What you'll be doing: Develop and deploy Industry-leading test methodologies on NVIDIA’s next-generation silicon platforms. Collaborate with leading EDA vendors to shape tool capabilities that meet NVIDIA’s ambitious design goals, and partner with internal CAD teams to drive scalable, automated solutions. Co-architect novel DFT strategies alongside VLSI and Product Engineering teams to push the boundaries of silicon test innovation. Own the full ATPG lifecycle—verification, coverage analysis, pattern generation, and ATE bring-up—across NVIDIA’s full product portfolio. Guide and mentor junior engineers, helping them navigate complex design

We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Position Summary Join CVS Caremark's Pharmacy Audit team as Senior Manager, Pharmacy Post-Audit Operations. This role leads the pharmacy post-audit team responsible for appeals, audit escalations, audit correspondence, and evaluating audit compliance with state laws. The Senior Manager owns the timely, accurate, and consistent execution of post-audit operations while developing team members, managing priorities, resolving complex audit matters, and identifying operational risks. In addition to day-to-day team leadership, this position leads the business implementation of pharmacy audit regulatory changes. This work is highly interconnected with other parts of the audit process and requires close partnership with Legal, Compliance, Product, Technology, Operations, and other audit teams to understand requirements, determine operational impacts, and turn those requirements into practical audit processes, controls, and team resources. The ideal candidate is a strong people leader who can manage team priorities, resolve complex or escalated audit matters, lead cross-functional discussions, and communicate clearly with stakeholders at different levels of the organization. The successful candidate will help the team work efficiently, consistently, and in compliance with pharmacy audit requirements

NVIDIA’s GPUs and SOCs are the world leaders in power, performance, and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Mask Design Engineer who is committed to making a difference in the world through their contributions! This position will collaborate with Package Technical Lead and different design teams in designing and developing sophisticated, detailed layout of silicon interposers for NVIDIA products. In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical design issues. What you'll be doing: You'll collaborate cross functionally with package technical lead (PTL) and I/O signal integrity and technology engineers to deliver solution for product packages in tight schedule. Performing physical layout for silicon interposer using Cadence tools. Conduct design feasibility studies to evaluate the package design goals for size, cost, and system performance. Take part in studying layout floorplan and perform custom layout and verification against design rules and netlists. Propose layout design trade-offs to the PTL for resolution and implementation. What we need to see: Hold a B.S. Electrical Engineering or equivalent experience Minimum of 5+ years proven experience in Mask and Layout Design. Deep understanding of layout concepts in submicron CMOS technologies. You are an authority with Cadence layout tools - particularly Virtuoso. Knowledge of Integrity auto-routing is a plus. Experience running and debugging with verification tools such as Calibre, ICV, Thunder, etc. Proficient in scripting languages like Perl, Python, S

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron-Boise, ID, we are undergoing a historic $15 billion investment in semiconductor manufacturing; construction began in early 2023, with DRAM production slated for the second half of the decade. As a leader in the semiconductor industry, we build solutions that inspire and transform technology. With plans to invest more than $150 billion globally over the next decade in leading-edge manufacturing, we are looking for passionate people to join our Boise expansion team and contribute to the growth and innovation of the semiconductor industry. As a Senior Dry Etch Process Engineer you will be primarily responsible for starting up, developing, and optimizing processes to improve product quality, driving process yield improvements, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems. Your expertise will give to the production of high-quality semiconductor components that are pivotal to our customers' success. You will work closely with multi-functional teams to tackle process issues and implement solutions that improve efficiency and yield. Your passion for engineering and willingness to learn will help us overcome the challenges of this fast-paced industry. We are looking for someone who enjoys hands-on work, values collaboration, and is eager to dive deep into the technical aspects of semiconductor manufacturing. Responsibilities Strong process area knowledge DRAM development and manufacturing experience

We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Position Summary The Senior Manager of Technology, Data, Privacy, and Third-Party Risk Legal Services at Aetna Center of Excellence (COE) is a key leadership position responsible for overseeing privacy incident response, operations and technology solutions that protect sensitive data across the organization. This role requires a deep understanding of data protection laws (e.g., NY DFS, HIPAA, State laws), regulations, and policies to ensure compliance. The Senior Manager will conduct privacy incident investigations, help oversee privacy incident response, and draft privacy policies and documentation related to privacy incidents, remediation and investigations. The ideal candidate will work collaboratively with cross-functional teams to implement effective privacy programs, respond to data incidents and breaches, and maintain compliance with privacy, security, and data governance standards. Required Qualifications 7+ years of experience in Privacy, healthcare, data governance, risk management, compliance, or a related field. 5+ years of expertise in healthcare regulations, including HIPAA and other Privacy regulations, CMS requirements, and state privacy laws. Proven track record in investigating and handling privacy incident respon

- Source: Adani Group | Job ID: 60324

Ready to do the most impactful work of your career? At Coinbase , we are uncompromising on our mission to increase economic freedom. The bar is high, the environment is intense, and we like it that way. This isn't a place for complacency, it’s a place to be pushed past your perceived limits. If you're ready to build the future of finance alongside people who refuse to settle for "good enough," you belong here. Coinbase is a remote-first, but not remote-only company. Expect to get together quarterly for intense in-person working sessions called “surges.” learn more about working at Coinbase . Data Science is an integral component of Coinbase’s product and decision making process: we work in partnership with Product, Engineering and Design to influence the roadmap and better understand our users. With a deep expertise in experimentation, analytics and advanced modeling, we produce insights which directly move the company’s bottom line. What you'll be doing: Conduct analysis and deep dives on ambiguous problems for our business. Your work will result in insights and recommendations that guide the team’s decision making. Build, tune, or measure the performance of online and offline ML models and AI systems used across Coinbase. Act as owner for a broad scope of data and metrics, from definitions and core logging to presentation of data visualizations. Guide code reviews, provide SQL and Python expertise, and create well-maintained ETL jobs. Maintain a high bar for statistical rigor on your team. Design, execute, and uplevel experimentation and causal analyses that build confidence with your stakeholders. What we look for in you: A BA/BS in a quantitative field (ex Math, Stats, Physics, or Computer Science) with ≥5+ years of relevant experience or a PhD in a quantitative field with with ≥3+ years of relevant experience Demonstrated experience in driving impactful data science projects that tackle ambiguous problem spaces. Ability to in

About the Job: LaunchDarkly is looking for a Senior Program Manager to help the Revenue Operations team scale efficiently. This role drives cross-functional programs, streamlines processes, and delivers data-driven solutions that accelerate predictable SaaS revenue growth. You'll be the person who turns strategic priorities into structured plans, keeps cross-functional teams aligned, and makes sure risks and blockers get surfaced and resolved before they slow the business down. The mission of the Senior Program Manager is to enable the Revenue Operations team to scale efficiently by driving cross-functional programs, streamlining processes, and delivering data-driven solutions that accelerate predictable SaaS revenue growth. Responsibilities: Drive Strategic RevOps Initiatives Translate strategic priorities into structured program plans Define milestones, owners, and deliverables Track progress and outcomes against plan Manage dependencies and escalate blockers as needed Establish Program Governance & Cadences Establish operating rhythms for cross-functional programs Run status and steering meetings Maintain decision and action logs Standardize reporting across programs Manage Cross-Functional Alignment Coordinate across RevOps and Field (Sales, CS, Marketing) teams Clarify roles and responsibilities across program stakeholders Align teams on priorities and timelines Facilitate decisions and communicate updates to stakeholders and leadership Manage Risks, Issues & Dependencies Identify risks early and maintain risk logs Develop mitigation plans Resolve cross-functional dependencies Escalate decisions requiring leadership input Qualifications: 10+ years of experience in program management, project management, or operations, ideally supporting a Revenue Operations, Sales Operations, or GTM function Strong track record running cross-functional programs with multiple stakeholders and competing priorities Experience establishing program governance — operating rhy