Senior Hardware Design Engineer Jobs

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE We are seeking a highly motivated Hardware Design Engineer for Pure’s Datastore team. The Pure Engineering Team builds the industry’s most innovative, high-performance, energy-efficient and TCO-optimised storage solution. As part of this team, you will help productize this differentiated storage solution for our customers. WHAT YOU'LL DO Plan, lead, implement, and debug SSD hardware designs from concept through production. Contribute to all phases of the product lifecycle, including architecture, design, documentation, validation, and sustaining. Drive interoperability testing across server/storage systems and SSDs. Diagnose and resolve HW-related issues in collaboration with internal teams, external partners, and JDMs. Apply deep knowledge of major bus technologies such as PCIe, DDR, NAND, SPI, and I2C. Evaluate system-level tradeoffs in mechanical, thermal, power, and signal integrity design. Work with diagnostics/test engineers by reviewing test plans to ensure proper coverage Lead failure analysis and root cause investigations to support field issues and customer escalations Incorporate automation and AI to enhance SSD design and validation processes. Provide technical guidance and mentorship to junior engineers. We are primarily an in-office environment and therefore, you will be expected to work from the Santa Clara, CA office in compliance with Everpure’s policies, unless you are on PTO, or work trav

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE As a Senior Hardware Design Engineer on the Datastore team, you will architect and launch our next-generation, high-performance solid-state storage solutions from concept to global mass production. Collaborating closely with cross-functional architecture, thermal, and joint development manufacturing (JDM) teams, you will pioneer high-speed hardware that directly reduces total cost of ownership (TCO) and energy consumption for our global customers. Your engineering leadership will fundamentally reshape data storage efficiency, transforming cutting-edge high-speed interfaces into reliable, market-ready enterprise products. WHAT YOU'LL DO Own End-to-End Productization: Lead SSD hardware design activities—including schematic design, component selection, and layout reviews—to successfully transition next-generation storage solutions from initial architecture through to mass production. Drive System Interoperability: Design and execute cross-platform interoperability testing across complex server/storage systems and SSDs to ensure seamless integration and industry-leading reliability. Resolve Complex System Trade-offs: Evaluate and optimize critical system-level tradeoffs across mechanical, thermal, power, and signal integrity (SI) parameters to maximize hardware efficiency. Spearhead Root Cause Analysis: Diagnose and resolve complex hardware issues and field escalations by collaborating with diagnostics engineers and e

Test & Evaluation Hardware Design Engineer (Experienced & Senior) Company: The Boeing Company The Boeing Test and Evaluation (BT&E) organization is seeking Hardware Design Engineers to be based in Long Beach, CA , supporting the development and sustainment of our avionics lab and related test activities. You'll have the opportunity to work on groundbreaking projects that will shape the future of the aerospace industry. Our current initiatives include developing an integrated test lab for flight hardware, avionics, and flight simulators. Major programs include AvionX, C-17 and others. As a Hardware Engineer in BT&E, you will play a pivotal role in the design and development of lab hardware and sustainment of new and legacy units. In addition, you will document requirements, develop and maintain test articles and interfaces in support of various programs using the lab. Additionally, you will perform seamless hardware and software integration ensuring all systems work harmoniously together to support qualification and provide support in troubleshooting and resolving lab issues of new and legacy test equipment. Our teams are currently hiring for a broad range of experience levels including Mid-Level or Senior Hardware Design Engineers. Position Responsibilities Include: Own domain-specific hardware architecture, component selection, physical design, and detailed mechanical, electrical, and test engineering Perform systems verification through execution of test procedures Support the development and verification of test methods Develop detailed test procedures, and instrumentation and configuration definition, needed undefined Deve

Digital Electronics Circuit & Unit Hardware Design Engineer (Lead or Senior) Company: The Boeing Company oeing Space, Intelligence & Weapons Systems has an exciting opportunity for Digital Electronics Circuit & Unit Hardware Design Engineer (Lead or Senior) to join us as part of our Space Digital Products & Electronics team located in El Segundo, CA. Are you passionate about crafting the digital heart of communication satellites? We are seeking Digital Electronics Circuit and Unit Hardware Design Engineers who thrive on developing cutting-edge digital solutions. In this role, you will be at the forefront of designing and implementing the digital circuitry that drives satellite functionality. Your expertise in digital signal processing, data communication, digital control systems, and embedded systems will be instrumental in shaping the future of satellite technology. Collaborating with cross-functional teams, you'll ensure seamless integration of digital components, enabling efficient data processing and communication within the satellite. If you are an engineer at heart with a love for all things digital, this is your opportunity to make a significant impact on the world of space technology. What sets our work-site apart is the unique work experience and collaborative environment we offer. We are truly cradle-to-grave in most aspects of satellite development, with an on-site satellite factory and all our electronics teams co-located on the same worksite. This proximity fosters high collaboration between teams and ensures seamless communication. With a factory just downstairs, we have the capability to turn concepts into reality right on-site. Moreover, we provide an abundance of tools, resources, and a comprehensive d

Toradex is a global company strongly focused on engineering & technology. We’re powered by a diverse & uniquely gifted workforce. We pursue the best people to propel our innovative vision of embedded computing and IoT. If you’re interested in being a driving force at an agile technology company, engineering clever computing solutions & helping other companies bring their products to life, we should talk. Job Description As part of our Hardware Development team , you will be involved in product development, verification and validation (VaV), and complex customer support cases related to hardware design. This role is suited for engineers who enjoy working across the full hardware lifecycle, from concept and design through bring-up, testing, optimization, and long-term product support. The position combines hands-on engineering work with cross-functional collaboration, especially with product managers and software development teams. This is an end-to-end hardware engineering role focused on building robust, optimized, and reusable embedded hardware platforms and supporting them throughout their lifecycle. Role & Responsibilities As a Hardware Development Engineer , you will drive the complete hardware design cycle for new electronic products, including: System design Schematic capture Bill of Materials (BOM) creation and maintenance Multi-layer PCB design (6+ layers) Technical documentation Hardware bring-up Verification and validation, including compliance tests such as EMC , electrical compliance of interfaces, shock and vibration, and related activities Creation and maintenance of Altium component libraries and the Altium 365 workspace You will be responsible for developing highly robust, optimized, and generically usable System on Module solutions, carrier boards, peripheral products, and related hardware, together with complete documentation. You will work closely with product managers and software development teams during the developm

For more than 30 years, SonicWall has delivered a partner-first unified cybersecurity portfolio that helps SMBs, MSPs, and IT teams consolidate network security, endpoint security, security service edge (SSE), and threat response across hybrid environments. By bringing connected technology, real-time threat intelligence, automation, and expert services together, SonicWall helps organizations simplify security operations, achieve better security outcomes, and lower total cost of ownership. Backed by a global ecosystem of more than 17,000 partners, SonicWall delivers enterprise-grade protection built for SMB and mid-market realities. For more information, visit www.sonicwall.com or follow us on X, LinkedIn , Facebook , and Instagram . We are seeking an experienced Hardware Design Engineer to lead the end-to-end development of next-generation network security appliances. This individual will be responsible for all phases of hardware product development, including requirements definition, architecture, detailed design, prototyping, validation, manufacturing support, and production release. The ideal candidate will have extensive experience designing high-performance networking platforms, embedded systems, and security-focused hardware products. Key Responsibilities Hardware Architecture & Product Development Own the complete hardware design lifecycle from concept through production and sustaining engineering. Translate product requirements into hardware architectures and detailed design specifications. Conduct technology evaluations, design trade-off analyses, and recommend optimal solutions. Select and qualify key components, technologies, and vendors. Drive product lifecycle management (PLM) activities, including product introduction, production release, field support, and post-launch analysis. Design & Development Design complex multi-layer PCBs for networking and security appliances. Perform circuit design, schematic capture, signal integ

About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role Anthropic trains and serves frontier AI models on some of the largest and most diverse accelerator fleets in the world, and the hardware those models run on is one of the most direct levers we have on capability, cost, and reliability. Our Hardware Systems team owns the system-level architecture of that compute — from the package boundary out through boards, racks, interconnect, power, cooling, and the datacenter interface. We're hiring senior hardware systems architects and technical leads who can work broadly across the hardware stack and go deep where it's needed, and who have the judgment to make and own directional calls — what to build, what to buy, what to co-design with a partner. You'll set architecture, write the specs that partners and internal teams build against, and own the validation and qualification strategy that proves the result. The skillsets we need span power, cooling, mechanical, interconnect, signal integrity, data and control plane, system management, reliability and serviceability — applied across networking, compute, storage, and accelerator systems. You'll work closely with our ML performance, infrastructure software, supply chain, and datacenter teams, and directly with hardware vendors and partners across the stack. And because this is Anthropic, you'll have Claude as a genuine collaborator — we expect this team to push on what AI-assisted hardware design and review can look like. Key responsibilities Own system path-finding and architecture for your domain across the breadth of compute Anthropic deploys — from concept and requirements through spec, design review, and deployment — and act a

We are seeking a highly versatile Sensor & Hardware Safety Engineer to bridge the gap between rigorous hardware reliability and real-world system behavior. In this hybrid role, you will be responsible for 50% hardware-level Functional Safety (ISO 26262) and 50% system-level sensor safety (SOTIF / ISO 21448). You will ensure that our custom hardware meets strict ASIL compliance while guaranteeing our advanced sensor suites (Cameras, LiDAR, Radar) operate safely through perception edge-cases and environmental challenges. In This Role, You Will: Evaluate supplier technical documentation for advanced imagers, microprocessors, and SoCs to verify SEooC and AoU alignment. Assess vendor deliverables to guarantee ASIL standards are met for firmware/software maturity and diagnostic systems. Execute board-level FMEDA for sophisticated integrated circuits, including FPGAs and microcontrollers. Partner with Software, FW, and EE departments to define architectural requirements that enhance diagnostic monitoring. Support the V&V team in developing SOTIF-compliant simulation and physical test protocols for edge-case scenarios. Qualifications Minimum of a B.S. in Automotive, Robotics, Aerospace, or Electrical Engineering. At least 3 years of professional experience involving board bring-up, silicon validation, or hardware design. Understanding of SOTIF and ISO 26262 safety protocols. Strong interpersonal and professional communication capabilities within a collaborative environment Bonus Qualifications ISO 26262 professional certification (CFSP or CFSE). Background in automotive-grade hardware validation and design. Experience utilizing traceability platforms like JAMA or Polarion. Familiarity with industry standards including IEC 61508, DO-254, and DO-178C during board bring-up.

NVIDIA’s GPUs and SOCs are the world leaders in power, performance, and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Mask Design Engineer who is committed to making a difference in the world through their contributions! This position will collaborate with Package Technical Lead and different design teams in designing and developing sophisticated, detailed layout of silicon interposers for NVIDIA products. In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical design issues. What you'll be doing: You'll collaborate cross functionally with package technical lead (PTL) and I/O signal integrity and technology engineers to deliver solution for product packages in tight schedule. Performing physical layout for silicon interposer using Cadence tools. Conduct design feasibility studies to evaluate the package design goals for size, cost, and system performance. Take part in studying layout floorplan and perform custom layout and verification against design rules and netlists. Propose layout design trade-offs to the PTL for resolution and implementation. What we need to see: Hold a B.S. Electrical Engineering or equivalent experience Minimum of 5+ years proven experience in Mask and Layout Design. Deep understanding of layout concepts in submicron CMOS technologies. You are an authority with Cadence layout tools - particularly Virtuoso. Knowledge of Integrity auto-routing is a plus. Experience running and debugging with verification tools such as Calibre, ICV, Thunder, etc. Proficient in scripting languages like Perl, Python, S

Senior Mask Design Engineer – Hardware — Taiwan, Hsinchu. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. About the Role We are looking for a passionate and innovative ATE Test Engineer to design and deliver cutting-edge test solutions for HBM-DRAM devices using modern advanced ATE platforms. In this role, you will lead the development and implementation of test plans, ATE test programs, silicon validation, and test methodologies, while driving multi-site hardware design and development, product characterization, and high-volume production support. Success in this position requires a forward-thinking mindset and the ability to apply the right technologies to meet evolving challenges. Key Responsibilities Develop and implement robust test strategies, plans, and ATE programs for HBM-DRAM devices. Drive silicon validation, characterization, and yield improvement initiatives. Design and debug test hardware, including schematic capture and PCB layout. Collaborate cross-functionally to ensure seamless integration of test solutions into production. Support high-volume manufacturing and troubleshoot complex test issues. Qualifications & Skills Education: Bachelor’s or Master’s degree in Electrical, Electronics or Computer Engineering. Experience: A

Salary Range: PLN 260,000-352,000 Subject to alignment to the responsibilities and duties of the role About Graphcore At Graphcore, we’re building the future of AI compute. We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale. As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem. To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world. We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence Job Summary We are looking for a senior engineer to design and evolve an application-level simulator for ML workloads that directly influences hardware and software architecture decisions. This role sits at the intersection of machine learning, systems, and hardware design. You will model real-world workloads, predict system behaviour, and provide insights that guide how our platform evolves. Success in this role requires not only strong technical depth, but also the ability to work closely with multiple teams to ensure the simulator reflects reality and drives meaningful decisions. The Team The Tenjin team focuses on building advanced simulation capabilities to model and predict the behaviour of large-scale ML workloads on next-generation hardware and software platforms. We operate at the intersection of machine learning, systems, and architecture, developing tools that enable data-driven decisions long before systems are fully built or deployed. Our work helps shape both hardware and software direction by providing early insights into performance, scalability, and efficiency. The team brings together engineers with backgrounds in simu

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! As a Formal Verification Engineer at NVIDIA, you will be responsible for formally verifying complex designs. NVIDIA has developed a strong functional formal verification methodology that not only enables hardware design and verification engineers to use lightweight FV tools and techniques successfully but also allows FV engineers to use advanced property proving techniques on complex and/or critical RTL logic. The job involves very close interaction with the design team, architecture team, with other validation teams, and with NVIDIA's internal FV R&D group that develops functional verification tools using formal verification technology. What you'll be doing: You will help decide on the best applications of formal verification techniques to various parts of the design. Review functional and micro-architectural specifications, define the scope for formal verification, and create high-quality formal verification testplans to sign-off on the corresponding design implementation. Build formal verification testbenches, code assertions and constraints, and apply abstra

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Job Title: Senior Physical Design Engineer Experience: 4–7 Years Focus: Block-Level RTL-to-GDSII & PPA Optimization Location: Bangalore Hybrid The Role We are looking for a high-energy, technically curious Physical Design Engineer to join our advanced silicon team. This isn't a role for someone who wants to just "push buttons" on a vendor flow. We need a driver—someone with 4–6 years of experience who has lived through the trenches of quality tape-outs and is hungry to take full ownership of complex partitions. You will be expected to work with a high degree of independence, using your analytical skills to bridge the gap between a standard recipe and a world-class PPA result . You should be comfortable following expert lead direction while maintaining the "question the status-quo" mindset when you see a more efficient path. Key Responsibilities Partition Ownership: Lead the physical implementation of complex blocks from Synthesis and Floor-planning through to CTS, Routing, and Sign-off. PPA Recipe Development: Don't just run the flow—optimize it. You will perform deep-dive analysis on timing paths, power profiles, and congestion to derive custom optimization strategies. Automation-First Mindset: Use Tcl and Python to automate repetitive tasks, build custom analysis scripts, and enhan

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Job Title: Staff/ Senior Staff Physical Design Engineer (Technical Lead) Experience: Staff 8-10 years Senior Staff 11-13 years Location: Bangalore Hybrid/Remote or Remote in India The Role We are seeking a high-impact Staff/ Senior Staff Physical Design Engineer to serve as a Technical Lead for our next-generation silicon products. This is a "player-coach" role designed for a versatile expert who is equally comfortable architecting a convergence strategy as they are mentoring a small team of engineers. You will own the physical delivery of a major sub-chip or complex block, pushing the absolute limits of PPA (Power, Performance, Area) . As a Staff/Senior Staff lead, you are expected to be the "anchor" of the project—assertive in your decision-making, highly analytical in your debugging, and adept at managing stakeholders to ensure we hit our tape-out milestones without compromise. Key Responsibilities Technical Leadership: Lead a small team of PD engineers, providing technical direction, workload management, and architectural oversight for a sub-chip or partition. SOC clocking , FEV/VCLP specialized skills are preferred. Complex Block/Sub-chip Ownership: Take personal hands-on ownership of the most critical, high-congestion, or timing-critical blocks in the desi