Smts Dmts Jobs

SMTS/MTS/Principal Engineer - Product Quality Assurance (ID1) — Boise, ID - Main Site. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Micron is seeking an experienced technical leader to accelerate equipment and hardware differentiation, strengthen strategic supplier collaborations, and drive long-term manufacturing capability development across the global Front-End network. This role will serve as a senior individual contributor within the CPEE organization, working across Process Engineering, Technology Development, Manufacturing, Procurement, and external equipment/material suppliers to identify, evaluate, and deploy breakthrough technologies that improve factory capability, productivity, cost competitiveness, and technology readiness. The successful candidate will combine deep semiconductor process and equipment knowledge with strong leadership, influence, and execution skills to bridge technology innovation and high-volume manufacturing. Key Responsibilities Hardware Advancement & Technology Differentiation Lead identification, evaluation, and deployment of differentiated equipment and hardware innovations for high volume manufacturing readiness Develop and proliferate artificial intelligence and equipment automation Drive collaboration with strategic suppliers to influence future equipment architecture, subsystem design, and technology roadmaps.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Advanced Packaging Technology Development is where Micron pushes the boundaries of 3D memory. We take ideas from early experiments to factory‑ready processes, working hands‑on with materials, tools, and partners across the industry. If solving foundational problems that shape future products excites you, you’ll feel right at home here! This role is a senior Process Engineering Technical Leader focused on chip‑to‑wafer and hybrid bonding. You’ll lead the development and scale‑up of bonding processes that enable high‑performance 3D memory products like HBM and 3DS DRAM. Your work will span early pathfinding through high‑volume manufacturing, with a clear impact on reliability, performance, and cost. Responsibilities: Set technical direction for chip‑to‑wafer and hybrid bonding processes across development programs Develop and mature process flows, materials, and integrations that meet performance, reliability, and cost needs Lead problem solving across wafer fab, die processing, bonding, thinning, and downstream packaging interactions Partner with integration, equipment, product, manufacturing, and quality teams to deliver TD breakthroughs Drive technology transfer into manufacturing with a focus on repeatability and high‑volume readiness Minimum Qualifications: Master’s degree or PhD in Materials Science, Electrical, Mechanical, or Chemical Engineering, or a related field 13+ years of semiconductor R&D experience, incl

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Senior Member of Technical Staff in NAND Module Process Integration Team the Singapore R&D department at Micron Semiconductor Operation Pte Ltd, you will be responsible for designing, developing, integrating, and implementing innovative and effective process solutions to improve next-generation 3D NAND Product Yield and Quality with competitive cost and performance within the required timeline. Your responsibilities will include, but are not limited to, the following: Module Ownership : Lead one or more process modules related to the development and operation of a 3D NAND semiconductor integrated circuit. Specification definition : Define structural specifications and process requirements for assigned modules. Strategic Direction: Set a clear direction and vision for the module and have a well-defined continual improvement plan. Proactive Issue Resolution: Be proactive in identifying potential structure, electrical and reliability issues and addressing them early with process control. Solve problems with a model-based approach. Performance Optimization: Focus on structural development, electrical performance, parametric verification, and process control and manufac

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Advanced Mask Development department in Micron’s Technology Development organization delivers reticle solutions that help shape next-gen memory and storage products in the evolving global technology landscape. This team works at the intersection of advanced equipment, materials science, and precision manufacturing. If you enjoy solving complex problems, collaborating with other subject-matter experts and department leaders, and seeing your direct impacts on product quality, you’ll feel at home here! Position Overview: Micron is seeking a highly experienced Resolution Enhancement Techniques (RET) Engineer to join the AMD team at Micron. At the Senior Member of Technical Staff level, our ideal candidate is a master in their field and has a history of innovation and driving technical direction in the industry. This role will focus on developing and optimizing RET and Optical Proximity Correction (OPC) solutions that enable high-fidelity wafer patterning for advanced memory technologies. This role will partner with a variety of teams to develop innovative reticle solutions, improve tapeout methodologies, and resolve complex patterning challenges across both R&D and HVM environments. We are looking for an ambitious and goals-centric individual to help drive groundbreaking solutions that maintain Micron’s competitive advantage. Responsibilities: Drive a steady stream of sophisticated projects with built-in contingency plans related to mask development, lithography optimization, and tapeout flow

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DASG Architecture Lab and Customer Enablement Lab (CEL) teams provide the infrastructure, platforms, and technical expertise required to accelerate technology pathfinding, AI and system workload analysis, memory subsystem characterization, FPGA/LPDRAM prototyping, and customer enablement initiatives. These teams play a critical role in enabling architecture exploration, validation, and teamwork across engineering organizations and external partners. AI Efficiency and Usage is a must. AI proficiency or AI‑enabled ways of working where applicable. Agentic AI and Generative AI usage model is a must. Responsibilities Own the day-to-day bring-up, readiness, maintenance, and operational support of lab systems, racks, benches, test equipment, and reference platforms used by DASG Architecture Lab and Customer Enablement Lab teams. Deploy, configure, and maintain server, GPU, FPGA, client AI, mobile AI, analyzer, and environmental test equipment supporting workload characterization and technology pathfinding activities. Build and maintain stable, reproducible validation environments, including BIOS, BMC, firmware, operating systems, drivers, networking, remote access, and power and thermal configurations. Collaborate with architecture and validation teams to enable memory trace capture, workload analysis, DRAM replay, power and performance characterization, and data-driven engineering decisions. Develop and maintain operational processes for asset tracking, configuration management, equipme

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Summary The role requires a Member Technical Staff who has broad experience and innovative thinking. This person will lead the improvement of Diffusion, Thin Film Deposition (PECVD/PVD), and Wet Etch processes in advanced DRAM technology nodes. This role is critical to enabling manufacturing requirement memory products. It requires strong process integration expertise , strategic vision, and leadership capabilities. You will drive innovation, lead technical initiatives, define technology roadmaps, and mentor engineering talent. The focus is on improving process capability and accelerating yield ramp . Key Responsibilities Coordinate all activities related to the characterization, and refinement of Diffusion, PECVD/PVD thin film deposition, and Wet Etch processes for advanced DRAM applications. Collaborate cross-functionally with Integra

ADTT Dry Etch MTS/SMTS — Taichung - Fab 16, Taiwan. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Hardware Emulation Architect on the HBM architecture team you will be responsible for architecting, enabling, and deploying hardware emulation capabilities for next generation HBM products. You will work with design, verification, firmware, and system teams to determine emulation needs and opportunities. You will drive the development of hardware emulation ecosystem including procurement of hardware emulation platforms, creation of emulation testbenches and transactors, and development of emulation friendly verification IP. You will be responsible for proactively developing emulation capabilities to meet the needs of current and future products. You will also lead the effort to enable and integrate AI-driven tools and AI-enabled workflows into the team's methodologies. Responsibilities will include, but are not limited to: Develop and maintain hardware emulation environments for complex SoCs and subsystems. Compile, configure, and debug large-scale RTL designs on emulation platforms (e.g., Palladium, Veloce, Zebu). Support pre-silicon validation, firmware bring-up, and early software development using emulation. Debug functional, performance, and connectivity issues across RTL, firmware, and system layers. Work closely with design, verification, firmware, and architecture teams to enable rapid debug and issue resolution. Create emulation testbenches, transactors, and models for system-level use cases. Enable hybrid validation flows (simulation + emulation

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a S MTS ( Seni o r Member of Technical Staff) , you will be a part of revolutionary Next Generation NAND research & development Dry Etch team driving Advanced NAND and dry etch technology forward . The position promises ample opportunities for innovation, collaboration and testing a new dimension and scaling with Next Generation NAND . A SMT S Dry Etch Engineer is a senior individual contributor responsible for defining, developing, and transferring advanced dry etch processes for Micron NAND technologies. You will work directly with process integration and other process areas such as Wet Etch, CVD, Diffusion, Metals, Lithography & CMP . You will work on state of the art <

Product Quality Engineering SMTS — Taichung - Fab 16, Taiwan. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a E5/MTS/SMTS NAND Design Rule / Process Integration engineer, your role is to support the development and high-volume manufacturing of advanced 3D NAND technologies. This role drives design-rule and PDK deliverables, partners closely across process integration and design organizations, and ensures quality, documentation, and timely execution across R&D and production programs. Lead the release of design rules and PDK deliverables; manage DRC waivers, mask definitions, and mask reviews for both R&D and production designs. Own program execution and milestones from kickoff through end-of-life. Partner with stakeholders across Array & CMOS Process Integration, Devices, Layout & Design, Modeling, Scribe & Frame, unit process areas (e.g., PHOTO/OPC/CMP), and Quality & Reliability to guide new 3D NAND generations. Ensure high quality and documentation for Design Rule Checks (DRCs) and drive timely disposition of deviations and exceptions. Collaborate with Yield Enhancement, Product Engineering, Defect Analysis, and Quality Assurance to identify layout- or database-related process issues and prioritize corrective actions. Design and evaluate test structures to generate data for next-generation devices and to assess process margin on

Dry Etch Module Technical Staff- MTS/SMTS — Boise, ID - ID1. Apply via Workday.

HVM PEE Dry Etch MTS/SMTS — Taichung - Fab 16, Taiwan. Apply via Workday.

Senior Member of Technical Staff (SMTS) – Process Development, Wet, NAND — Fab 10N/X, Singapore. Apply via Workday.