Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As part of the SSDQRA Test Development organization, you will drive the development of next-generation AI-Agent-powered test development and qualification platforms that transform how SSD validation, reliability testing, and qualification workflows are designed, executed, analyzed, and optimized. In this role, you will build intelligent AI agents capable of autonomously generating test content, optimizing test coverage, orchestrating qualification execution, analyzing failures, identifying reliability risks, and accelerating engineering decision-making. The focus is on creating an ecosystem of collaborating engineering agents that improve test effectiveness, reduce qualification cycle time, increase automation, and enhance product quality across SSD programs. You will partner with Test Development, Qualification Engineering, Reliability Engineering, Product Engineering, System Engineering, Data Science, and IT teams to develop scalable agentic solutions that enable autonomous and data-driven engineering operations. Key Responsibilities Next-Generation AI Agent-Based Test Development Develop AI-powered agents and copilots to automate SSD test development, validation, and qualification activities. Build solutions for automated test code generation, test case recommendations, coverage analysis, and requirement-to-test traceability. Design agent-based workflows for qualification planning, tes
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s DRAM Technology Development organization, advancing dry etch technology for future memory generations. Our team works at the intersection of plasma science, device integration, and manufacturing, developing processes that directly influence performance, yield, and scalability. We collaborate closely across process areas to solve challenging technical problems and accelerate technology learning! As a DRAM Dry Etch Engineer, you will develop and optimize plasma etch processes that enable next-generation memory devices. You will work in a research and development environment, taking concepts from early development through manufacturing implementation. This role offers broad technical ownership, hands-on experimentation, and opportunities to shape future technology roadmaps. Responsibilities: Develop and optimize dry etch processes to meet structural and electrical requirements Collaborate with integration and process teams to solve complex device and process challenges Perform root cause analysis and drive yield, defect, and process improvements Analyze data to improve process capability, stability, and manufacturing readiness Support process transfer, project execution, and production issue resolution Minimum Qualifications: MS or PhD with 3–5 years of relevant experience, or BS with 5–10 years of semiconductor experience Experience in dry etch process dev
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job responsibilities: · Create SoC Verification plan and develop C/SV/UVM based SoC verification tests · Develop understanding on SoC Architecture and Test controller Architecture · Develop SV / UVM based testcases for Test controller verification, MBIST verification and Functional vectors generation · Develop SV/UVM monitors to measure performance and improve Verification Environment · Interact with Architecture/Design/Tester teams to identify ASIC test vectors and functional patterns requirement · Develop flows to automate verification environment development and drive team · Involve in Vectors Bring-up activity and support ATE/Tester teams for Functional Characterization Job Qualifications · Bachelors/Masters in Engineering. · Minimum 7+ years of SOC/IP Verification based on SV/UVM. Proficient in using AI tools and Methodologies · Good understanding on Test controller / MBIST / DFT architecture · Knowledge of industry standard interfaces, such as PCIE, LPDDR*, ONFI/NAND is desired. · Proven experience in ATE/Functional CHAZ vector enablement in Silicon / Wafers and debug abilities on vectors <p
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Design, implementation and integration of complex analog circuits such as CMOS Amplifiers, Comparators, Bandgap References, LDOs, Charge Pumps, Oscillators, DLL, IO Buffers, Analog Test Mux, Process Monitor, and Temperature sensors for advanced DRAM products. Design, implementation and integration of synchronous and asynchronous custom digital block Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Analog/Memory/Logic circuits. Parasitic modeling and design validation, reticle experiments and required tape-out revisions. Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product. Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality. Mentor and lead young designers. Usage & working with AI Skills is must Strong
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Design, implementation and integration of complex analog circuits such as CMOS Amplifiers, Comparators, Bandgap References, LDOs, Charge Pumps, Oscillators, DLL, IO Buffers, Analog Test Mux, Process Monitor, and Temperature sensors for advanced DRAM products. Design, implementation and integration of synchronous and asynchronous custom digital block Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Analog/Memory/Logic circuits. Parasitic modeling and design validation, reticle experiments and required tape-out revisions. Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product. Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality. Mentor and lead young designers. Usage & working with AI Skills is must Strong
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Design, implementation and integration of complex analog circuits such as CMOS Amplifiers, Comparators, Bandgap References, LDOs, Charge Pumps, Oscillators, DLL, IO Buffers, Analog Test Mux, Process Monitor, and Temperature sensors for advanced DRAM products. Design, implementation and integration of synchronous and asynchronous custom digital block Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Analog/Memory/Logic circuits. Parasitic modeling and design validation, reticle experiments and required tape-out revisions. Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product. Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality. Mentor and lead young designers. Usage & working with AI Skills is must Strong
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Design, implementation and integration of complex analog circuits such as CMOS Amplifiers, Comparators, Bandgap References, LDOs, Charge Pumps, Oscillators, DLL, IO Buffers, Analog Test Mux, Process Monitor, and Temperature sensors for advanced DRAM products. Design, implementation and integration of synchronous and asynchronous custom digital block Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Analog/Memory/Logic circuits. Parasitic modeling and design validation, reticle experiments and required tape-out revisions. Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product. Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality. Mentor and lead young designers. Usage & working with AI Skills is must Strong
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our EDA and Design Enablement team sits at the heart of Micron’s memory development. We build and support the tools, rule decks, and flows that enable world-class CMOS design and physical verification at scale. We work closely with design, layout, and process teams, and we thrive on solving hard technical problems that directly impact product quality and reliability. As a CAD Engineer, you will play a critical role in enabling robust physical verification across the design ecosystem. You will develop, improve, and support verification tools, rule decks, and flows while partnering closely with engineers across the design and technology stack. This is a hands-on role for someone who enjoys debugging, innovating, and ensuring design correctness and manufacturability. Responsibilities: Develop and improve physical verification tools, rule decks, and methodologies for CMOS design, including DRC, LVS, DFM, and PERC. Debug, evaluate, and support in-house and commercial EDA verification solutions in a production environment. Develop and maintain rule decks, and g
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are looking for Layout Design engineer at our Micron Technology’s HBM Team in Hyderabad, India. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Role and Responsibilities • Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. • Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design • Perform layout verification like LVS/DRC/Antenna, quality check and documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. • Guide junior team-members in their execu
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Design and maintain standard cells for new DRAM products on new technology Closely collaborate with DTCO team to develop stdcells architecture for emerging technologies Characterization and modeling of Standard cells to provide timing/power model Quality Analysis of characterized liberty models in terms of performance, Power and Functionality Develop automation test bench/flow/tools to improve the work efficiency and help data analysis Co-work with international colleagues on developing new flows and tools for stdcells design Ability to identify stdcells design & char pain points suitable for AI-based automation and collaborate with cross‑functional teams to deploy scalable solutions. Requirements Good understanding of CMOS circuit design Good knowledge of CMOS device physics and layout Experience in total stdcells flow from DTCO development/ spec definition till lib release RTL/GDS flow setup, block level timing analysis, ICC2 experience. Preferred Synopsys EDA flow Finefet & planner experience required. Experience in any characterization tools (Siliconsmart/Liberate)and Cadence Virtuoso preferred. Experience in Primetime, Solido Analytics Familiar with analog/digital simulation tools, i.e. HSPICE, HSIM, VerilogHDL, FINESIM, Simvision Experience in Standard Cell design, layout and verification Experience in Skill, TCL, Per
We are looking to speak to candidates who are based in Gurugram for our hybrid working model. About the Role We are looking for a Staff Integration Engineer (Workato & API Integration) to join our GTMTech team. This strategic role will lead the design, implementation, and governance of enterprise-grade integrations that power our core business processes across GTM systems, with a primary focus on Workato-based integrations and modern API management patterns. You will own the architecture for critical integration domains such as Quote-to-Cash and other high-impact GTMTech programs, ensuring our integration landscape is scalable, secure, observable, and aligned with best practices for event-driven and API-first designs. You will partner with engineering, architecture, security, and business stakeholders to define standards, mentor other integration engineers, and drive continuous improvement in how we connect systems and data. The GTMTech team is focused on high-impact, large-scale technology programs, such as Quote-to-Cash. Our mission is to enhance company efficiency, boost profitability, and enable data-driven decision-making by streamlining systems, optimizing processes, and minimizing manual, low-value work through automation and AI. Key Responsibilities Lead the end-to-end architecture, design, and implementation of Workato-based integrations and APIs across GTM systems (e.g., Salesforce, NetSuite, HRIS, Google Workspace) with a focus on scalability, reliability, and security Define and evolve integration standards, patterns, and best practices, including canonical integration patterns, error-handling strategies, observability, and operational runbooks Design and review complex, event-driven integration workflows leveraging technologies such as Kafka or equivalent messaging platforms, ensuring robust handling of topics, producers/consumers, durability, and retry mechanisms Drive API-first and MCP-native design for GTM integrations, leveraging RESTful APIs al
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities: Contribute to the development of new product opportunities by assisting with the overall Verification Activities of DRAM Design Actively leverage AI‑based tools, agentic workflows, and automation frameworks to: Accelerate verification cycle time Assist in Test-Case/TB and various other components required for DRAM Design Verification Improve debug efficiency across simulation and silicon learning loops Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon block level/full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features Develop and maintain test benches / test vectors using simulation tools and run regressions for coverage analysis and improvements using Agentic AI Flow Hands on experience in SV, UVM based Verification. Good scripting skills using perl, python is a plus Good understanding of digital / mixed signal circuits and experience in Digital /Mixed signal Verification. Understand the usage of industry standard tools like Virtuoso, Xcellium, Simvision, vsim, Waveview, Finseim, Hspice and Micron-specific simulators Collaborate with CAD, EDA, and software teams to integrate AI‑driven flows into simulation, verification, and design sign‑off environments and contribute to cross-group communication to work towards standardization and group success About M
Opportunity Overview: This is a unique opportunity to join a high-caliber software engineering team that is experiencing rapid growth. You’ll play a key role in building impactful healthcare technology on a modern technology stack, with a focus on our core data and AI platforms. Your work will focus on enhancing the platform's key features, while also balancing scalability, reusability, and performance. As a Staff Engineer on the Application Engineering team, you’ll serve as a senior technical leader - responsible for designing and delivering high-quality, scalable software systems that power Cohere Health’s core platform. You’ll act as a multiplier, elevating the technical bar for the team, mentoring engineers, and partnering with product, data, and clinical teams to deliver solutions that meet compliance, quality, and performance standards. This role is ideal for engineers who thrive on solving complex problems in healthcare, have deep expertise in building distributed systems, and want to influence architecture and engineering practices at scale. What you’ll do: Technical Leadership & Architecture Define and drive the architecture of large-scale, distributed application systems across the Cohere platform. Ensure solutions are secure, performant, maintainable, and compliant with NCQA, CMS, and payer requirements. Champion engineering best practices in CI/CD, testing, release management, and observability. Hands-On Engineering Write clean, maintainable, and well-tested code, primarily in modern frameworks (e.g., Python, TypeScript/React, Java/Kotlin). Lead the development of core features and APIs that directly impact providers, payers, and patients. Partner with DevOps and Data teams to ensure seamless integration, scalability, and operational readiness. Quality & Compliance Focus Embed automated testing, monitoring, and release safeguards into the development lifecycle. Proactively address compliance and audit-readiness requirements in application
About the Job: As a Staff Engineer on LaunchDarkly's product engineering team, you'll design and build the next generation platform that helps all LaunchDarkly users (human and agent) interact and use our services. Our product suite enables customers to run A/B tests, measure the impact of feature changes, and optimize experiences, and is integrated with a feature management and observability platform that processes trillions of evaluations daily. This role sits at the forefront of our next generation of user interaction with our suite of products. We have a sophisticated set of users, and we have now learned through working with them and observing their usage patterns what a major redesign can do to help give them a more pleasant, productive, and efficient experience with our products. You'll work across our entire product suite, focusing on understanding the key use cases, building the experiences and the supporting technical platform, and providing guidance and tools for other teams to be able to build better experiences more quickly. Deep technical experience, a scientific mindset, and the ability to influence product and technical direction are critical. You'll lead by example: setting the bar for rigor, mentoring teammates, and owning systems end to end, including on-call. Responsibilities: Build and design our next generation of user experiences (human and agent) across the LaunchDarkly suite. Collaborate with other product teams to ensure they have the tools and platform to build great user experiences. Mentor engineers and raise the team's bar for technical rigor and system design. Own operational excellence for the experience platform - monitoring, observability, incident response, on-call. Robust telemetry and alerting. Qualifications: 10+ years building large-scale products with sophisticated audiences that are looking for help and leverage to do complex work. Has built and designed the interfaces and supporting technology platforms in consumer-grade ent
Staff Software Engineer - Testing & Automation Exceptional software engineering is challenging. Amplifying it to ensure that multiple teams can concurrently create and manage a vast, intricate product escalates the complexity. As a Staff Engineer within the Verification Platform team at Sumo Logic, you will drive the implementation and optimization for our verification platform as well as the modernization of our CI/CD pipelines. Your mission is to develop and sustain automated tooling for all testing, verification, and functional requirements, leveraging AI reasoning and machine learning models to predict and prevent delivery issues, while integrating advanced security validation and non-functional requirements into our delivery lifecycle. You will contribute significantly to establishing automated delivery pipelines, empowering autonomous teams to create independently deployable services, and progressing Sumo Logic’s internal Platform-as-a-Service. This role sits at the intersection of Platform Engineering, Quality Engineering, DevSecOps, and Developer Productivity, helping teams deliver secure, reliable, and independently deployable services at scale. Responsibilities Strategy & Leadership: Drive technical direction and design for a modern Quality Engineering platform, driving the adoption of AI reasoning for enhanced automation of all testing, verification, and functional requirements. Pipeline Modernization: Lead the modernization of CI/CD pipelines to include automated security validation, compliance checks, and other critical non-functional requirements, with a focus on integrating AI/ML for intelligent pipeline optimization and risk prediction. Framework Ownership: Own the delivery pipeline and release automation framework for all Sumo services, ensuring improvements in developer productivity, deployment frequency, and release reliability. Cross-Team Collaboration: Educate and collaborate with teams during design and development phases to ensur
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