Staff Solutions Architect Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. What You'll Do Architect and implement scalable multi-agent systems: A2A collaboration, memory, reasoning, tool use, workflow orchestration, observability. Build agentic workflows on the Claude ecosystem: Claude Code–style engineering, MCP tool access, and AWS AgentCore runtime patterns. Design and optimize Vector RAG & GraphRAG: retrieval, semantic search, grounding, citation, graph traversal, and context engineering. Deliver technology-agnostic hybrid architecture: across AWS, GCP, Kubernetes, and on-prem/distributed data platforms. Partner across engineering, manufacturing, product, validation, and data teams; lead PoCs, mentor, and set standards. What You Bring (Required) Bachelor's or equivalent experience in CS, AI, Data Science, or a related field; 8+ years in software/AI-ML, enterprise, platform, or knowledge engineering. Validated delivery of enterprise-scale Agentic AI, Generative AI, and RAG/GraphRAG solutions. Hands-on Python plus agentic framewo

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) sits within the Technology and Products Group (TPG). We are developing High Bandwidth Memory (HBM) solutions for AI and ML applications! We stack multiple DRAM chips on a high-speed memory controller using TSV (Through Silicon Via) technology, dramatically increasing memory density and bandwidth. Our designs span custom digital and RTL2GDS flows, and we are targeting the lowest power per bit in the industry. Join us as a Staff Verification Architect and shape modular, scalable verification solutions for next-generation HBM DRAM products across multiple customer platforms! You will be part of a highly multi-functional team of technical domain experts. You will collaborate closely with Design Engineering, Product Engineering, Business Units, and external customer teams to ensure our future HBM roadmap is successful. You will apply your thorough understanding of testbench architecture, custom and SoC verification methodologies, and 2.5D & 3D package integration to analyze bottlenecks and propose innovative solutions targeting scalability, quality, and verification cycle time. Responsibilities: Deliver high-quality, on-time verification plans and architecture collateral across IP-level and SoC-level verification, and develop turnkey solutions for future designs based on look-ahead information from customers and the architecture team Drive co-verification through direct customer interactions, and mentor early-career engineers to strengthen team capability and tech

Opportunity Overview We're hiring a Data Architect who will serve as a senior technical leader responsible for architecting the complete lifecycle data moves, transforms, and creates value across every product line we operate. You'll own the blueprint for our enterprise data lakehouse - setting the standards, governance, and strategy that elevate data from a byproduct of operations to the company's most valuable asset. We need someone who pairs deep mathematical and logical modeling expertise with a builder's instinct - someone who codes, prototypes fast, and proves out next-generation AI data architectures before committing the organization to them. This role would need experience with US healthcare domain data. What You'll Do Semantic Layer Governance: Set the technical standard and reference architecture for a universal semantic layer across multiple distinct data products, ensuring unified definitions of complex metrics and healthcare business entities across Architect the Enterprise Context Layer: Define, scale, and govern the global Enterprise Ontology (abstract domain maps, business entity classes, and entity-relationship rules) that serves as the backbone for Agentic AI systems. AI-Native Prototyping : Leverage modern AI-native development environments (such as Cursor, GitHub Copilot) to rapidly generate, iterate, and document blueprints for complex enterprise data schemas and metadata layers. Security & Compliance Leadership : Embed regulatory compliance (HIPAA, FHIR) and security principles into platform design. Partner with security and compliance teams to ensure architectural decisions support audit readiness and risk mitigation. Cross-Functional Collaboration : Partner with executive leadership, product management, and engineering to translate business requirements into scalable technical solutions. Communicate complex architectural concepts to both technical and non-technical stakeholders. ISMS roles and responsibilities Good knowledge of Informati

About the Role We are seeking a Staff Enterprise Architect, Data to lead the strategy, design, and modernization of our enterprise data landscape. This role operates at the intersection of data architecture, engineering, and AI enablement, defining solutions to integrate our Data Lake and Data Warehouse across multi-cloud platforms. Over the next 12-18 months, you will enable self-service data access and natural language query capabilities for business users. You will architect Master Data Management and data lineage frameworks ensuring AI models operate on high-quality, governed data. You will also evaluate and implement AI-powered tools to automate data quality monitoring and enhance data security. We're looking to speak with candidates based in the San Francisco Bay Area for our hybrid working model. Key Responsibilities Data Strategy & Roadmap Design semantic layer architecture standardizing business metrics enterprise-wide. Define governance guardrails ensuring natural language queries access validated master data sources Develop Master Data strategy for Customer and Product domains (phases 1-2), Finance and People to follow. Define golden record requirements, stewardship models, and system-of-record hierarchy. Partner with business owners on master data governance Define cross-cloud data integration strategy and reference architecture. Specify patterns (federation, replication, abstraction layer) balancing performance, cost, and data freshness. Document trade-offs and recommend implementations for batch and near-real-time use cases Develop 12-24 month data architecture roadmaps for Finance, Sales, Product, and People. Identify capability gaps and recommend technology investments with business value and effort estimates Systems Design & Solution Leadership Evaluate AI-powered data observability platforms for quality monitoring, pipeline failure prediction, and data classification. Define requirements, lead vendor POCs, and establish integration patterns

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary – Member of Technical Staff - Agentic AI Architect, Smart Manufacturing AI Pathfinding & Innovation (AIPI) Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The memory solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The Smart Manufacturing and AI team at Micron Technology is looking for an ambitious engineer (Member of Technical Staff | MTS) to deliver industry-winning Agentic AI solutions that power Micron’s dominance in the highly competitive memory solutions market. This role sits at the intersection of applied Agentic AI engineering and production systems work: you will architect autonomous AI Agents and the agentic and data pipelines that power them, build robust CI/CD deployment paths to Kubernetes and containers, and push the limits of agent performance profiling and evaluation to turn massive data and compute into measurable manufacturing impact. Qualified applicants will have experience across data/cloud technologies and systems engineering, with extensive practice modeling data, querying, and deploying scalable pipelines to execute AI agents. You will collaborate with Data Scientists, Data Engineers and expert users to build and deploy scalable Agentic AI solutions th

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description The HBM Architecture team develops advanced datapath solutions that enable industry‑leading bandwidth, power efficiency, reliability, and scalability for Micron’s next‑generation High Bandwidth Memory (HBM) products. The team collaborates closely across design, PHY, ECC, verification, layout, and system groups to drive innovative logic‑die and core‑die architectures from concept through production. We are seeking a highly motivated HBM Datapath Architect to architect, design, and optimize high‑speed data paths for next‑generation High Bandwidth Memory (HBM) products! This role focuses on logic‑die and core‑die datapath circuitry, enabling industry‑leading bandwidth, power efficiency, reliability, and scalability across JEDEC and custom HBM solutions. The ideal candidate will work closely with design, PHY, ECC, verification, layout, and system teams to deliver robust datapath designs from concept through silicon bring‑up and production. Responsibilities will include, but are not limited to: Architect and design HBM read and write datapath across core and logic die, including alignment, buffering, timing, and control logic Develop high‑speed, low‑latency datapath circuits supporting multi‑channel HBM architectures and wide internal buses Optimize datapath designs for bandwidth, power, area, and timing closure at advanced technology nodes

GitLab is the intelligent orchestration platform for DevSecOps. GitLab enables organizations to increase developer productivity, improve operational efficiency, reduce security and compliance risk, and accelerate digital transformation. More than 50 million registered users and more than 50% of the Fortune 100* trust GitLab to ship better, more secure software faster. The same principles built into our products are reflected in how our team works: we embrace AI as a core productivity multiplier, with all team members expected to incorporate AI into their daily workflows to drive efficiency, innovation, and impact. GitLab is where careers accelerate, innovation flourishes, and every voice is valued. Our high-performance culture is driven by our values and continuous knowledge exchange, enabling our team members to reach their full potential while collaborating with industry leaders to solve complex problems. Co-create the future with us as we build technology that transforms how the world develops software. * Fortune 500® is a registered trademark of Fortune Media IP Limited, used under license. Claim based on GitLab data. Fortune 100 refers to the top 20% ranked companies in the 2025 Fortune 500 list, published in June 2025. Fortune and Fortune Media IP Limited are not affiliated with, and do not endorse products or services of GitLab. An overview of this role As a Staff Engineer, you'll be the technical anchor for GitLab's Nonlinear Productivity team in the US: the person who decides what "proven" means before something ships, and who helps shape what the team builds next, not just how to build it. It's a from-scratch, generalist team with no dedicated product manager — that ownership starts on day one. Some examples of the problems this team takes on: Cutting the time it takes to complete a good code review — one that still keeps a human in the loop — by half, using agentic solutions. Turning a manual, error-prone release step into an agentic workflow that ca

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s HBM design organization, building the test architectures that enable the most advanced memory products in the world. Our team works at the intersection of design, manufacturing, and silicon learning to make 3D‑stacked memory reliable at scale. We thrive on deep technical challenges and close collaboration across disciplines! As an HBM Design Architect, you will define how next‑generation HBM products are tested from wafer to system. This role is critical to ensuring quality, yield, and performance across complex multi‑die architectures. You’ll influence product success early, work hands-on with silicon, and partner closely with design, test, and manufacturing teams. Responsibilities: Define and implement end-to-end DFT architectures for HBM base die and DRAM die Develop DFT strategies for stacked-die, cube-level, and system-level test flows Architect test access mechanisms supporting wafer probe through final test Enable silicon observability for yield learning, debug, and failure analysis Collaborate across design, verification, layout, test, and manufacturing teams Leveraging AI for design quality

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s High Bandwidth Memory (HBM) Design Architecture organization, where we push the limits of memory technology every day. Our team works across global, multicultural engineering groups to build next-generation HBM solutions that power AI and machine learning. We believe the best ideas come from collaboration, curiosity, and a shared drive to innovate! This role plays a critical part in ensuring the reliability of Micron’s most advanced DRAM and HBM products. As an ESD & Latch Up Engineer, you will shape protection strategies from early design through high-volume manufacturing, working hands-on with silicon, layout, and foundry partners. If you enjoy solving deep technical problems and influencing product robustness at scale, this role offers both impact and growth. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Define and own chip-level and IP-level ESD and latch up strategies for HBM DRAM, base die, I/O, TSVs, and die-to-die interfaces Establish ESD and latch up requirements, targets, and sign-off criteria aligned with JEDEC/ESDA standards Enable ESD protection circuits and latch up safe layout practices across designs and technologies Lead silicon validation, failure analysis, and correlation of pre-silicon assumptions to silicon results Act as the technical interface to foundries and partner closely with design, packaging, reliability, and product teams<

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The memory solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The Smart Manufacturing and AI team at Micron Technology is looking for an ambitious engineer (Member of Technical Staff | MTS) to deliver industry-winning Agentic AI solutions that power Micron’s dominance in the highly competitive memory solutions market. This role sits at the intersection of applied Agentic AI engineering and production systems work: you will architect autonomous AI Agents and the agentic and data pipelines that power them, build robust CI/CD deployment paths to Kubernetes and containers, and push the limits of agent performance profiling and evaluation to turn massive data and compute into measurable manufacturing impact. Qualified applicants will have experience across data/cloud technologies and systems engineering, with extensive practice modeling data, querying, and deploying scalable pipelines to execute AI agents. You will collaborate with Data Scientists, Data Engineers and expert users to build and deploy scalable Agentic AI solutions that drive value and insight from Micron’s manufacturing processes and systems. If you enjoy solving hard problems at scale, thrive on turning speculative research in

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary – Member of Technical Staff - Agentic AI Architect, Smart Manufacturing AI Pathfinding & Innovation (AIPI) Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The memory solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The Smart Manufacturing and AI team at Micron Technology is looking for an ambitious engineer (Member of Technical Staff | MTS) to deliver industry-winning Agentic AI solutions that power Micron’s dominance in the highly competitive memory solutions market. This role sits at the intersection of applied Agentic AI engineering and production systems work: you will architect autonomous AI Agents and the agentic and data pipelines that power them, build robust CI/CD deployment paths to Kubernetes and containers, and push the limits of agent performance profiling and evaluation to turn massive data and compute into measurable manufacturing impact. Qualified applicants will have experience across data/cloud technologies and systems engineering, with extensive practice modeling data, querying, and deploying scalable pipelines to execute AI agents. You will collaborate with Data Scientists, Data Engineers and expert users to build and deploy scalable Agentic AI solutions that drive value and insight from Mi

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Summary – Member of Technical Staff - Agentic AI Architect, Smart Manufacturing AI Pathfinding & Innovation (AIPI) Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The memory solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The Smart Manufacturing and AI team at Micron Technology is looking for an ambitious engineer (Member of Technical Staff | MTS) to deliver industry-winning Agentic AI solutions that power Micron’s dominance in the highly competitive memory solutions market. This role sits at the intersection of applied Agentic AI engineering and production systems work: you will architect autonomous AI Agents and the agentic and data pipelines that power them, build robust CI/CD deployment paths to Kubernetes and containers, and push the limits of agent performance profiling and evaluation to turn

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Interested in changing the landscape of artificial intelligence workloads? Join our team where we are building next-generation, high-bandwidth memory products. In Micron's High Bandwidth Memory Architecture organization, we partner closely with customers to deliver memory solutions purpose-built for emerging AI systems and applications. As a Senior Member of Technical Staff or Member of Technical Staff, DRAM Design Engineer in the next-generation HBM Architecture team, you will drive the architecture and optimization 3D-stacked, high-performance memories. Apply your knowledge to optimize DRAM designs and architectures for maximum performance, power, and area (PPA). This role is ideal for experienced DRAM designers who will identify, architect, design, and simulate next-generation architectures and memory features in collaboration with experts in stack architecture, memory systems architecture, and SoC microarchitecture. Responsibilities: Identify and develop novel DRAM circuit architectures that anticipate next-generation AI workload requirements, to unlock improvements in bandwidth and energy efficiency. Collaborate with peers to identify the highest-leverage DRAM circuit bottlenecks and define architectural hypotheses. Validate architectural hypotheses through schematic-level circuit design, SPICE simulation, and tradeoff analysis, establishing PPA feasibility. Partner with layout designers to conduct floorplanning studies. Colla

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) sits within the Technology and Products Group (TPG). We are developing High Bandwidth Memory (HBM) solutions for AI and ML applications! We stack multiple DRAM chips on a high-speed memory controller using TSV (Through Silicon Via) technology, dramatically increasing memory density and bandwidth. Our designs span custom digital and RTL2GDS flows, and we are targeting the lowest power per bit in the industry. Join us as a Senior Verification Engineer and contribute to modular, scalable verification solutions for next-generation HBM DRAM products! You will work independently within a multi-functional team of technical domain experts, spanning both IP-level and SoC-level verification. You will collaborate with Design Engineering, Product Engineering, and Business Units to complete the HBM verification roadmap. You will apply your solid understanding of testbench architecture, custom or SoC verification methodologies, and 2.5D & 3D package integration to evaluate issues, define solutions, and broaden your expertise. Responsibilities: Develop and implement verification plans and architecture collateral across IP-level and SoC-level verification for current and future HBM designs Support co-verification of the overall system and participate in customer interactions to gather feedback and provide recommendations for future HBM solutions Build and improve verification methodology components and GenAI applications aligned to HBM design cycles, broadening cross-disc

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Interested in changing the landscape of artificial intelligence workloads? Join our team where we are building next-generation, high-bandwidth memory products. In Micron's High Bandwidth Memory Architecture organization, we partner closely with customers to deliver memory solutions purpose-built for emerging AI systems and applications. As a Member of Technical Staff, SoC Power and Physical Architect in the Next-generation HBM Architecture Team, you will drive SoC-level specification 3D-stacked, high-performance memories. Apply your knowledge to analyze SoC trade-offs in close collaboration with peer architecture and design teams. Drive power architecture, physical planning, and early SoC design activities, including definition of IP interfaces (e.g., signals, power delivery), clocking, power sequencing, design-for-test, floorplanning, and specification development. Responsibilities: Define clocking architectures, power sequencing, power delivery, and on-die signal interfaces. Define and analyze on-die power delivery networks (PDN) and full-chip thermal implications, including power hot-spot identification and mitigation. Define DFT architectures (e.g., scan chain topology) and set verification requirements. Define SoC floorplans in collaboration with physical designers. Compose and maintain clear SoC physical documentation. Preferred Qualifications: Experie