Staff Solutions Architect Jobs

Scale’s rapidly growing International Public Sector team is focused on using AI to address critical challenges facing the public sector around the world. Our core work consists of: Creating custom AI applications that will impact millions of citizens Generating high-quality training data for custom LLMs Upskilling and advisory services to spread the impact of AI As a Full Stack Software Engineer (Forward Deployed), you’ll collaborate directly with public sector counterparts to quickly build full-stack, AI applications, to solve their most pressing challenges and achieve meaningful impact for citizens. At Scale, we’re not just building AI solutions—we’re enabling the public sector to transform their operations and better serve citizens through cutting-edge technology. If you’re ready to shape the future of AI in the public sector and be a founding member of our team, we’d love to hear from you. You will: Serve as the lead technical strategist for public sector engagements, converting ambiguous mission requirements into robust architectural roadmaps and guiding onsite implementation Architect the fundamental frameworks for production-grade AI applications, setting the gold standard for how interactive UIs, backend systems, and AI models are integrated at scale to deliver reliable outcomes. Guide the evolution of cloud infrastructure, ensuring security, global scalability, and long-term system integrity across all environments. Direct the development of core platforms and shared services, ensuring they solve cross-cutting needs for diverse global client use cases. Partner with cross-functional leadership to steer the technical roadmap, mentoring senior and junior staff and ensuring all products align with a cohesive, future-proof technical architecture. Bridge the gap between the field and the core platform by turning real-world client lessons into the reusable patterns that power the entire engineering team. Ideally you’d have: Masters or Phd in Computer Science or eq

Scale’s rapidly growing Global Public Sector team is focused on using AI to address critical challenges facing the public sector around the world. Our core work consists of: Creating custom AI applications that will impact millions of citizens Generating high-quality training data for custom LLMs Upskilling and advisory services to spread the impact of AI As a Full Stack Software Engineer (Forward Deployed), you’ll collaborate directly with public sector counterparts to quickly build full-stack, AI applications, to solve their most pressing challenges and achieve meaningful impact for citizens. At Scale, we’re not just building AI solutions—we’re enabling the public sector to transform their operations and better serve citizens through cutting-edge technology. If you’re ready to shape the future of AI in the public sector and be a founding member of our team, we’d love to hear from you. You will: Serve as the lead technical strategist for public sector engagements, converting ambiguous mission requirements into robust architectural roadmaps and guiding onsite implementation. Architect the fundamental frameworks for production-grade AI applications, setting the gold standard for how interactive UIs, backend systems, and AI models are integrated at scale to deliver reliable outcomes. Guide the evolution of cloud infrastructure, ensuring security, global scalability, and long-term system integrity across all environments. Direct the development of core platforms and shared services, ensuring they solve cross-cutting needs for diverse global client use cases. Partner with cross-functional leadership to steer the technical roadmap, mentoring senior and junior staff and ensuring all products align with a cohesive, future-proof technical architecture. Bridge the gap between the field and the core platform by turning real-world client lessons into the reusable patterns that power the entire engineering team. Ideally you’d have: Masters or Phd in Computer Science or equivale

For over 20 years, Smartsheet has empowered teams to manage work seamlessly and scale solutions smarter. Now, in our most ambitious chapter yet, we are uniting human teams with AI agents. By orchestrating the work agents do best, automating manual tasks and uncovering insights at scale, we create the space for people to focus on what truly matters: judgment, creativity, and big thinking. That is magic at work, and it’s what we show up for every day. You Will: Data Architecture and Design: Designing and overseeing the architecture of scalable and reliable data platforms, including data pipelines, storage solutions, and processing systems Data Modelling and Management:Developing and implementing data models, ensuring data quality, and establishing data governance policies Data Pipeline Development: Building and optimising data pipelines for ingesting, processing, and transforming large datasets from various sources Performance Optimisation: Identifying and resolving performance bottlenecks in data pipelines and systems, ensuring efficient data retrieval and processing Technology Evaluation and Innovation: Staying abreast of emerging data technologies and exploring opportunities for innovation to improve the organisation’s data infrastructure Troubleshooting and Problem Solving: Diagnosing and resolving complex data-related issues, ensuring the stability and reliability of the data platform Data Security and Compliance: Implementing data security measures, ensuring compliance with data governance policies, and protecting sensitive data Perform other duties as assigned You Have: Bachelor’s or Master’s degree in Computer Science, Engineering, or a related field. 10+ years of experience in data engineering or a similar role. Enterprise SaaS software solutions with high availability and scalability Solution handling large scale structured and unstructured data from varied data sources Experience in building and maintaining data platform systems such as distributed compute,

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. About the Role EnCharge AI is looking for a highly motivated and experienced Staff Physical Design Engineer to drive the physical implementation of our next-generation semiconductor chips. In this role, you will play a critical part in translating complex microarchitectures into high-performance, power-efficient silicon. Working closely with cross-functional teams, you will own block-level and top-level implementation using industry-standard EDA tools, tackle complex timing closure and power challenges, and guide designs all the way from netlist to successful foundry tapeout. Key Responsibilities Drive block-level and top-level physical design, including floor-planning, placement, clock tree synthesis (CTS), and routing. Achieve aggressive timing, power, and area (PPA) targets through advanced timing closure techniques. Perform power grid verification and manage electromigration and IR drop (EM/IR) analysis and resolution. Develop and maintain automation scripts (Tcl/Python) to streamline design flows and methodologies. Collaborate with physical verification and foundry teams to ensure design rule compliance and successful tapeout execution. Qualifications and Requirements Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. 10–15 years of dedicated experience in physical design. Strong understanding of EDA implementation flows

Ready to do the most impactful work of your career? At Coinbase , we are uncompromising on our mission to increase economic freedom. The bar is high, the environment is intense, and we like it that way. This isn't a place for complacency, it’s a place to be pushed past your perceived limits. If you're ready to build the future of finance alongside people who refuse to settle for "good enough," you belong here. Coinbase is a remote-first, but not remote-only company. Expect to get together quarterly for intense in-person working sessions called “surges.” learn more about working at Coinbase . We're hiring a Staff Analytics Engineer to lead the data foundations for the Compliance Data team within the Platform organization. This team owns the Compliance Reporting Data Platform, Coinbase's canonical source of truth for user, transaction, and compliance data, and every regulatory report at Coinbase depends on it. You'll define the technical direction for how compliance data is modeled, validated, and certified at scale, ensuring our foundations hold as products, entities, and regulatory requirements evolve, while also delivering accurate, timely data when regulators come calling. What you'll do: Own the systems, architecture, technical strategy, and roadmap for the Compliance Data, including the data models, pipelines, quality frameworks, and certification processes that the entire compliance reporting stack depends on. Build production-grade solutions, in addition to data models and pipelines, covering user, transaction, and compliance data across retail and institutional product lines, designing for durability, auditability, and consumption by both analysts and AI agents. Drive data quality at the source by establishing data contracts, validation frameworks, monitoring, and reconciliation logic that catch issues before they propagate to downstream reports or regulatory filings. Partner with upstream engineering teams, Compliance leadership, and downs

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Staff Engineer: STA Methodology & Sign-off Lead We are seeking a high-caliber Staff or Senior Staff Engineer to architect and lead our SOC Static Timing Analysis (STA) Methodology along with execution responsibilities to eliminate the bottle-necks in STA and build bridges. This is a critical role for a forward-thinking engineer who excels at defining the frameworks and flows required to navigate the complexities of modern, large-scale SOC designs. Engineer will have scope to bridge Architecture, CAD, RTL, and Physical Design to establish a predictable, high-performance, and scalable path to tape-out. The Role As the lead for STA Methodology, you will own the sign-off architecture and the timing convergence strategy. Rather than just executing runs, you will build the "engine" that enables execution—defining flows, qualifying tools, establishing margin strategies (AOCV/LVF/POCV), and driving cross-functional alignment to meet aggressive Power, Performance, and Area (PPA) targets. Key Responsibilities Sign-off Methodology & Architecture: Define and own full-chip SOC timing sign-off criteria, including Multi-Mode Multi-Corner (MMMC) definitions, derate strategies, and operating condition mapping for functional, shift, and capture modes. Flow Development & Left-Shift Automation: Architect, deploy, and maintain adva

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. We are an ambitious AI hardware startup building next-generation accelerators with massive compute density. To achieve aggressive Power, Performance, and Area (PPA) targets on accelerated tapeout schedules, we require a robust, highly automated, and heavily optimized physical implementation and signoff flow. The Role As a Staff / Senior Staff CAD & Methodology Engineer, you will be the resident expert in Innovus and Tempus, responsible for developing, debugging, and continually accelerating our RTL-to-GDSII and timing signoff flows. You will work closely with Physical Design and STA leads to eliminate bottlenecks, automate manual tasks, and push the limits of EDA capabilities at advanced process nodes. Key Responsibilities Flow Architecture & Automation: Architect, develop, and maintain a highly automated, robust, and scalable physical design and signoff flow from synthesis through GDSII, optimized for AI accelerator architectures. Innovus Methodology: Drive advanced physical design methodologies in Cadence Innovus. Optimize recipes for floorplanning, placement, Clock Tree Synthesis (CTS), routing, and power grid implementation to squeeze out maximum PPA. Tempus Signoff Integration: Own the STA and timing signoff methodology using Cadence Tempus. Implement and optimize Distributed Multi-Scenario Analysis (DMSA), advanced OCV methodologies, and automat

Opportunity Get Well (GW RhythmX) is seeking a highly experienced and innovative Staff AI Engineer to lead the architecture, development, and optimization of cutting-edge AI solutions across the organization’s healthcare platform. This role requires deep technical expertise in large language models (LLMs), multimodal AI systems, agentic frameworks, and voice technologies—including STT (speech-to-text) and TTS (text-to-speech). As a Staff-level technical leader, you will guide the AI engineering lifecycle from conceptualization to deployment at scale while serving as a key cross-functional partner to product, engineering, and clinical teams. This is a high-impact, hands-on role for a forward-thinking AI expert with a strong understanding of emerging agentic systems and best practices in safety, observability, and machine learning operations in regulated environments. Responsibilities Healthcare-Focused AI System Design & Development Architect and develop production-ready AI models trained on real-world clinical datasets sourced from hospital systems, EHRs, and patient engagement platforms. Partner with clinical informatics and product teams to derive insights from structured and unstructured health data, including FHIR, HL7, CCDA, and EHR notes. Design and train speech-to-text (STT) and text-to-speech (TTS) models to power voice-enabled AI applications and virtual assistants in a healthcare setting. Integrate and optimize agentic systems using frameworks such as LangChain, LangGraph, or CrewAI for autonomous decision-making and workflow automation. Drive the end-to-end development lifecycle—from data prep and model training to evaluation, deployment, and monitoring—ensuring responsiveness and efficiency in high-impact healthcare settings. Evaluate and incorporate emerging AI technologies and architectural tools to improve intelligence, personalization, and user experience. Infrastructure Optimization & MLOps Lead the model lifecycle from ingestion and p

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Staff/Senior Staff Physical Design Floorplan & PDN Lead Experience: 10–14 Years Location: Bangalore/2 days to work Department: RTL-to-GDSII / Physical Implementation Role Overview We are seeking a high-caliber Staff or Senior Staff Physical Design Engineer with a specialized mastery of Floorplanning and Power Delivery Network (PDN) design. You won’t just be pushing buttons; you will be the architectural bridge between RTL/Systems and the final GDSII. This role requires a visionary who understands how a single floorplan decision ripples through the entire PPA (Power, Performance, Area) spectrum. As a technical lead, you will own the chip-top floorplan for complex, large-scale SoCs or Sub-chips, driving strategies that balance aggressive performance targets with robust power integrity. Key Responsibilities Architectural Floorplanning: Lead chip-level floorplanning, including macro placement, pin assignment, and partition definition for multi-million gate designs. Strategic PDN Design: Architect and implement complex Power Delivery Networks. You will define the metal stack usage and grid density to support high-performance cores while minimizing routing congestion. EMIR Mastery: Perform exhaustive IR-drop (Static/Dynamic) and Electromigration (EM) analysis. You must be able to diagnose root causes and propose ar

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Job Title: Staff/ Senior Staff Physical Design Engineer (Technical Lead) Experience: Staff 8-10 years Senior Staff 11-13 years Location: Bangalore Hybrid/Remote or Remote in India The Role We are seeking a high-impact Staff/ Senior Staff Physical Design Engineer to serve as a Technical Lead for our next-generation silicon products. This is a "player-coach" role designed for a versatile expert who is equally comfortable architecting a convergence strategy as they are mentoring a small team of engineers. You will own the physical delivery of a major sub-chip or complex block, pushing the absolute limits of PPA (Power, Performance, Area) . As a Staff/Senior Staff lead, you are expected to be the "anchor" of the project—assertive in your decision-making, highly analytical in your debugging, and adept at managing stakeholders to ensure we hit our tape-out milestones without compromise. Key Responsibilities Technical Leadership: Lead a small team of PD engineers, providing technical direction, workload management, and architectural oversight for a sub-chip or partition. SOC clocking , FEV/VCLP specialized skills are preferred. Complex Block/Sub-chip Ownership: Take personal hands-on ownership of the most critical, high-congestion, or timing-critical blocks in the desi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We’re building the next generation of DRAM technology and pushing what’s possible at the intersection of device physics and circuit design. Our team thrives on solving deep technical challenges and turning innovative ideas into high-performance, manufacturable memory solutions. If you’re excited about influencing future technology nodes and working on designs that ship at scale, you’ll feel right at home with us! As a Staff/Principal DRAM Design Engineer, you’ll play a critical role in shaping memory architectures and circuit innovations that directly impact product performance, power, and reliability. This is a hands-on design role where your expertise will drive key decisions from concept through silicon validation, while collaborating with cross-functional teams to deliver meaningful results. Responsibilities: Lead design and optimization of DRAM circuits including memory array, control logic, datapath, and test logic Perform and analyze circuit simulations using tools such as SPICE and Verilog Evaluate architectural trade-offs impacting power, performance, and die size Integrate layout parasitics into simulations and drive design for manufacturability Define validation strategies including test chip development and silicon bring-up Minimum Qualifications: Bachelor’s degree in Electrical Engineering or related field 5+ years of circuit design experience or product engineering experience Strong understanding of analog and digital

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We’re building the next generation of DRAM technology and pushing what’s possible at the intersection of device physics and circuit design. Our team thrives on solving deep technical challenges and turning innovative ideas into high-performance, manufacturable memory solutions. If you’re excited about influencing future technology nodes and working on designs that ship at scale, you’ll feel right at home with us! As a Staff DRAM Design Engineer, you’ll play a critical role in shaping memory architectures and circuit innovations that directly impact product performance, power, and reliability. This is a hands-on design role where your expertise will drive key decisions from concept through silicon validation, while collaborating with cross-functional teams to deliver meaningful results. Responsibilities: Lead design and optimization of DRAM circuits including memory array, control logic, datapath, and test logic Perform and analyze circuit simulations using tools such as SPICE and Verilog Evaluate architectural trade-offs impacting power, performance, and die size Integrate layout parasitics into simulations and drive design for manufacturability Define validation strategies including test chip development and silicon bring-up Minimum Qualifications: Bachelor’s degree in Electrical Engineering or related field 5+ years of circuit design experience or product engineering experience Strong understanding of analog and digital circuit fu

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Contribute to the Development of New Memory Products by owning the overall logic design of the on-chip memory controller, including all optimizations and pathfinding. Responsible for meeting the performance/area/power targets Ability to interpret device and system specifications to produce required functionality Participate in new circuit conception and design as needed Define and build design architecture spec documents for the new features Architect, design, and integrate complex RTL blocks for sophisticated memory products, driving functionality from specification through verification and design closure. Develop and optimize synthesis and timing constraints, perform STA, and resolve timing challenges to meet performance, power, and area objectives. Back-end implementation activities including APR, timing closure, physical signoff readiness, and functional/timing ECO execution. Maintain Technical Expertise and provide training Define best known design and verification practices and communicate to the entire department Prepare detailed documentation as required Participate in recruiting, and interviewing new candidates Build new hire ramp up plans Engage in continuing education and competitor analysis Manage Verification Processes Perform RTL and synthesized netlist (gate level) verification at block, su

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are seeking a Staff Hardware Engineer to provide advanced operational, diagnostic, and engineering support for Graphcore’s Arm-based hardware platforms across lab and data center environments. This role focuses on supporting hardware bring-up, validation, and troubleshooting of complex AI compute platforms, including server blades, racks, and rack-scale infrastructure. The successful candidate will collaborate closely with engineering, platform, and data center teams to ensure the reliability and performance of next-generation AI systems. The Team The Systems Engineering and Hardware Engineering teams are responsible for enabling the bring-up, validation, and operational reliability of Graphcore’s AI infrastructure platforms. The team works closely with server engineering, firmware teams, platform architects, and data center operations to support the development, testing, and deployment of next-generation AI compute systems. This collaborative environment enables rapid problem-solving and continuous improvement of Graphcore’s hardware platforms from early development through production deployment.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Design and develop test plans, test cases and test scripts to validate Enterprise and Datacenter class NVMe SSD products. Work with Architecture, Design, Hardware and Firmware engineering teams to build and execute SSD validation test cases, triage failures, and drive it to resolution. Analyze project requirements and technical specifications for Non-Volatile Memory Express (NVMe) SSDs. Troubleshoot SSD and software integration issues, implement systematic approaches to reproduce and root cause the problem. Own development of test sequences and libraries to validate SSD. Review current test plans, coverage, and testing activities to drive both increased effectiveness and efficiencies across the product portfolio. Recommend and instrument new validation approaches that drive better end-to-end coverage, more accurate testing, and expanded testing services. Plan test schedules or strategies in accordance with project scope and delivery dates. Be able to demonstrate success in communicating status, issues, concerns, strategies of programs and projects - including development of appropriate indicators. Employer will accept a Bachelor's degree in Electrical Engineering, Electronics Engineering, Communications Engineering, or related field followed by 5 years of experience in job offered or in a related occupation. Position requires: 1. Test design and test case development 2. Test configuration setup 3. Execute test cases and report test results 4. Use of protocol analyzer 5. Creating and using scripts