SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today, SpaceX is actively developing the technologies to make this possible, with the ultimate goal of making life multiplanetary and expanding consciousness to the stars. SpaceXSI is building Super Intelligence to help humanity understand the universe. Our teams are building the full Super Intelligence stack: from our Colossus supercomputers, to Grok models, to our suite of applications, including Grok Bot, Grok Build, Grok Imagine, Grok Voice, and X. We're creating a powerful flywheel where more compute trains better models, better models power more useful products, and what we learn from people using those products shapes what we build next. ABOUT THE ROLE: Determine true root cause of fleet hardware failures — component and system level — and drive fixes through vendors to the manufacturer. Turn "swap it again" into "vendor redesign / firmware fix / manufacturing escape found." RESPONSIBILITIES: Own named failure classes across GPU trays/baseboards, NIC/DPU, motherboard/PCIe switch, memory, power, thermal, cables/connectors, and rack-scale patterns. Run recurrence analysis and fleet-wide defect clustering; detect systemic patterns before they become fleet-scale loss. Build vendor technical escalation packages with evidence quality that forces action; partner with OEM/ODM/component manufacturers on firmware, bring-up, and manufacturing escapes through committed CAPA. Feed findings into RMA policy, spare strategy, and "do not reseat forever" stop-rules. Work the FA intake queue on rotation; keep queue age within SLA BASIC QUALIFICATIONS: Bachelor's degree in Systems Engineering, Electrical Engineering, Computer Science, or a related field (or equivalent experience). 2+ years of experience in hardware reliability engineering, preferably in high-performance computing or data center environments. Proven expertise in fir
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1743 - This position is in Austin, Texas. Position Summary We are seeking an experienced Board-Level Hardware Validation Engineer to define and execute the validation and verification of complex electronic systems throughout the product lifecycle. This role is responsible for defining validation strategies, developing test plans, executing hands-on testing, analyzing failures, and working directly with ODM partners to ensure products meet performance, reliability, quality, and compliance requirements before mass production. The ideal candidate combines strong electrical engineering fundamentals with practical lab expertise and is comfortable personally performing validation activities while coordinating with cross-functional teams and manufacturing partners. Key Responsibilities Validation Strategy & Planning Define comprehensive board-level and inter-board validation plans based on product requirements, design specifications, and customer use cases. Develop validation methodologies covering functional, electrical, thermal, power, signal integrity, reliability, and stress testing. Establish test coverage, acceptance criteria, qualification requirements, and release gates. Review hardware architecture, schematics, component specifications, and interface topologies to identify validation risks early in the design cycle. Define incremental validation and regression coverage for component substitutions, design changes, and firmware updates. Hands-On Validation Execution Develop, automate, and execute validation tests on prototype and production-intent hardware. Perform board bring-up, functional verification, electrical characterization, and system-level integration testing. Validate communication interfaces, control signals, and timing requirements. Verify power sequencing, reset behavior, leakage current, and recovery across operating states. Execute temperature and voltage corner testing against approved operating limits. Use oscilloscopes, logic an
Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE As a Senior Hardware Design Engineer on the Datastore team, you will architect and launch our next-generation, high-performance solid-state storage solutions from concept to global mass production. Collaborating closely with cross-functional architecture, thermal, and joint development manufacturing (JDM) teams, you will pioneer high-speed hardware that directly reduces total cost of ownership (TCO) and energy consumption for our global customers. Your engineering leadership will fundamentally reshape data storage efficiency, transforming cutting-edge high-speed interfaces into reliable, market-ready enterprise products. WHAT YOU'LL DO Own End-to-End Productization: Lead SSD hardware design activities—including schematic design, component selection, and layout reviews—to successfully transition next-generation storage solutions from initial architecture through to mass production. Drive System Interoperability: Design and execute cross-platform interoperability testing across complex server/storage systems and SSDs to ensure seamless integration and industry-leading reliability. Resolve Complex System Trade-offs: Evaluate and optimize critical system-level tradeoffs across mechanical, thermal, power, and signal integrity (SI) parameters to maximize hardware efficiency. Spearhead Root Cause Analysis: Diagnose and resolve complex hardware issues and field escalations by collaborating with diagnostics engineers and e
About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are seeking an experienced Principal Hardware Diagnostics Engineer to design and develop diagnostics software used to monitor hardware health and diagnose system-level issues across Graphcore’s AI infrastructure platforms. This role focuses on building diagnostics agents, tools, and analytics frameworks that enable engineers and automation systems to identify, isolate, and resolve hardware issues across blade-level servers and rack-scale clusters. The Team Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. The Systems Engineering and Platform Validation team ensures Graphcore’s AI compute platforms are reliable, diagnosable, and operationally robust at scale. The team co
Who we are Lab37 Robotics , is a technology company focused on the development and deployment of robots designed specifically for direct-to-customer food production. Our mission is to revolutionize the food industry by creating innovative robotic solutions that enhance efficiency, quality, and customer satisfaction. We are passionate about pushing the boundaries of technology to deliver cutting-edge products that meet the evolving needs of our clients. What you’ll do As a Hardware Test Engineer at Lab37 Robotics, you will design, execute, and automate tests that prove out our system per NSF requirements and are reliable, and durable in real kitchens. You’ll translate food safety standard and operational best practices into clear test requirements, build fixtures and rigs (often with Raspberry Pi/Arduino or similar), and instrument systems with temperature, humidity, and other environmental sensors. Your work will uncover failure modes, validate component lifecycles, and drive design improvements that elevate product quality and guest experience. Responsibilities Convert food safety and regulatory requirements into testable specifications, acceptance criteria, and traceable test plans/protocols. Design and build test fixtures/rigs using Raspberry Pi/Arduino (or similar) for sensor logging, control, and automation. Execute environmental, thermal, humidity, ingress, cleaning/chemical exposure, wear/abrasion, and lifecycle/MTBF tests; analyze results and document findings. Develop automated data-logging and reporting for temperature/humidity profiles, duty cycles, etc. Run component and subsystem endurance testing (motors, augers, valves, seals, electronics) to characterize failure modes and recommend design or supplier changes. Partner with engineering and supply chain to resolve issues and conduct root-cause analysis. Maintain lab safety, calibration, and test asset management; publish test reports. What we’re looking for 3+ years in hardware/product val
NVIDIA's GPUs and SOCs are the world leaders in power, performance and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in the world through their contributions! This position will collaborate with Technical Package Lead and different design teams in the design and development of sophisticated, detailed layout of IC substrates for NVIDIA products. In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical design issues. What you'll be doing: As part of a Layout team, you will collaborate to implement high speed/density ASIC packages. Perform substrate breakout patterns for ASIC packages. Optimize package pinout incorporating system level trade-offs of pins assignment. Help perform package routing, placement, stack-up, reference plane and power distribution using Cadence APD or SiP tool suite. Propose layout design trade-offs to the Technical Package Lead for resolution and implementation. Conduct design feasibility studies to evaluate the Package design goals for size, cost, and system performance. Develop symbols and CAD library databases using Cadence APD design tools Develop methodologies to improve layout productivity What we need to see: Hold a B.S. Electrical Engineering or equivalent experience 5+ years experience in PCB Layout of graphics cards, motherboards, line cards or other related technology. Experience with HDI designs is a plus Proven experience in substrate layout of wire bond and flip chip packages, preferred Significant background with Cadence AP
NVIDIA’s GPUs and SOCs are the world leaders in power, performance, and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Mask Design Engineer who is committed to making a difference in the world through their contributions! This position will collaborate with Package Technical Lead and different design teams in designing and developing sophisticated, detailed layout of silicon interposers for NVIDIA products. In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical design issues. What you'll be doing: You'll collaborate cross functionally with package technical lead (PTL) and I/O signal integrity and technology engineers to deliver solution for product packages in tight schedule. Performing physical layout for silicon interposer using Cadence tools. Conduct design feasibility studies to evaluate the package design goals for size, cost, and system performance. Take part in studying layout floorplan and perform custom layout and verification against design rules and netlists. Propose layout design trade-offs to the PTL for resolution and implementation. What we need to see: Hold a B.S. Electrical Engineering or equivalent experience Minimum of 5+ years proven experience in Mask and Layout Design. Deep understanding of layout concepts in submicron CMOS technologies. You are an authority with Cadence layout tools - particularly Virtuoso. Knowledge of Integrity auto-routing is a plus. Experience running and debugging with verification tools such as Calibre, ICV, Thunder, etc. Proficient in scripting languages like Perl, Python, S
Toast creates technology to help restaurants and local businesses succeed in a digital world, helping business owners operate, increase sales, engage customers, and keep employees happy. The Android Systems team bridges the gap between hardware and software to build the foundational platform for Toast POS devices. The team develops the end-to-end software driving our device management product suite—including system applications, cloud-based services, and web user interfaces designed to secure and manage Toast's hardware ecosystem. We are seeking a Staff Software Engineer who is hands-on with coding, is able to design end to end systems, and will pave the path for the team to build modern technical solutions keeping customer empathy in mind. If you are a leader who collaborates well with teams within the organization, can think big, and are passionate about building software systems used to manage hardware devices with high focus on quality, this position is for you! About this roll* (Responsibilities): Hands-on design and implementation of Kotlin backend services to improve our device management workflows for customers. Lead the design and development of the next generation of Toast’s software services and applications to bring a seamless device configuration and user experience for customers. Collaborate with Product Management, Hardware, QA and other Software teams on the product roadmap and requirements to build a long term vision for Toast. Create technical requirements and detailed designs of the software system being developed. Lead effort estimation sessions and use sound judgment to enable planning of projects. Diagnose performance bottlenecks and implement optimizations. Make solid technical decisions keeping software quality, security, and maintainability in mind. Help set the standard for software quality by adopting modern software test frameworks and practices in day to day development. Do you have the right ingredients*? (Requirements): 8+ years of exp
Toast creates technology to help restaurants and local businesses succeed in a digital world, helping business owners operate, increase sales, engage customers, and keep employees happy. At Toast, we are committed to empowering our customers by providing the technology, resources, and community they need to thrive. While our roots are in food service, we are rapidly expanding into adjacent markets and international territories. Our mission is to build a world-class Device Management platform that supports the diverse needs of all Toast customers, regardless of their industry or location. As a member of the Android Systems team, you will bridge the gap between hardware and software to build the foundational platform for Toast POS devices. Whether it’s an international team looking to deploy a new on-device application, a customer needing a critical firmware update, an Enterprise group needing multi-location device tooling - our systems empower customers to set up, secure, and manage their devices from wherever they are. Why this team? Expanding the Vision : We are expanding our Mobile Device Management ecosystem—unifying firmware, on-device apps, and security controls into one cohesive platform. Frictionless Device Management : We are transforming the customer’s device lifecycle experience from out-of-the-box setup to continuous remote management, leveraging AI to dramatically reduce operator’s time spent troubleshooting and configuring devices. About this roll* (Responsibilities): Own the design and delivery of features across Toast's Android system applications in Kotlin and Java, including device policy enforcement, out-of-box device setup, and firmware and app updates. Write technical designs for features that span on-device apps, cloud services, and Toast hardware, and lead effort estimation and planning for your projects. Build reliable background services that run on devices with little to no user interaction, and deploy them safely to the Toast fleet using fe
About the Team OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI. The Compute team works on the design of our AI supercomputers, doing everything from workload modeling to influencing accelerator design. We’re leaning into our partnerships to make system and data center co-design an integral part of this process, and are looking for engineers to design AI supercomputers solutions for data center applications This team is responsible for working with partners to optimize their hardware for our workloads, identifying promising new deep learning accelerators, and bringing those hardware platforms to production. If you’re excited to work at the intersection of cutting edge deep learning, hardware system, and data center design this role is for you! About the Role We’re looking for a Product Reliability Engineer to own reliability engineering for advanced IT hardware, from printed circuit board assemblies (PCBAs) through compute and networking trays, systems, and fully integrated racks. You’ll translate operating conditions and service-life goals into reliability requirements, design and execute qualification tests, and drive failure analysis and corrective-action verification from development through production and field deployment. Working with electrical, mechanical, thermal, manufacturing, quality, and data center teams, suppliers, and manufacturing partners, you’ll use test and field evidence to improve hardware durability, serviceability, and availability. This role
About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for a product manufacturing engineer, who will be responsible for driving technical initiatives related to manufacturing to ensure product success from concept to launch and through mass production with a specific focus on PCB and PCBa manufacturing and process. You’ll have the opportunity to work with a wide range of stakeholders, from design engineering and operations teams,TPMs, external industry vendors and partners to ensure that all products are developed and delivered on time and to the highest quality standards. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: In this role, you’ll be responsible for driving manufacturing and quality initiatives to ensure product success from concept to launch Lead the product design and the manufacturing process for next-gen AI hardware system development, you will have the opportunity to work with a wide range of stakeholders, from design engineering and operations teams, TPMs and external industry vendors and partners to ensure that all products are developed and delivered on time and to the highest quality standards. Lead the team to establish NPI product manufacturing process, systems and quality controls, defining clear milestones and deliverables, drive internal process improvements across multiple terms and functions Provide hands-on product manufacturing analysis during desi
About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for signal integrity (SI) system design engineers who have a deep expertise in the SI area, and hold strong system level design knowledge This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Lead system signal integrity (SI) design for AI supercomputer product in the data center application. Collaborate with chip, package, boards, rack and system engineers, design partners to drive system SI design and develop innovative interconnect and high-speed technologies Identify and evaluate new technologies and methodologies to improve signal and power integrity in product design, and contribute to the development of new products and technology by providing expertise in signal integrity Perform simulation and modeling to identify and troubleshoot signal integrity issues Lead system interconnect design, bring up and qualification As the scope of the role and team grows, understand and influence roadmaps for hardware partners for our datacenter networks, racks, and buildings. You might thrive in this role if you: Have at least 10 years of industry experience, including experience design hardware system and SerDes testing for data center applications Have a strong bias toward action, and won’t take no for an answer. Have experience and good knowledge of system design experience in the SI areas, from chip, SerDes, board, rack level Have ex
Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE As a Hardware Manufacturing Test Engineer at Everpure, you will spearhead manufacturing test enablement for our next-generation enterprise hardware platforms from New Product Introduction (NPI) through high-volume production ramp. Operating with high autonomy, you will design robust test strategies and collaborate cross-functionally with Firmware, Diagnostics, and global factory teams to deliver market-ready, high-yield hardware infrastructure. Your expertise will directly optimize manufacturing throughput, improve release quality, and accelerate the global deployment of the industry-defining Everpure Platform. WHAT YOU'LL DO Own NPI & Sustaining Test Readiness: Drive end-to-end manufacturing test strategy, test sequence definition, and coverage validation for multiple hardware infrastructure variants to ensure seamless factory execution and build readiness. Lead Debug & Yield Optimization: Independently lead technical triage and resolve complex system-level test fallout during critical build phases, analyzing failure paretos to isolate root causes across hardware, firmware, and test infrastructure. Scale Test Architecture & Frameworks: Enhance and standardize the Design for Manufacturing (DFM) hardware test architecture by deploying reusable automation frameworks and consolidating test execution into shared platforms to minimize factory cycle times. Drive Vendor & Cross-Functional Alignment: Colla
Dear Candidate We have immediate vacancies for the post of Computer Hardware & Networking Engineer / System Admin / Desktop / IT Engineer / Tech support Engineer. Qualification : BE / B.Tech / Any Freshers and Experienced Salary : 4 Lakhs Per Annum to 9 LPA Contact Mr Vasanth Managing Director 7353549756 / 8722187029 Karnataka Information Solution No.6, Basement Floor, ASVNV Bhavan, Opp State Bank Of India, K.G Road, Majestic, Bangalore - 09 PH : 080 - 22260106.
Manufacturing Test Engineer – Server Hardware Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Austin, which will play a central role in Graphcore's work building the future of AI computing. Role Overview We are seeking an experienced Manufacturing Test Engineer to support high-volume server manufacturing from board-level test through system-level production test. This role will work closely with an ODM manufacturing partner to define, implement, validate, and optimize the manufacturing test strategy for L6 board-level products , including ICT, MDA, and Board Functional Test , as well as support L10 system-level manufacturing test . The ideal candidate has strong experience in server hardware manufacturing, Linux-based test environments, diagnostic test coverage, fixture requirements, yield improvement, and root cause corrective action processes. This role requires both technical depth and hands-on manufacturing execution experience, with the ability to drive best practices across test development, factory readiness, quality planning, and ongoing production support. Key Responsibilities Manufacturing Test Strategy and Planning Work with ODM partners to define and execute the manufacturing test strategy for L6 board-level production . Develop and review test plans covering: In-Circuit Test, or ICT Manufacturing Defect Analyzer, or MDA Board Functional Test Diagnostic coverage requirements Manufacturing line test flow Fai
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