System Performance Engineer Jobs

Guidance & Control Engineer (Associate or Experienced) Company: The Boeing Company The Boeing Company is actively seeking an Associate or Experienced Guidance and Control (G&C) Engineer (Level 2 or 3) in St. Charles, Missouri to support our Weapons programs. Within the Boeing Defense, Space & Security (BDS) Space, Intelligence & Weapon Systems (SI&WS) organization, the Weapons business is growing with multiple ongoing production and development programs serving the US Air Force, US Navy, US Army, and international customers. Selected candidates will work a wide range of Weapons programs that will provide state of the art G&C algorithms, performance analysis and simulation solutions to our customers, and will have visibility across the Boeing enterprise into modern G&C and simulation development methods. Come join the Boeing Team! Position Responsibilities: Gather and define system level requirements for Guidance and Control systems or missions/trajectories Perform design & analysis of Guidance and Control systems, simulations, models & tools Support design reviews, analyses, simulations and component / system testing to ensure delivery of products that meet or exceed customer requirements and expectations Support troubleshooting of delivered product operational / service anomalies and incidents Participate in new business development efforts Work under general supervision Basic Qualifications (Required Skills/ Experience): Bachelor of Science degree in Engineering, Engineering Technology (including Manufacturing Technology), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent quali

Our Purpose Mastercard powers economies and empowers people in 200+ countries and territories worldwide. Together with our customers, we’re helping build a sustainable economy where everyone can prosper. We support a wide range of digital payments choices, making transactions secure, simple, smart and accessible. Our technology and innovation, partnerships and networks combine to deliver a unique set of products and services that help people, businesses and governments realize their greatest potential. Title and Summary Lead Software Engineer - Java Backend Overview Be part of the Operations & Technology Fraud Products team developing new capabilities for MasterCard's Decision Management Platform, which serves as the core for multiple business solutions to combat fraud and validate cardholder identity. Our patented Java-based platform processes billions of transactions per month in tens of milliseconds using a multi-tiered, message-oriented approach for high performance and availability. • Would you like to develop industry leading solutions for fighting fraud? • Are you motivated by speeding business solutions to market? • Do you want to innovate, using cutting edge technologies on challenging business problems? Required Skills / Qualifications : • Overall career experience of 8-12 years into Software Engineering in Java • Demonstrates strong ownership and the ability to learn and adapt quickly. Proven ability to lead through influence by aligning others, driving decisions, and unblocking delivery. • Solid understanding of service and platform level system design (e.g. distributed systems, event driven architectures), advanced design patterns (e.g. dependency injection, lazy loading) and experience with open frameworks (e.g. Spring Boot). • Strong software engineering fundamentals with hands

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal Analog Design Engineer to lead the design, integration, and delivery of advanced analog and mixed-signal IPs for High Bandwidth Memory (HBM) products. This role is critical in developing and integrating high-performance analog subsystems within the HBM logic die, enabling industry-leading bandwidth, power efficiency, and reliability. As a principal engineer, you will provide deep technical leadership across analog design, IP integration, system alignment, and silicon execution, driving end-to-end success of HBM solutions. Responsibilities will include, but are not limited to: Lead the design and own critical HBM analog circuits, including: High‑speed transmitters and receivers Clock generation and distribution (PLLs, DLLs, CDRs) SerDes‑related analog blocks Biasing, reference, and calibration circuits Power delivery and regulation circuits (LDOs, regulators) Define and lead IP interfaces, power domains, clocking schemes, and reset strategies across subsystems Perform detailed pre‑layout and post‑layout simulations Conduct PVT, Monte Carlo, mismatch, and aging analyses Work closely with layout engineers to define floorplanning and symmetry requirements, ensure matching, shielding, and EM/IR compliance Review and sign off on analog layouts Drive layout‑aware build optimizations for advanced nodes <

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron Technology’s MCBU (Mobile & Client Business Unit) Systems Lab, where we focus on improving the performance and power efficiency of memory and storage devices for Edge platforms. As a Senior Engineer, Edge Systems Architecture, you will contribute significantly to crafting the future of our next-generation Memory/Storage solutions for Mobile and Client Customers. Here, you will work with innovative technologies and collaborate with a team of skilled professionals. Responsibilities Determine architectural needs of Memory/Storage Systems based on a competitive market analysis for Mobile and Client platforms. Innovate new solutions to complex system-level problems by collaborating closely with Engineering and Product Management teams, with both software and hardware expertise. Develop, evaluate, and optimize new memory/storage architectures to improve cost, performance, and power efficiency of Mobile and Client products. Define and measure cost, performance, and power metrics for Edge platforms, supported by detailed analysis. Understand and improve the architecture of Memory/Storage Controllers for efficient performance. Evaluate and demonstrate architecture trade-offs impacting memory/storage subsystem performance. Identify and implement AI-enabled opportunities to automate workflows, improve efficiency, and accelerate decision-making processes. Develop reusable AI-assisted workflows for benchmark data processing, perf

Work Flexibility: Hybrid or Onsite Stryker is hiring a Staff Software Quality Engineer, Post Market Integration endoscopy and communications business . I n this highly visible role, you will serve as a quality engineering leader for commercialized products, driving complex investigations, risk management activities, product quality improvements, and regulatory compliance across the product lifecycle. Partnering closely with R&D, Operations, Commercial, and Quality teams, you will lead customer complaint investigations, CAPA, change management reviews, and continuous improvement initiatives while leveraging software quality, SDLC, and quality system expertise to enhance product reliability, performance, and patient safety. This role is ideal for an experienced quality professional who thrives in a fast-paced, regulated environment and enjoys solving complex technical challenges that directly impact customers and healthcare outcomes. What you will do Serve as a subject matter expert for quality engineering, leading complex investigations, root cause analysis, risk management activities, and system-level problem solving. Lead customer complaint investigations, nonconformance, CAPA, product field actions, and other regulatory quality processes, driving effective corrective actions and product improvements. Partner cross-functionally with customers, commercial teams, operations, R&D, and quality functions to address critical product and process quality issues. Review and influence change management, design, and development activities by identifying risks, challenging effectiveness, and driving continuous improvement opportunities. Analyze quality and operational performance metrics to identify trends, prioritize actions, and improve product quality, reliability, and compliance. Appl

NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will help to build the high-performance processor elements that implement programmable compute and graphics functionality. What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs You will be responsible for verification of the ASIC design, architecture, golden models and micro-architecture using advanced verification methodologies such as UVM Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure and verify the correctness of the design Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks What we need to see: Bachelors Degree in EE, CS or CE or equivalent experience 2&#43; years of relevant experience Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies Background with design and verification tools (VCS or equivalent simulation tools, debug tools like Verdi, GDB) Experience crafting test bench environments for unit and system level verification Strong background in System Verilog or similar HVL Expertise with C/C&#43;&#43; programmin

Job Title Electrical Design Engineer 3 Job Description Electrical Design Engineer 3 (Gainesville, FL) As an Electrical Design Engineer 3 you will design, develop, and sustain medical systems and devices. Your role Analyzes hardware requirements and specifications to determine optimal design solutions for components in Philips products, ensuring alignment with performance and reliability standards, working under limited supervision. Develops, executes, and documents comprehensive test plans, design specifications, test results, procedures, and protocols to validate hardware designs, conducting thorough analyses and evaluations throughout the product development lifecycle, and maintaining accurate records for future reference and auditing purposes. Consults with cross-functional teams to identify, address, and resolve hardware design issues and constraints, fostering effective communication and alignment across departments. Contributes to new product development leveraging the latest technologies and novel methodologies, post consultation to confirm and align the objectives to ensure fulfillment of business requirements. Supports the development and implementation of hardware design improvements aimed at enhancing product quality, performance, and efficiency, leveraging insights gained from ongoing testing and evaluation processes. You're the right fit if: You’ve acquired 2&#43; years of experience in areas such as System Architecture, System Design, Hardware Engineering or equivalent Your skills include Schematic Simulation/Layout and PCB Design (Altium a bonus), Matlab, Embedded Design, Electromagnetic Wave and RF theory/application, IEC 60601-1, ISO 13485, ERP System (SAP a bonus), and PLM System (Windchill a bonus). You ha

We are seeking a Linux Systems Engineer to join our Infrastructure Engineering team, dedicated to supporting high-performance EDA compute farms. You will be responsible for designing, deploying, and maintaining enterprise-grade Linux environments across RPM-based distributions, optimized for the high-throughput requirements of EDA workloads. You will drive automation initiatives, and build robust tooling to support a highly available and scalable infrastructure. What you'll be doing: Linux Infrastructure Engineering: Maintain, tune, and secure mission-critical Linux operating systems across production and non-production environments. End-to-End Automation: Lead infrastructure configuration management and continuous deployment workflows using Infrastructure as Code, e.g. Ansible and Terraform . Tooling Development: Write high-quality, maintainable code in Python, Bash, or Go to automate repetitive operational tasks and integrate infrastructure telemetry. Naming & Storage Services: Manage Linux Naming Services (LDAP/SSSD) and networked storage (NFS, Autofs) environments to support high-performance EDA workloads. What we need to see: Linux Internals: 8&#43; years of deep systems engineering experience working with RPM-based Linux distributions. Bachelor's degree or equivalent work experience. Infrastructure as Code: Strong track record of automating end-to-end multi-tier infrastructure configurations and managing centralized deployments. Experience with more than one configuration management system is a bonus. Virtualization and Container Architecture: Deep understanding of virtualization and container internals

At Lyft, our purpose is to serve and connect. We aim to achieve this by cultivating a work environment where all team members belong and have the opportunity to thrive. Our transport network serves the needs of millions of people every day who want to get from one place to another using Lyft cars, bikes and scooters, or on foot in the most efficient way. To serve these needs, we need to suggest the fastest, most affordable and safest routes. We are hiring a Machine Learning Engineer to join our Routing team. Our team builds and maintains Lyft's system responsible for providing routes for every ride request on our platform. We process millions of route requests per day and low latency, high reliability and high accuracy are paramount for our success. If you are a critical thinker with experience in machine learning workflows and writing reliable code, passionate about solving business problems using data and working in a dynamic, creative, and collaborative environment, we are searching for you. Our technology stack runs on AWS, Kubernetes, Go, Python/C++, Apache Airflow, Flink, and Kafka. We use AI to improve development productivity, optimize customer support workflows, and enhance operational efficiency — all without compromising code quality or security. In this role, you will work with incredibly passionate and talented colleagues from software engineering, machine learning and data science on building rideshare experiences that delight millions of riders and drivers. Responsibilities: Perform data analysis and build proof-of-concept to explore and compare ML and non-ML solutions Be able to make effective tradeoffs between model accuracy, its productization complexity and runtime performance Develop statistical, machine learning, or optimization models Write production quality code that can scale well to serve millions of requests per day Participate in code reviews, design reviews, production on-call support and incident triaging process

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Contribute to the Development of New Memory Products by owning the overall logic design of the on-chip memory controller, including all optimizations and pathfinding. Responsible for meeting the performance/area/power targets Ability to interpret device and system specifications to produce required functionality Participate in new circuit conception and design as needed Define and build design architecture spec documents for the new features Architect, design, and integrate complex RTL blocks for sophisticated memory products, driving functionality from specification through verification and design closure. Develop and optimize synthesis and timing constraints, perform STA, and resolve timing challenges to meet performance, power, and area objectives. Back-end implementation activities including APR, timing closure, physical signoff readiness, and functional/timing ECO execution. Maintain Technical Expertise and provide training Define best known design and verification practices and communicate to the entire department Prepare detailed documentation as required Participate in recruiting, and interviewing new candidates Build new hire ramp up plans Engage in continuing education and competitor analysis Manage Verification Processes Perform RTL and synthesized netlist (gate level) verification at block, su

Job Title Principal Electrical Engineer- Medical Device Job Description As a Principal Electrical Engineer, you will be part of the multidisciplinary IntraSight Hardware Team, contributing to innovative imaging clinical solutions. You will serve as the key technical interface between Philips and external suppliers, design partners, and contract manufacturers for PCBA development, ensuring high-quality, reliable, and cost-effective electronic designs that meet performance, safety, quality, and regulatory requirements. Your role Serve as the primary electrical engineering interface to suppliers, design partners, and contract manufacturers, providing technical leadership for PCBA design, development, prototyping, and industrialization. Drive alignment on electrical requirements, schematics, PCB layout, architecture, acceptance criteria, timelines, cost, and quality. Lead supplier selection, technical evaluations, design reviews, and issue resolution in partnership with sourcing, procurement, and cross-functional engineering teams. Review and approve schematics, PCB layouts, and design documentation to ensure alignment with Philips standards and system architecture. Drive design for manufacturability (DFM), design for testability (DFT), design for cost (DFC), and component selection strategies while considering availability, lifecycle, obsolescence, and overall product cost. Manage supplier change requests and mitigate component and PCBA lifecycle risks. Oversee PCBA verification and validation, including functional, signal integrity, power integrity, electrical safety, and EMC testing, ensuring compliance with applicable medical device standards such as IEC 60601-1 and IEC 60601-1-2. Partner with quality and regulatory teams to ensure suppliers meet required quality systems, documentation, and regulatory expectati

Transform technology into opportunity as an F5 Administrator at Leidos. You will play a crucial role in configuring, maintaining, and troubleshooting F5 load balancing and traffic management systems to ensure high availability, reliability, and performance of critical applications and services for USCENTCOM on the CITS contract. The F5 Administrator is responsible for the configuration, deployment, and maintenance of F5 BIG-IP systems, ensuring the optimal performance, security, and availability of critical applications. This role involves hands-on technical work, troubleshooting complex F5-related issues, and collaborating with various IT teams to integrate F5 solutions within the broader network and infrastructure environment. The F5 Administrator will contribute directly to the mission success of USCENTCOM by maintaining robust and efficient application delivery services. Primary Responsibilities: F5 System Configuration & Maintenance Configure, deploy, and maintain F5 BIG-IP systems, including Load Balancers, Application Delivery Controllers (ADCs), and SSL offloading configurations. Design and implement traffic management rules, including global server load balancing (GSLB) and local server load balancing (LSLB). Manage F5 configurations for SSL/TLS offloading, including key and certificate management for secure communication. Configure and maintain F5 iRules to manage application traffic and provide enhanced functionality for specific use cases. Assist in performing F5 system upgrades, patches, and troubleshooting tasks to ensure continued system functionality. Assist in the design and implementation of new F5 solutions to improve application delivery, scalability, and security. Troubleshooting & Performance Optimization Troubleshoot and r

About the Team The Spark Platform team owns and operates DoorDash's Apache Spark ecosystem — the execution runtime, remote shuffle service, cluster scheduler, and reliability tooling that powers the company's data, analytics, and ML workloads. We run Spark across the company at significant scale and continue to expand the workloads, capabilities, and consumer base we serve. Orchestrating and operating thousands of Spark cluster deployments is a complex distributed system problem which the team invests heavily in runtime optimization, systems architecture, multi-tenant scheduling, and end-user tooling. About the Role As a Senior Software Engineer on Spark Platform, you will set the technical direction for our in-house Spark deployment and shape the architecture that will run DoorDash's data, analytics, and ML compute for the next five years and beyond. You will own the deep, cross-cutting problems that span the runtime, the shuffle service, the scheduler, and the overall service reliability — making the architectural calls that compound across the platform's lifetime. You will partner with the Engineering Manager on technical roadmap, hiring, and team shape, and act as the senior technical voice in cross-team partnerships with Data Engineering, ML Platform, and product engineering teams that depend on the platform. You must be located in San Francisco, Sunnyvale, Seattle, or New York City for this hybrid position. You will report into the Engineering Manager on our Spark Platform team. You're excited about this opportunity because you will… Set the multi-year technical direction for an in-house Spark-on-Kubernetes platform — runtime, shuffle, scheduler, reliability — and make the architectural calls that compound for years. Own the deepest distributed-systems problems on the team: shuffle architecture, multi-tenant scheduling, runtime performance, and the failure modes that only show up at scale. Partner with the Engineering Manager on technical roadmap, hiring, inte

About the Team The Spark Platform team owns and operates DoorDash's Apache Spark ecosystem — the execution runtime, remote shuffle service, cluster scheduler, and reliability tooling that powers the company's data, analytics, and ML workloads. We run Spark across the company at significant scale and continue to expand the workloads, capabilities, and consumer base we serve. Orchestrating and operating thousands of Spark cluster deployments is a complex distributed system problem which the team invests heavily in runtime optimization, systems architecture, multi-tenant scheduling, and end-user tooling. About the Role As a Software Engineer on Spark Platform, you will execute across the surfaces of our in-house Spark deployment that serves the entire company. The work spans Spark runtime upgrades and performance, multi-tenant scheduling and executor bin-packing on Kubernetes, cluster lifecycle automation, and the observability and incident automation that keep the platform sustainable. You will move between layers as the work demands — picking up the next high-leverage problem regardless of where it sits — and partner closely with the rest of the team and with platform consumers across the company. You must be located in San Francisco, Sunnyvale, Seattle, or New York City for this hybrid position. You will report into the Engineering Manager on our Spark Platform team. You're excited about this opportunity because you will… Build and operate an in-house Spark platform that runs at company-wide scale, spanning runtime, scheduler, reliability, and user-facing tooling. Drive multi-tenant scheduling, executor bin-packing, and cost-aware placement that let a small team serve dozens of consumer teams. Own pieces of cluster lifecycle automation — provisioning, upgrades, capacity changes, and node-failure handling — at a scale where these stop being manual events. Build the observability and incident automation that make the platform debuggable end-to-end and keep on-call sus

Zoox is on an ambitious journey to develop a full-stack autonomous mobility solution for cities and safely deploy such a robotaxi solution. We are seeking a highly motivated Software Development Engineer in Test (SDET) to join the Release Management Team. As a Software Development Engineer in Test on the Release Management team at Zoox, you will help accelerate our software release by ensuring that we are shipping the safest and most reliable software possible. As developers build new features, you will be responsible for developing Hardware-In-Loop tests to support our safety case. These efforts are critical to maintaining our code quality and ensuring our service capabilities are operating as intended. Your ability to understand the overall system design and component interaction to help guide test methodology for functional and safety sign-off is crucial to the overall success of Zoox. Accountability and integrity are core to our team. This role is coding-intensive, focused on building solutions for high-fidelity testing, scalable automation frameworks, and sophisticated data analysis tools to ensure successful compliance to requirements and mission success. In this role, you will: Lead the design, development and maintenance of large-scale event-driven software/hardware -in-the-loop (SIL/HIL) tests and testing frameworks, utilizing advanced software patterns to improve modularity and reduce code duplication. Architect and manage end-to-end continuous integration (CI) pipelines to automate the execution of regression suites. Lead root cause analysis for complex system-level failures, developing log mining scripts and visualization dashboards (e.g., Grafana, SQL-based notebooks) to triage failures and track performance metrics. Perform gap analyses between high-level safety requirements and technical test implementations, including the development of intricate timing and prioritization patterns. Lead end-