System Test Enablement Manager Jobs

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Senior/Staff Firmware Test Engineer in the Solid State Drive (SSD) group at Micron Technology, you will help ensure our SSD products have world-class performance and reliability. This outstanding opportunity allows you to collaborate with skilled experts to build flawless SSD firmware for enterprise and automotive markets. Your ambition and proven expertise will help us develop innovative solutions and advance technology. Responsibilities Build comprehensive firmware verification plans for various firmware features. Develop white/ grey-box, known, and closed system testing methods to verify and validate firmware products. Analyze failures from weekly regressions and perform root-cause analysis, requiring deep SSD domain expertise. Manage test development, test deployment, test automation, and reporting activities. Communicate challenges, solutions, and mitigation plans to cross-functional teams and management with clear and effective communication of both technical and non-technical topics. Participate in code reviews and guide the team to ensure comprehensive coverage and accurate architectural build. Establish strong working relationships with firmware development engineers to improve code quality. Lead a team of t

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities: Reliability Test Flow Development: Define and develop reliability stress, test flows and test plans to cover all Product Reliability aspects. Reliability Test Plan and Execution: Work closely with Global Quality team to define qualification plan, review and manage the qualification execution progress, and drive for qualification gating issue resolution. DPM reduction : Drive down and achieving Extrinsic Reliability (Time 0 and Field DPM) and Intrinsic Reliability through Optimized Manufacturing Test Flows and Test Strategy to meet critical KPI’s Quality, Cost and Cycle Time Root Cause and Resolution of Qual and RMA Device Issues pertaining to defectivity and intrinsic reliability: Debug and identify root cause and failures in reliability tests by electric failure analysis(EFA) and Physical Failure Analysis (PFA) and drive for resolution and improvements through cross functional team collaboration. Process Conversions and HVM: The role involves providing recommendation to fab teams for new process conversions to reduce cost, increase yields. This is critical as it directly impacts the yield, quality, reliability, and performance of HBM products, which are key components in many modern technologies.</li

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key leader within High Bandwidth Memory (HBM) Product Engineering Media Health team, you will spearhead and develop a high performing team driving Media Health Manufacturing and activities for Micron’s latest HBM products, both on DRAM and Interface die and a stacked product. You will lead a portfolio of Best-In-Class Next Generation HBM Product focused on the critical KPI’s Quality, Cost, Cycle Time and Scale. This include lead the manufacturing test flow development and validation, improve the device/stacked yield with most optimized extrinsic and intrinsic reliability through in depth circuit debug, test coverage optimization and strategy innovation, test time improvement for manufacturing flow and drive the DFT (design for test) strategy to stage new ideas to improve cost, cycle time and quality. You will also collaborate with cross functional team (Fab, Product Leads, Design, Technology Development, Design, Test Solution Engineering etc) with diverse expertise to achieve both strategic and tactical objectives and stay ahead on technology and product leadership. The future of HBM are exciting and dynamics. Micron is seeking experienced individuals that find technical challenges engaging and invigorating. Responsibilities: Optimized Test Coverage: The resp

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key leader within High Bandwidth Memory (HBM) Product Engineering Media Health team, you will spearhead and develop a high performing team driving Media Health Manufacturing and activities for Micron’s latest HBM products, both on DRAM and Interface die and a stacked product. You will lead a portfolio of Best-In-Class Next Generation HBM Product focused on the critical KPI’s Quality, Cost, Cycle Time and Scale. This include lead the manufacturing test flow development and validation, improve the device/stacked yield with most optimized extrinsic and intrinsic reliability through in depth circuit debug, test coverage optimization and strategy innovation, test time improvement for manufacturing flow and drive the DFT (design for test) strategy to stage new ideas to improve cost, cycle time and quality. You will also collaborate with cross functional team (Fab, Product Leads, Design, Technology Development, Design, Test Solution Engineering etc) with diverse expertise to achieve both strategic and tactical objectives and stay ahead on technology and product leadership. The future of HBM are exciting and dynamics. Micron is seeking experienced individuals that find technical challenges engaging and invigorating. Responsibilities: Optimized Test Coverage: T

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key leader within High Bandwidth Memory (HBM) Product Engineering Media Health team, you will spearhead and develop a high performing team driving Media Health Manufacturing and activities for Micron’s latest HBM products, both on DRAM and Interface die and a stacked product. You will lead a portfolio of Best-In-Class Next Generation HBM Product focused on the critical KPI’s Quality, Cost, Cycle Time and Scale. This include lead the manufacturing test flow development and validation, improve the device/stacked yield with most optimized extrinsic and intrinsic reliability through in depth circuit debug, test coverage optimization and strategy innovation, test time improvement for manufacturing flow and drive the DFT (design for test) strategy to stage new ideas to improve cost, cycle time and quality. You will also collaborate with cross functional team (Fab, Product Leads, Design, Technology Development, Design, Test Solution Engineering etc) with diverse expertise to achieve both strategic and tactical objectives and stay ahead on technology and product leadership. The future of HBM are exciting and dynamics. Micron is seeking experienced individuals that find technical challenges engaging and invigorating. Responsibilities: Optimized Test Coverage

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a highly skilled and motivated Senior Design Verification Engineer to join our team. In this role, you will be responsible for the end-to-end verification of our IOMMU (Input/Output Memory Management Unit) IP. You will play a critical role in ensuring the functional correctness and performance of the design, taking ownership of the verification process right from the initial specification understanding down to final coverage closure. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have hands-on experience in ASIC or SoC verification using SystemVerilog and UVM. You enjoy debugging complex design and verification issues and working closely with cross-functional teams. You’re comfortable building verification environments from scratch and driving coverage closure. You have familiarity with standard bus protocols and modern verification tools. What We Need Experience owning block or subsystem-level verification from test planning to sign-off. Strong understanding of constrained-random verification, coverage analysis, and regression debugging. Familiarity with proto

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key leader within High Bandwidth Memory (HBM) Product Engineering Media Health team, you will spearhead and develop a high performing team driving Media Health Manufacturing and activities for Micron’s latest HBM products, both on DRAM and Interface die and a stacked product. You will lead a portfolio of Best-In-Class Next Generation HBM Product focused on the critical KPI’s Quality, Cost, Cycle Time and Scale. This include lead the manufacturing test flow development and validation, improve the device/stacked yield with most optimized extrinsic and intrinsic reliability through in depth circuit debug, test coverage optimization and strategy innovation, test time improvement for manufacturing flow and drive the DFT (design for test) strategy to stage new ideas to improve cost, cycle time and quality. You will also collaborate with cross functional team (Fab, Product Leads, Design, Technology Development, Design, Test Solution Engineering etc) with diverse expertise to achieve both strategic and tactical objectives and stay ahead on technology and product leadership. The future of HBM are exciting and dynamics. Micron is seeking experienced individuals that find technical challenges engaging and invigorating. Responsibilities: Optimized Test Coverage: <span

About the Team The Agent Safety team works to ensure that increasingly capable AI agents act safely, exercise sound judgment, and remain aligned with user intent. Our mission is to reduce the probability of severe unintended outcomes from increasingly capable AI agents while preserving their ability to act effectively and autonomously. Our work spans three areas: Training: Create training methods, environments and data that teach agents to make better decisions in consequential situations. We turn real-world failures into training signals that prevent similar incidents, and identify precursor behaviors and mitigations to address emerging risks. Measurements: Build evaluations and production metrics that identify emerging risks and measure whether our interventions work. Oversight: Develop oversight and system mitigation mechanisms that reduce harmful actions while preserving useful agent autonomy (for example future versions of auto-review ). About the Role This role focuses on oversight and system-level mitigations that enable increasingly capable agents to operate safely and autonomously in real environments. We prioritize building oversight systems that are used in practice today, both internally and externally (see our recent work on action monitoring for codex and former code review ). We also study longer-term questions about how increasingly capable agentis systems can be supervised, constrained, and corrected. We’re looking for a safety&security minded researcher or engineer who can reason rigorously about security boundaries and agent behavior, then build and test practical mitigations. A background in AI control or security is welcome but not required. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Design, build, and evaluate system-level controls for agent actions like agent-based review. Plan how they fit in a broader system

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Design Verification Engineer to validate the System Management Controller (SMC) and enable seamless multi-chip integration. In this role, you will design and execute tests, build infrastructure, and debug issues across chiplet-based SoCs. You’ll have the opportunity to work with remote mentorship while contributing to the foundation of scalable multi-die systems. This role is hybrid, based out of Toronto, Ontario, Boston, MA or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Proficient in SystemVerilog, SV-UVM, Python, and C/C++ with strong verification skills. Experienced in writing test plans, building infrastructure, and debugging hardware/software flows. Comfortable working with remote mentorship and distributed teams. Familiar with AI-assisted tools like Copilot, Cursor, and Claude to accelerate verification. What We Need Develop and maintain SMC tests and supporting DV infrastructure. Write, execute, and track test plans for chiplet and multi-chip SoC designs. Use C/C++ to develop tests compiled, loaded, and executed directly on the DUT. Triage, analyze, and debug issues in clos

Experienced Electro-Optical Infrared Design, Assembly, Integration, and Test Engineer Company: The Boeing Company Boeing Defense, Space and Security (BDS) is looking for an Experienced Electro-Optical Infrared Design, Assembly, Integration, and Test Engineer (Level 3) to join our team in Huntington Beach or El Segundo, California. This position will be joining a team of engineers, analysts and staff within the Space and Missile Systems (SMS) and Boeing Technology and Innovation (BTI) Mission Systems organizations in the development, assembly, integration, and test of a constellation of satellites. The SMS and BTI organizations develop and capture technology for designing disruptive Mission Systems solutions. Focused on visible and infrared spectrum Electro-Optics Infrared (EO/IR) sensors operating in Space and Air domains, our growing team is leaping ahead of our competition with an exceptional mix of mission architectures, sensor designs, and algorithms for advanced image and data processing. Position Responsibilities: Develops and validates requirements for various communication, sensor, electronic warfare and other electromagnetic systems and components Develops and validates electromagnetic requirements for electrical\electronic systems, mechanical systems, interconnects and structures Develops architectures to integrate systems and components into higher level systems and platforms Performs trade studies, modeling, simulation and other forms of analysis to predict component, interconnects and system performance and to optimize design around established requirements Defines and conducts tests to validate performance of designs to requirements Manages appropriate aspe

About the job Validate the memory and system interfaces that keep advanced AI compute reliable under real product conditions. As a Validation and Debug Engineer, you will help prove Graphcore silicon and platforms work across the conditions our customers need. You will build deep understanding of our devices, boards and system behaviour. You will create and execute validation and debug plans for new hardware platforms. Your focus will include LPDDR5-9600, slow-speed interfaces, PCB issues, power behaviour and signal integrity. This is hands-on lab work with real ownership. You will investigate failures, tune memory subsystems and turn complex findings into clear actions across hardware and firmware. The team and culture You will work with Architecture, Silicon Engineering, Hardware Engineering, Firmware, PCB design, power and signal integrity teams. Progress comes through lab evidence, practical judgement and clear debug reports. The team moves quickly because the problems are real and often complex. You will own bring-up activity, drive root cause analysis and keep issues moving across teams. Decisions are made close to the data. You will be expected to speak up, challenge assumptions and help teams choose the right corrective action. What we’re looking for · Strong hands-on hardware debug experience, including board bring-up and subsystem debug · Experience validating and tuning LPDDR memory subsystems, ideally including LPDDR5 · Ability to debug PCB, power, signal integrity and interface issues through to root cause · Knowledge of DDR training, timing optimisation, margin analysis, eye diagrams and stability validation · Confident use of lab instrumentation, including high-bandwidth oscilloscopes, BERT systems and VNA/TDR equipment · Ability to work independently, take responsibility and drive issue resolution across hardware and firmware teams While we have outlined a set of requirements, we value transferable skills and diverse experiences. If you meet most of

About the job Build the test systems that prove advanced AI hardware is ready before it reaches production. As a Test Development Engineer, you will create and maintain test systems for Graphcore’s electronic hardware platforms. Your work will support preproduction test solutions across system and board-level products. You will define test methods, specify equipment and automate systems for complex hardware. This includes high-speed serial links, high-current power supplies, slower protocols and low-level PCBA debug. This role sits close to real engineering problems. You will build deep product knowledge, improve test coverage and help transfer robust solutions into production. The team and culture You will join the Hardware Test team, embedded within Graphcore’s wider Hardware Engineering group. The team works closely with SI, mechanical, layout, package, silicon, firmware and production teams. Work moves through practical test design, lab debug, automation and clear data. You will be trusted to take ownership and develop solutions that meet real hardware needs. The team values proactive communication across Graphcore and third-party support teams. Decisions are shaped by evidence, standards knowledge and the quality of the test data. What we’re looking for · Experience developing and automating test systems for complex electronic systems · Knowledge of Ethernet and/or PCIe testing, including high-speed hardware debug · Fluency in test scripting languages, including Python and LabView · Ability to plan test work, improve coverage and communicate progress clearly · Hands-on experience with lab equipment such as oscilloscopes, BERTs and VNAs · Strong ownership, teamwork and communication skills across technical teams While we have outlined a set of requirements, we value transferable skills and diverse experiences. If you meet most of our essential criteria, we encourage you to submit an application and showcase how your background makes you a strong candidate. Benef

About the job Debug the high-speed interfaces that decide whether advanced AI systems perform in the real world. As a Validation and Debug Engineer, you will help prove Graphcore silicon and platforms work across real product conditions. You will build deep knowledge of our devices, boards and system behaviour. You will own hands-on validation and debug in the lab, focused on SerDes, PCIe Root Complex and Ethernet. Your work will help resolve complex issues across silicon, hardware, firmware and architecture teams. This role is for someone who enjoys getting close to the hardware. You will tune links, investigate failures and turn difficult lab findings into clear engineering decisions. The team and culture You will work closely with Architecture, Silicon Engineering, Hardware Engineering and Firmware. Progress comes through practical evidence, clear communication and fast problem solving. The team expects ownership without daily oversight. You will drive bring-up, debug issues and help teams reach decisions based on data. You will be trusted to speak up when something is unclear or risky. The best ideas can come from anyone close to the problem. What we’re looking for · Strong hands-on hardware validation experience, including board bring-up and subsystem debug · Experience validating and debugging Ethernet, PCIe Root Complex and SerDes systems · Confident use of lab instrumentation, including oscilloscopes, BERT systems, VNA/TDR equipment and PCIe protocol analysers · Ability to debug signal integrity, protocol-level and interface issues through to root cause · Experience with PCIe bring-up, LTSSM analysis, link training, equalization tuning and interoperability testing · Ability to work independently, take responsibility and drive issue resolution across teams While we have outlined a set of requirements, we value transferable skills and diverse experiences. If you meet most of our essential criteria, we encourage you to submit an application and showcase how you

Senior: GBP 73,500 - 99,500 Staff: GBP 97,300 - 131,700 Subject to alignment to the responsibilities and duties of the role - we currently have multiple positions available at both Senior and Staff level. About the job Build the Linux distribution foundation that turns upstream software into trusted Graphcore platform releases. You will help create the Linux distribution that powers Graphcore AI systems. The team produces production-ready system images from proven upstream distributions. Your work will shape how releases are built, validated and prepared for deployment. You will strengthen the engineering path from upstream Linux software to dependable platform releases. You will build and improve automated pipelines, run established Linux test suites, and diagnose issues across build and validation flows. As the platform evolves, you will introduce controlled configuration and tuning changes with evidence-led validation. This is hands-on systems engineering with visible impact. You will help define reliable processes for a new team building a critical part of Graphcore’s platform. The team and culture You will join one of Graphcore’s newest engineering teams, helping shape its culture from the start. It is a small, co-located team where ownership matters and progress is visible. Work happens through close technical discussion, practical problem-solving and evidence-led decisions. Ideas are challenged openly, and the best path wins regardless of hierarchy. You will report to a leader who values technical credibility and invests in people’s growth. The team moves with pace, takes responsibility and changes direction when the evidence demands it. What we're looking for Strong practical experience working in Linux environments Experience building or maintaining automated CI/CD pipelines for reliable engineering workflows Proficiency in Python, Bash or similar

Senior: GBP 73,500 - 99,500 Staff: GBP 97,300 - 131,700 Subject to alignment to the responsibilities and duties of the role - we currently have multiple positions available at both Senior and Staff level. About the job Build the Linux distribution foundation that turns upstream software into trusted Graphcore platform releases. You will help create the Linux distribution that powers Graphcore AI systems. The team produces production-ready system images from proven upstream distributions. Your work will shape how releases are built, validated and prepared for deployment. You will strengthen the engineering path from upstream Linux software to dependable platform releases. You will build and improve automated pipelines, run established Linux test suites, and diagnose issues across build and validation flows. As the platform evolves, you will introduce controlled configuration and tuning changes with evidence-led validation. This is hands-on systems engineering with visible impact. You will help define reliable processes for a new team building a critical part of Graphcore’s platform. The team and culture You will join one of Graphcore’s newest engineering teams, helping shape its culture from the start. It is a small, co-located team where ownership matters and progress is visible. Work happens through close technical discussion, practical problem-solving and evidence-led decisions. Ideas are challenged openly, and the best path wins regardless of hierarchy. You will report to a leader who values technical credibility and invests in people’s growth. The team moves with pace, takes responsibility and changes direction when the evidence demands it. What we're looking for Strong practical experience working in Linux environments Experience building or maintaining automated CI/CD pipelines for reliable engineering workflows Proficiency in Python, Bash or similar