Validation Engineer Jobs

About Graphcore Graphcore is a global leader in artificial intelligence computing systems. We design advanced semiconductors, software, and data center systems that provide the specialized processing power needed to advance AI while improving the efficiency required for broad adoption. As part of SoftBank Group, Graphcore belongs to a family of companies developing transformative technologies. Our U.S. engineering teams contribute to the hardware and software platforms that support the next generation of AI systems. The Opportunity We are looking for a computer engineering, electrical engineering, or computer science student or recent graduate to join the BMC Development team as a Firmware Engineering Intern. You will work with experienced engineers on low-level and embedded firmware that supports the operation, control, and manageability of advanced compute systems. This internship provides hands-on experience in firmware development, test automation, engineering experiments, and lab-based system testing in a Linux development environment. You will own clearly defined technical tasks with guidance from the team and contribute to production-quality engineering work. Type: 12-week summer internship Timing: May - August (exact dates to be confirmed) Commitment: Full-time What You Will Do Contribute to the design, implementation, and testing of system and embedded firmware. Develop and maintain firmware and supporting software in C, C++, or Python. Support firmware development and debugging in a Linux-based engineering environment. Create automated tests and scripts that improve firmware validation, test coverage, and engineering efficiency. Contribute to continuous integration and delivery workflows for firmware development and testing. Plan and conduct well-defined engineering experiments, record results accurately, and draw conclusions from test data. Support lab setup, system configuration, hardware bring-up, and firmware testing. Use debugging and diagnostic techn

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. As a PCB Power Design Engineer, you will design and optimize power distribution systems for Tenstorrent’s next-generation AI accelerator cards, balancing performance, area, cost, and reliability. You will contribute across the full power design lifecycle, from component selection and simulation through board bring-up, validation, debugging, and production readiness. Working closely with hardware, firmware/software, thermal, mechanical, and validation teams, you will help deliver robust power architectures for high-performance AI systems. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An electrical engineer with experience designing, analyzing, and debugging power distribution systems for high-performance or high-power products. A hands-on engineer who enjoys moving from schematics and simulations into lab bring-up, testing, troubleshooting, and design validation. A systems-oriented collaborator who can work effectively across hardware design, firmware/software, thermal, mechanical, and validation teams. A detail-oriented problem solver who balances electrical performance, power integr

NVIDIA is seeking a QA Engineer to join our Cloud Testing team. As part of the broader QA organization, you’ll focus on testing the software layer that enables NVIDIA’s products to achieve industry-leading benchmarks in performance and quality. This role involves hands-on testing of cutting-edge cloud and networking features, learning new technologies, and contributing to both manual and automated validation efforts. What You’ll Be Doing: Design, develop, and execute test plans for new features across software and update releases Identify and report bugs, assist in reproducing issues, and collaborate with R&D to isolate root causes and validate fixes Perform a variety of tests including functional, regression, performance, and security testing Analyze network flows and debug issues through log and system analysis Develop automation scripts and contribute to building scalable test infrastructures What We Need to See: Practical Engineer / BA / BSc in Computer Science or a related field 1–3 years of relevant work experience Proficiency in scripting and automation languages such as Python, PyTest, or Bash Strong hands-on experience with Linux systems Ability to work independently, take ownership, and execute tasks effectively Willingness and availability to work with physical lab setups Strong verbal and written communication skills in English Ways to Stand Out from the Crowd: Experience with containerized environments (Docker, Kubernetes) Familiarity with DevOps practices and CI/CD pipelines using Jenkins or GitLab Understanding and experience with Agile and Scrum methodologies A collaborative team player with a proactive and leadership-oriented minds

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Design Engineering organization is dedicated to creating world‑class memory and storage solutions through sophisticated digital and analog circuit innovation. Our teams span the globe and collaborate across technology development, product design, systems architecture, and validation to deliver industry‑leading semiconductor products. The Principal Design Engineer plays a key role in developing, analyzing, and optimizing circuit designs that power Micron’s next‑generation memory technologies. This role partners closely with diverse teams—including Product Engineering, Test, Probe, Process Integration, Assembly, and Marketing—to ensure best‑in‑class performance, quality, cost efficiency, and time‑to‑market. Responsibilities: Design and optimize memory circuits from gate‑level to full chip implementations. Lead development of schematic blocks such as memory arrays, control logic, address decode, datapath, and internal test logic. Perform advanced circuit simulations using industry tools (e.g., SPICE, VERILOG) to validate performance. Drive architectural decisions related to power, speed, die area, and overall circuit performance. Collaborate with technology development and business units to define design rules, device requirements, and validation strategies. Minimum Qualifications: Bachelor’s degree in Electrical Engineering, Computer Engineering, or related technical field (or equivalent practical experience). Experience in se

NVIDIA's accelerated computing platforms move data at speeds that push the limits of what silicon and physics allow. Whether a high-speed interface trains reliably, maintains accurate margins, and survives every platform topology it will ever see is a question we answer ourselves. This role does that work. The Silicon Co-Design Group leads the boundary between what was designed and what was built. When a GPU, CPU, or SoC ships with interfaces that work at scale, this team is the reason. Most engineers debug within a layer. You will own the full stack. When an interface fails to train, the link margin is unexpectedly tight, or a customer reports a critical silicon issue, you trace the problem through protocol behavior, signal integrity, firmware, platform topology, and silicon marginalities. You then confirm that the fix works. Your methodology shapes how NVIDIA validates high-speed interfaces across generations. Your decisions affect yield, production ramp, and field quality. This is not a coordination role. The engineers who do it well hold protocol depth and system breadth simultaneously, never lose the thread across hardware, firmware, and software, and have the judgment to know when to go deeper and when to act. They are rare. Should that describe you, read on. What you'll be doing: Own post-silicon bring-up, characterization, validation, and debug of PCIe, NVLink, C2C, and other HSIO interfaces across NVIDIA GPUs, CPUs, and SoCs from first power-on through production readiness. Close the hardest failures. Drive root cause across protocol behavior, signal integrity, firmware and driver interactions, platform topology, and silicon marginalities and own every fix through to confirmation. Define validation strategy. Set test coverage, debug priorities, margining methodology, and stress criteria f

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. We are looking for an outstanding Compiler Engineer to help build the next generation of intelligent compiler technologies for NVIDIA's accelerated computing stack. Our team works at the intersection of compilers, agentic systems, numerical correctness, and verification to create systems that can reason about, generate, optimize, and validate code transformations across software and hardware boundaries. This is an excellent opportunity for new graduates who are excited about coding agents, AI-assisted software engineering, developer tools, and GPU computing. In this role, you will work with experienced engineers and researchers to build agentic systems and compiler-aware tooling that improve developer productivity, code quality, and system performance across NVIDIA's software and hardware stack. What you'll be doing: Build and improve coding-agent systems for tasks such as code generation, transformation, debugging, optimization, validation, and developer assistance. Develop agent workflows involving tool use, planning, memory, execution, and feedback loops for software engineering and compiler-related tasks. Help create training, evaluation, and verification environments to improve agent quality, correctness, r

We anticipate the application window for this opening will close on - 16 Oct 2026 Careers that change lives start here. Medtronic is a global leader in healthcare technology with a Mission to alleviate pain, restore health, and extend life. Our 95,000 employees work across more than 150 countries to put patients first — developing innovative medical technologies that improve the lives of 72+ million patients each year. Your unique talents will help shape the future of healthcare while building a career grounded in purpose, growth, and impact. A Day in the Life The Quality Engineering function within Service and Repair is responsible for ensuring compliance, product quality, supplier quality technical support and continuous improvement across service center and field service operations. This team partners closely with Engineering, Regulatory, Supplier Quality, Post-Market Quality, and Operating Units to support quality system requirements, continuous improvement initiatives, supplier management, audit readiness, and the introduction and sustainment of products throughout the service lifecycle. The Service & Repair Quality Engineer II provides quality engineering support for a global Service and Repair organization. This role partners cross-functionally to maintain compliance with quality system requirements, support daily operations, drive resolution of quality issues, support supplied products and processes, and ensure audit readiness across service center and field service activities. The Quality Engineer II also plays a key role in Corrective and Preventive Action (CAPA) activities, process validation efforts, and continuous improvement initiatives that support operational performance and product quality. This role is based in Rice Creek, Minnesota and requires onsite presence 5 days per we

Job Title Calibration engineer Job Description Job title: Calibration Engineer Your role: The Calibration Engineer Grade 40 is involved in the in-house and outsource calibration processes, evaluating, developing, establishing and maintaining calibration methodologies, systems, and practices which meet world class standards, investigations related to the calibration process and being responsible to maintain the calibration area under control, in compliance with the applicable external standards and provide support for NPI. You're the right fit if: (4 x bullets max) 1. Experience: 5+years of industry experience in Calibration 2. Skills: Calibration Engineer will work with Philips products and processes that require calibration and/or precision controls used in the development or manufacture of Image Guided Therapy medical devices or any other medical device that require calibration. it includes support to other Philips facilities. The Engineer is mainly involved in the in-house and/or outsource calibration processes, focusing on developing, executing and documenting equipment validation (Process Characterization, Installation Qualification and Operational Qualification), process validation or requalification (Performance qualification). Responsible for developing the calibration specifications for various equipment used by Philips facilities and staff. Development of calibration procedures and methods to support specifications, blueprints, drawings, and other technical requirements. Coordinate with internal customers and external service providers Be part of the problem-solving process if difficulties arise as part of the calibration process, it includes investigations like OOT, NCR and CAPA Maintain, review, and revise quality standards and help with development and redesign as

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. About the Role Join Micron’s Advanced NAND Technology (ANT) Singapore team to drive the future NAND technology roadmap through advanced pathfinding and integration. In this role, you will work in a cutting-edge R&D environment, developing next-generation memory technologies by bridging device concepts, materials, and process integration into manufacturable solutions. You will leverage AI-enabled data analytics and model-driven methodologies to analyze complex datasets, accelerate learning cycles, and solve critical scaling challenges, directly impacting future memory nodes. Key Responsibilities Drive 3D NAND integration and technology roadmap , leading pathfinding and advanced architecture enablement. Lead end-to-end development (conception → technology validation) including learning vehicles, characterization, and debug. Solve complex integration challenges using data-driven, AI-assisted, and model-based approaches , identifying critical technology gaps and enabling solutions. Define and optimize module/process architecture (electrical targets, process flows, design rules) to

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The HBM Design Technology Package Co-Optimization (DTPCO) organization is seeking a Staff Engineer! Lead the design and development of test vehicles that enable technology learning and risk reduction for future HBM products! This role serves as a key technical contributor within DTPCO, partnering closely with Architecture, Design, Layout, Product Engineering, Reliability, and Advanced Packaging teams to translate emerging product requirements and technology challenges into actionable test vehicle solutions. You will apply expertise in semiconductor design, physical implementation, silicon characterization, and advanced packaging technologies to define test structures, develop validation strategies, and generate data that drives product decisions across future HBM generations. Unlike a traditional product role centered on ownership of product blocks, this position emphasizes enabling learning in development and engineering. It does so by developing representative test vehicles and characterization structures. Key Responsibilities Serve as a technical lead for HBM test vehicle design and structure development within DTPCO. Partner with HBM product, technology and reliability team. Define and implement test structures targeting key learning areas such as package interaction and reliability Drive test vehicle content definition, structure specifications, measurement requirements, and validation objectives. Analyze silicon characterization and qualification results to identify optimization opportunit

Who we are About Stripe Stripe is a financial infrastructure platform for businesses. Millions of companies—from the world’s largest enterprises to the most ambitious startups—use Stripe to accept payments, grow their revenue, and accelerate new business opportunities. Our mission is to increase the GDP of the internet, and we have a staggering amount of work ahead. That means you have an unprecedented opportunity to put the global economy within everyone’s reach while doing the most important work of your career. About the team Abuse Control Engineering (ACE) is Stripe’s rapid-response technical defense and control incubator. When urgent abuse vectors emerge, ACE bridges the gap using real attacker telemetry to prototype, test, and deploy software safeguards before vulnerabilities can be exploited at scale. We partner closely with Fraud, Risk and Product Engineering to run rigorous experiments, balancing aggressive risk mitigation against legitimate user conversion. Operating as both a strike team and an incubator, ACE builds automated regression suites in partnership with Abuse Research to permanently block threat recurrence and seamlessly transfers mature controls to long-term product owners across Stripe. What you’ll do As an Abuse Control Engineer on the Abuse Control Engineering (ACE) team, you will design, prototype, and incubate technical defenses that safeguard Stripe’s financial ecosystem against complex, cross-cutting abuse vectors. Where emerging threat patterns identify Stripe product weaknesses, ACE steps in to rapidly build and experiment with technical safeguards. Driven by empirical evidence and Stripe’s FT3 (Fraud Taxonomy 3.0) framework, you will translate threat intelligence into hard technical control requirements (e.g., API rate-limiting, step-up challenges, parameter validation, pre-debit holds). You will carefully balance security and product velocity, running experiments to evaluate risk reduction against user conv

Who are we? Cohere is the leading security-first enterprise AI company. We build cutting-edge foundation AI models and end-to-end products that are designed to solve real-world business problems. We’re training and deploying frontier models for enterprises who are building AI systems. We believe that our work is instrumental to the widespread adoption of AI and we are looking for folks that want to be part of that. We obsess over what we build. Each one of us is responsible for contributing to increasing the capabilities of our models and the value they drive for our customers. Cohere is a team of researchers, engineers, designers, and more, who are all passionate about their craft. We are a global technology company headquartered in Toronto with key offices in London, New York City, San Francisco, Montreal, Paris, Berlin and Seoul. Join us! About the Role Are you passionate about secure-by-design software engineering? Do you want to be at the forefront of AI innovation and enterprise security? Cohere's North team is seeking a Software Engineer with a focus on security to join our mission and make a significant impact. This isn't a review-and-advise role, you'll own and ship production security features that customers rely on every day. Your Role: As a Senior Software Engineer with a security focus, you'll play a pivotal role in building and securing North's architecture. Your responsibilities will include: Software Development: Contributing to the core development of security features such as OIDC/OAuth flows and session management, ensuring North's AI agents are secure Secure Coding: Writing secure code to handle OIDC tokens, user claims, and sensitive data, adhering to best practices for JWT validation and encryption Authentication and Data Protection: Implementing authentication mechanisms including user login, token management, and authorization checks to maintain data integrity Tool Integration: Pulling in new tools to enhance North's security capabilities Dev

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a MTB IE Engine er, you will be responsible for 1. Cost Data Analysis with Optimization : 1) Ensure accurate cost through periodic audits and validation of area cost performance with dynamic models. 2) Continue to enhance system data accuracy with complex product mix to clarify various cost items. 2. Responsibilities and Tasks : 1) Ensure Fab cost is well positioned to meet Finance annual target at the manufacturing area levels. 2) Understand the impact to the driven by cost changes through bottom-up cost data analysis. 3) Work closely with MFG, Engineering and Supporting team to analyze "Plan-to-Actual performance comparison" by using statistical methodology and propose the mitigation plan to close the gap with stakeholders. 4) Deep study the underlying significance of cost item, further exploration of potential improvement and provision of appropriate recommendation to counterpart. 3. CIP Project : Join the continuously improvement project to optimize the workflow as well as cost management . 4. AI in Jo

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee