Validation Engineer Jobs

Job Details: Job Description: The Role and Impact As a CPU Performance Architect, you will play a pivotal role in shaping the future of Intel's cutting-edge CPU designs, driving innovation across high-performance computing and extreme low-power products. This position offers the unique opportunity to be at the forefront of technological advancements, defining and delivering architecture specifications that directly impact Intel's success and industry leadership. Your contributions will influence the performance, scalability, and efficiency of CPUs that serve diverse market segments, from enterprise solutions to edge computing devices. Through collaboration with cross-functional teams, you will invent novel microarchitectural approaches, overcome bottlenecks, and refine designs to meet stringent constraints and evolving demands. Your work will enable Intel to consistently push boundaries and deliver CPUs that meet and exceed customer expectations. Key Responsibilities Develops and drives end-to-end CPU microarchitecture specifications for highly optimized, modular, and scalable CPU based on hardware features, requirements, and interoperability of hardware and software throughout the product life cycle. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel microarchitectures for CPU. Models CPU performance and power characteristics and analyzes the bottlenecks of current performance features on workloads that reflect CPU future usage. Collaborates with architects, design, verification, and validation engineers during the execution of the project. Delivers definition of new microarchitecture and finds mitigations for issues that arise during feature implementation to improve the overall design of CPU and overcome bottlenecks and constraints. Participates in the

About the job Validate the memory and system interfaces that keep advanced AI compute reliable under real product conditions. As a Validation and Debug Engineer, you will help prove Graphcore silicon and platforms work across the conditions our customers need. You will build deep understanding of our devices, boards and system behaviour. You will create and execute validation and debug plans for new hardware platforms. Your focus will include LPDDR5-9600, slow-speed interfaces, PCB issues, power behaviour and signal integrity. This is hands-on lab work with real ownership. You will investigate failures, tune memory subsystems and turn complex findings into clear actions across hardware and firmware. The team and culture You will work with Architecture, Silicon Engineering, Hardware Engineering, Firmware, PCB design, power and signal integrity teams. Progress comes through lab evidence, practical judgement and clear debug reports. The team moves quickly because the problems are real and often complex. You will own bring-up activity, drive root cause analysis and keep issues moving across teams. Decisions are made close to the data. You will be expected to speak up, challenge assumptions and help teams choose the right corrective action. What we’re looking for · Strong hands-on hardware debug experience, including board bring-up and subsystem debug · Experience validating and tuning LPDDR memory subsystems, ideally including LPDDR5 · Ability to debug PCB, power, signal integrity and interface issues through to root cause · Knowledge of DDR training, timing optimisation, margin analysis, eye diagrams and stability validation · Confident use of lab instrumentation, including high-bandwidth oscilloscopes, BERT systems and VNA/TDR equipment · Ability to work independently, take responsibility and drive issue resolution across hardware and firmware teams While we have outlined a set of requirements, we value transferable skills and diverse experiences. If you meet most of

About the job Build the test systems that prove advanced AI hardware is ready before it reaches production. As a Test Development Engineer, you will create and maintain test systems for Graphcore’s electronic hardware platforms. Your work will support preproduction test solutions across system and board-level products. You will define test methods, specify equipment and automate systems for complex hardware. This includes high-speed serial links, high-current power supplies, slower protocols and low-level PCBA debug. This role sits close to real engineering problems. You will build deep product knowledge, improve test coverage and help transfer robust solutions into production. The team and culture You will join the Hardware Test team, embedded within Graphcore’s wider Hardware Engineering group. The team works closely with SI, mechanical, layout, package, silicon, firmware and production teams. Work moves through practical test design, lab debug, automation and clear data. You will be trusted to take ownership and develop solutions that meet real hardware needs. The team values proactive communication across Graphcore and third-party support teams. Decisions are shaped by evidence, standards knowledge and the quality of the test data. What we’re looking for · Experience developing and automating test systems for complex electronic systems · Knowledge of Ethernet and/or PCIe testing, including high-speed hardware debug · Fluency in test scripting languages, including Python and LabView · Ability to plan test work, improve coverage and communicate progress clearly · Hands-on experience with lab equipment such as oscilloscopes, BERTs and VNAs · Strong ownership, teamwork and communication skills across technical teams While we have outlined a set of requirements, we value transferable skills and diverse experiences. If you meet most of our essential criteria, we encourage you to submit an application and showcase how your background makes you a strong candidate. Benef

About the job Debug the high-speed interfaces that decide whether advanced AI systems perform in the real world. As a Validation and Debug Engineer, you will help prove Graphcore silicon and platforms work across real product conditions. You will build deep knowledge of our devices, boards and system behaviour. You will own hands-on validation and debug in the lab, focused on SerDes, PCIe Root Complex and Ethernet. Your work will help resolve complex issues across silicon, hardware, firmware and architecture teams. This role is for someone who enjoys getting close to the hardware. You will tune links, investigate failures and turn difficult lab findings into clear engineering decisions. The team and culture You will work closely with Architecture, Silicon Engineering, Hardware Engineering and Firmware. Progress comes through practical evidence, clear communication and fast problem solving. The team expects ownership without daily oversight. You will drive bring-up, debug issues and help teams reach decisions based on data. You will be trusted to speak up when something is unclear or risky. The best ideas can come from anyone close to the problem. What we’re looking for · Strong hands-on hardware validation experience, including board bring-up and subsystem debug · Experience validating and debugging Ethernet, PCIe Root Complex and SerDes systems · Confident use of lab instrumentation, including oscilloscopes, BERT systems, VNA/TDR equipment and PCIe protocol analysers · Ability to debug signal integrity, protocol-level and interface issues through to root cause · Experience with PCIe bring-up, LTSSM analysis, link training, equalization tuning and interoperability testing · Ability to work independently, take responsibility and drive issue resolution across teams While we have outlined a set of requirements, we value transferable skills and diverse experiences. If you meet most of our essential criteria, we encourage you to submit an application and showcase how you

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Engineer- Validation, at Micron Technology, Inc., your responsibilities will include: Define Test Plan, test cases and develop Test Scripts to validate SSD FW for Micron NAND based Systems and Solutions. Test areas will span across Functional, System level and Customer Qual centric tests. You would exhibit high degree of competency in understanding NVMe/PCIe specifications, NVMe Cloud SSD Specifications, along with understanding Customer specific requirements. You will be working in partnership with the Micron’s Hyperscale/Datacenter customers throughout the Product Life Cycle to improve the cycle time and customer quality of Micron’s SSD products. Be able to demonstrate success in communicating status, issues, concerns, strategies of programs and projects - including development of appropriate indicators. Must be able to deal with ambiguity and operate with little direction to meet defined goals. Must be able to work with and through others to achieve goals and task completion. Comprehend and articulate validation strategies, plans and status. Experience : 8-14 Years in Embedded firmware or 8+ years in SSD Product Validation would be a strong plus. Ability to work with Datacenter Compute and Storage solutions like Microsoft Hyper-V, VMware vSphere/VSAN is a strong plus, but not mandatory. Good hands-on experience in debugging NVMe Protocol issues using Lecroy/JDSU analyzers is must. Must have prepared good test plans involving IO workloads,

Principal Engineer - Validation — Bengaluru, India. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Design Validation Product Engineer on High Bandwidth Memory (HBM) technology you will be tasked with developing next-generation HBM products. Product Engineers are a key interface between Design, Manufacturing, Test, and Quality internal departments as well as external customers. We take ownership of HBM products; starting at the Design phase, through initial bring-up, qualification, and into volume production. The seniority level offered will be based on a combination of experience and education. In HBM HIG or equivalent experience (High Bandwidth Memory, Heterogeneous Integration Group), we innovate and integrate end-to-end groundbreaking front-end and backend processes with groundbreaking design, debugging various tests, and qualification techniques to develop the lowest power per bit solutions to improve customer experience in the field of ML (Machine Learning) and AI. The success of a sophisticated product such as HBM relies vastly on vertical integration and the various engineering working in unison. To provide greater detail, our HBM technology pertains to stacking numbers of DRAM chips along with a logic chip within one package through an assembly technology called TSV (Through Silicon Via). This greatly increases the memory density in a package, while allowing very high-speed signal transmission. Furthermore, "high bandwidth"; is an outstanding memory design area where custom gate-level design and RTL style logic design are blended into the same product, and most of the DDR or LPDDR design is based on the gate-level design onl

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Design Validation Product Engineer on High Bandwidth Memory (HBM) technology you will be tasked with developing next-generation HBM products. Product Engineers are a key interface between Design, Manufacturing, Test, and Quality internal departments as well as external customers. We take ownership of HBM products; starting at the Design phase, through initial bring-up, qualification, and into volume production. The seniority level offered will be based on a combination of experience and education. In HBM HIG or equivalent experience (High Bandwidth Memory, Heterogeneous Integration Group), we innovate and integrate end-to-end groundbreaking front-end and backend processes with groundbreaking design, debugging various tests, and qualification techniques to develop the lowest power per bit solutions to improve customer experience in the field of ML (Machine Learning) and AI. The success of a sophisticated product such as HBM relies vastly on vertical integration and the various engineering working in unison. To provide greater detail, our HBM technology pertains to stacking numbers of DRAM chips along with a logic chip within one package through an assembly technology called TSV (Through Silicon Via). This greatly increases the memory density in a package, while allowing very high-speed signal transmission. Furthermore, "high bandwidth"; is an outstanding memory design area where custom gate-level design and RTL style logic design are blended into the same product, and most of the DDR or LPDDR design is based on the gate-level design on

About the Team DoorDash Labs is an independent team within DoorDash. We explore robotics and automation to transform last mile logistics in the long term. If you have a passion for applying robotics solutions in a service used by millions of people, then we want to talk to you! About the Role We are hiring a Firmware Validation & Integration Engineer for our autonomy software team. This is a critical role to build robust and scalable validation for our firmware and systems to ensure reliability at every level. In this role, you will work with our electrical, firmware, and autonomy engineers to build the infrastructure and test suites required to validate the system. This includes designing and implementing our Hardware-in-the-Loop (HIL) simulation environments and automation frameworks from the ground up. You will report to the Autonomy Platform Lead on our Autonomy Platform Team at DoorDash Labs. We expect this role to be hybrid with some time in-office and some time remote. You’re excited about this opportunity because you will… Play an integral role on a small and focused team. Design and build Hardware-in-the-Loop (HIL) systems to simulate vehicle dynamics and sensor data for comprehensive firmware and system-level validation. Develop automated test infrastructure and software tools to exercise multiple embedded platforms throughout our robot system. Interface many layers of our control system including vehicle controls, power management, and motion control to ensure seamless system integration. Implement low-level test sequences and validation algorithms to safely stress-test vehicle components such as batteries, drive-train, and thermal management devices. Collaborate with cross-functional teams to identify edge cases and hardware-software corner cases that impact vehicle safety and performance. We’re excited about you because… BS/MS degree in Computer Science, Robotics, Electrical Engineering, or related technical field. 5+ years of experience in validati

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DRAM Technology group at Micron Technology develops and validates advanced memory solutions that enable the transformation of information into intelligence. The team operates in a collaborative, inclusive, and globally distributed environment, partnering closely with design, product, test, process, manufacturing, and quality organizations to deliver industry‑leading DRAM technologies. The Design Validation Product Engineer supports the validation of new DRAM products by focusing on real‑silicon behavior through bring‑up, characterization, and debug. This role builds a strong technical foundation in DRAM architecture, semiconductor devices, and validation methodologies while working closely with multi-functional engineering teams. Responsibilities Support DRAM design validation through silicon bring‑up, characterization, and validation testing of new memory products Analyze electrical and functional data to identify trends, marginalities, and failure mechanisms Assist with debug of validation issues using simulations, test results, and laboratory measurements Use engineering lab equipment and testers to characterize device behavior and performance Document validation results, test coverage, and observed behaviors while collaborating with design, test, manufacturing, and quality teams Minimum Qualifications Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field Strong fundamentals in digital logic,

NVIDIA Silicon Co-Design Group (SCG) is a wide-ranging, multi-functional team at NVIDIA. We sit at the crossroads of design, architecture, marketing, operations, and productization. Our contributions span from the architecture stage through final product definition. We architect solutions for Datacenter, Server, Gaming, Robotics, Automotive, and Embedded markets. We are fast-paced, collaborative, and focused on making groundbreaking, impactful products. We are seeking a Senior Silicon Validation Methodology Engineer for Low-Power (LPWR). You will own the department LPWR validation methodology across GPU, SoC, and CPU, from architecture to silicon to product. What you'll be doing: Own architecture, design, and first-use of end-to-end LPWR validation methodology from silicon to product, covering corners, edge conditions, variability, and real-world scenarios. Set the department standard for LPWR validation so it is reused across a broad array of silicon products. Define what needs to be tested, why, and how — including coverage bounds, PVT/variability, test-time vs. schedule, signoff criteria, milestone playbooks, and SOL(speed of light) expectations. Invent and land new LPWR validation approaches that go beyond extending an existing test plan. Challenge current paradigms on performance, power, idle vs. active behavior, and corner-case coverage, and drive the resulting methods, tools, and metrics into org default practice. Set LPWR validation strategy and policy across teams, including long-lead items that outlive a single execution cycle. Translate architecture and product goals into multi-generation methodology, infrastructure, and tool investments. Drive cross-functional consensus with Architecture, Design, Firmware, and Software under conflicting PPA, coverage, latency, and schedule priorities. Improve validation workflow at department scale by building and adopting automation, coverage m

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of a best-in-class family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from a diverse group of backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are seeking a senior validation lead engineer to lead at-scale rack validation efforts for next-generation AI hyperscale systems. This role focuses on post-silicon system validation across the full lifecycle, ensuring functional, electrical, and thermal performance meets product objectives. You will own end-to-end blade and rack validation including planning, development, execution, and debug while collaborating across firmware, systems, and hardware teams. The Team The Rack Validation team is responsible for ensuring system readiness and quality at scale. The team works cross-functionally with firmware, silicon, and system engineering teams to validate complex AI compute platforms. Responsibilities and Duties Lead post-silicon validation of AI compute blades and racks including test planning, development, and automation. Drive provisioning and integration of system components (SoC FW, BMC, RMC, OS) for rack-level readiness. Own execution against program achievements and report validation progress and risks. Triage test failures, collect debug data, and collaborate on root cause analysis. Track

Sr. Design Validation Product Engineer, DEG — Boise, ID - Main Site. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is a global leader in memory and storage innovation, accelerating the transformation of information into intelligence. The High Bandwidth Memory (HBM) Heterogeneous Integration Group (HIG) develops advanced memory solutions that power next-generation Machine Learning (ML), Artificial Intelligence (AI), and high-performance computing applications. Our team brings together experts across design, validation, manufacturing, test, and quality to deliver industry-leading products through a highly collaborative and innovative environment. As a Design Validation Product Engineer, you will play a critical role in the development and validation of next-generation HBM products from design through qualification and high-volume manufacturing. This position provides the opportunity to work at the intersection of semiconductor design, silicon validation, hardware and software debugging, and data analysis while collaborating with multi-functional teams around the world. The level of responsibility will be aligned with a combination of education, experience, and demonstrated technical capabilities. Responsibilities Develop expertise in JEDEC HBM specifications, internal architecture documentation, and HBM design schematics and layouts. Perform silicon validation and characterization of HBM products using laboratory equipment, circuit simulations, debugging techniques, and data analysis. Collaborate closely with Product Engineering, Design, Manufacturing, Test, Quality, and other multi-functional teams to id

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is a global leader in memory and storage innovation, accelerating the transformation of information into intelligence. The High Bandwidth Memory (HBM) Heterogeneous Integration Group (HIG) develops advanced memory solutions that power next-generation Machine Learning (ML), Artificial Intelligence (AI), and high-performance computing applications. Our team brings together experts across design, validation, manufacturing, test, and quality to deliver industry-leading products through a highly collaborative and innovative environment. As a Design Validation Product Engineer, you will play a critical role in the development and validation of next-generation HBM products from design through qualification and high-volume manufacturing. This position provides the opportunity to work at the intersection of semiconductor design, silicon validation, hardware and software debugging, and data analysis while collaborating with multi-functional teams around the world. The level of responsibility will be aligned with a combination of education, experience, and demonstrated technical capabilities. Responsibilities Develop expertise in JEDEC HBM specifications, internal architecture documentation, and HBM design schematics and layouts. Perform silicon validation and characterization of HBM products using laboratory equipment, circuit simulations, debugging techniques, and data analysis. Collaborate closely with Product Engineering, Design, Manufacturing, Test, Quality, and other multi-functional teams to id