Verification Director Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary As an MTS Design Verification Engineer, you will serve as a technical leader driving innovation in DRAM verification for advanced memory products. This role focuses on leading design and verification strategy, influencing key technical decisions, and ensuring high-quality, functionally correct, and scalable memory solutions. You will collaborate with global teams, guide methodology improvements, mentor engineers, and act as a domain expert to support next-generation DRAM technologies. Responsibilities Lead DRAM verification innovation, driving key technical decisions, architecture, and strategy during product execution Collaborate with global teams to define and implement best-known methods for verification and product development Drive verification planning, coverage closure, and silicon debugging for advanced DRAM products Evaluate and implement new tools, methodologies, and flows to improve verification efficiency and quality Mentor engineers and provide technical leadership while contributing expert guidance to senior leadership teams Minimum Qualifications Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field 8+ years of experience in DRAM/memory or advanced CMOS verification Strong circuit analysis and debug skills at the transistor level — able to root-cause behavior, not only at the testbench level Experience with simulation tools such as HSPICE, Finesim, Verilog, or SystemVe

Staff Engineer, HBM Verification Architecture — Richardson, TX. Apply via Workday.

Sr. Design Verification Engineer — Minneapolis, MN. Apply via Workday.

Who We Are Nuro believes self-driving vehicles are the most immediate and profound opportunity for AI to drive positive change in the physical world. Safer streets, more time for what matters, and easier access to the world around us, that’s why we’re building a universal autonomy platform: self-driving for all roads and all rides. Founded in 2016, Nuro is a physical AI company developing Level 4 autonomous driving technology for a wide range of vehicles, use cases, and markets. Powered by the Nuro Driver™, our universal autonomy platform enables the global mobility ecosystem to deploy autonomy at scale, from robotaxis and logistics fleets to personal vehicles. With years of real-world deployment experience and a flexible, partner-led business model, Nuro is working toward a future where millions of autonomous vehicles powered by our technology help make everyday life safer, easier, and more connected. Nuro has raised over $2B in capital from Uber, NVIDIA, Google, Softbank, Fidelity, T. Rowe Price, and other leading investors. About the Role As a Senior/Staff Software Engineer working on driving behavior verification, you are responsible for implementing metrics that evaluate the end-to-end behavior of the Nuro Driver. These metrics will be used to quantify the safety of the driving behavior in our target ODD. This requires prior experience with the development or verification of behavior planning/prediction systems for robots, and a collaborative nature to work closely with a variety of teams across Nuro: Systems, Onboard Software, Simulation, Product, and Operations. About the Work Develop and implement in Python generalizable metrics to verify the driving behavior of an autonomous vehicle. Leverage a combination of machine learning (ML) models and safety metrics from literature to evaluate the end-to-end driving behavior. Evaluate these metrics on a variety of tests: synthetic and log simulation, on-road logs, closed-course testing data, and third-party acc

Who We Are Nuro believes self-driving vehicles are the most immediate and profound opportunity for AI to drive positive change in the physical world. Safer streets, more time for what matters, and easier access to the world around us, that’s why we’re building a universal autonomy platform: self-driving for all roads and all rides. Founded in 2016, Nuro is a physical AI company developing Level 4 autonomous driving technology for a wide range of vehicles, use cases, and markets. Powered by the Nuro Driver™, our universal autonomy platform enables the global mobility ecosystem to deploy autonomy at scale, from robotaxis and logistics fleets to personal vehicles. With years of real-world deployment experience and a flexible, partner-led business model, Nuro is working toward a future where millions of autonomous vehicles powered by our technology help make everyday life safer, easier, and more connected. Nuro has raised over $2B in capital from Uber, NVIDIA, Google, Softbank, Fidelity, T. Rowe Price, and other leading investors. About the Role As a Senior/Staff Systems Engineer working on Autonomy Verification, you are responsible for verifying that the Nuro Driver is safe to deploy in our target ODD and complies with the rules of the road. This requires prior experience with the development or validation of autonomous systems, and a collaborative nature to work closely with a variety of teams across Nuro: Autonomy Software, Simulation, Product, and Operations. You will have end-to-end ownership from requirements definition, metrics design, and test strategy development. About the Work Create requirements for an autonomous system, ensuring safe operation within its ODD and compliance with the rules of the road. Design generalizable metrics and acceptance criteria to verify that the autonomous system satisfies these requirements, leveraging safety standards and methodologies. Propose and leverage diverse test strategies - synthetic and log simulation, on-ro

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Design Verification Engineer to lead pre-silicon verification of the Beowulf SoC, with focus on the Compute Subsystem (CSS), DDR memory subsystem, and Fabric NoC. This role will drive coverage, coherency, memory traffic, connectivity, error handling, and bring-up features critical to silicon success. This role is hybrid, based out of Boston, MA; Toronto, ON; or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Deeply curious about SoC architecture, compute systems, DDR behavior, and Fabric NoC/interconnect verification. Expert in UVM, SystemVerilog, coverage-driven verification, assertions, and subsystem-level debug. Experienced in verifying compute subsystems, DDR controllers and PHY-facing logic, NoC/interconnect protocols, coherency, ordering, and data movement. Comfortable with reset, power management, error handling, performance, and high-concurrency system scenarios. Proactive, detail-oriented, and effective in cross-functional technical discussions. Familiar with Python, C/C++, Tcl, CocoTB, or similar verification automation tools. What We Need Develop and own scalable verification environmen

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Design Verification Engineer to contribute to the unit-level verification of our RISC-V CPU front end—including instruction fetch, branch prediction, and surrounding fetch control structures. As a key individual contributor within our front-end DV team, you will focus on building testbenches, generating stimulus, and developing checkers for complex microarchitectural scenarios. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Front-End Experience: Solid background verifying CPU front-end blocks—such as instruction fetch, branch predictors (BTB, TAGE, RAS), instruction caches/TLBs, or decode—using SystemVerilog, UVM, and C++. Unit-Level Focus: Hands-on experience building clean, controllable unit testbench environments with precise stimulus and checking. Reusable Design: Pragmatic approach to building transactors, predictors, and scoreboards that can be reused across verification levels. Collaborative Problem Solver: Comfortable working alongside RTL designers to trace and fix misspeculation, redirect, and edge-case fetch bugs. What We Need Unit-Level Verifica

Executive - Billing handles the daily progress verification, progress reporting and processing of invoices, ensures accurate data entry, and supports financial reconciliation within the vertical. This role involves preparing and issuing detailed invoices, reviewing contracts for billing accuracy, maintaining billing system functionality, and resolving billing queries to uphold financial accuracy and streamline billing operations. Source: Adani Group | Job ID: 51824

Job Description Senior Manager – Operations (Background Verification, Pre-Medical Health Checkup & Onboarding) Function: Talent Acquisition / HR Operations Location: Adani GCC Reporting To: Head – Talent Acquisition / HR Operations ________________________________________ Role Purpose The Senior Manager – Operations will lead and manage the end-to-end employee onboarding operations for Adani GCC, with primary accountability for Background Verification (BGV), Pre-Medical Health Checkups (PMHC), and seamless onboarding governance. The role ensures operational excellence, compliance, candidate experience, stakeholder management, and adherence to organizational policies and timelines. Source: Adani Group | Job ID: 51997

About the Team Our Robotics team is focused on unlocking general-purpose robotics and pushing towards AGI-level intelligence in dynamic, real-world settings. Working across the entire model stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the constraints of physical systems to improve peoples’ lives. About the Role We are seeking a Lead Robotics Safety Engineer to define and lead the product safety strategy for our robotics program. You will work closely with leadership, engineering, research, legal, and policy teams to ensure safety is integrated into our products from the earliest stages of development through deployment. This role combines product safety, regulatory strategy, systems engineering, and risk management. You will help shape how we think about safety across robotic platforms, influence product architecture and development decisions, and ensure our systems are designed to meet both current and emerging regulatory expectations. You will serve as a subject matter expert on robotics safety standards, regulatory frameworks, and safety engineering practices while helping establish the long-term safety strategy for our products and organization. This role is based in San Francisco, CA. This role will be expected to be in office 4 days per week and offer relocation assistance to new employees. In this role, you will Define and lead the product safety strategy for robotic systems across the development lifecycle. Monitor and influence emerging regulatory frameworks, industry standards, and policy developments relevant to robotics and autonomous systems. Partner with engineering teams to translate safety requirements into product architecture, design decisions, and engineering requirements. Develop and maintain system-level hazard analyses, risk assessments, and safety cases for robotic products. Establish safety requirements, verification strat

Customer Service Respond to customer inquiries in SoFinance regarding payment verification credit applications write-offs customer master changes invoice backup copies refund requests and payment corrections. Provide exceptional customer service by promptly addressing and resolving customer queries and concerns on Ring Central Pass the Credit Notes Entries Prepare various reports relating to Customer Service Activities Payment Application Resolve exceptions in payment application such as mismatched numbers due to improper scanning missing invoice numbers etc. Ensure accurate and timely application of payments received in Smart Match and in SAP. GL Monitoring Raise the ticket through SoFinance for payment details to Units and take necessary action once the details received Pass the AR Related Entries Prepare various reports relating to Payment Application Activities Address: Nesco IT Park, Tower 4, 5th Floor, South "A" wing, Off Western Exp Highway, Goregaon East, Mumabi Facility: SBS O2C Noram Qualification: Graduate Experience: 2 - 3 years Source: Sodexo India | Job Code: IJP570113

Dear team we required Technical Supervisor with Diploma and Police verification Address: FISERV, #9, 2nd Floor, 3rd Block, Prestige Blue Chip Park, Dairy Circle-Bengaluru-560029 Facility: FISERV INDIA - BANGALORE Qualification: Diploma Experience: 2 - 3 years Source: Sodexo India | Job Code: IJP548137

Responsible for accurate and timely processing of vendor invoices in the ERP system including invoice verification PO GRN matching discrepancy resolution and compliance with company policies. Coordinate with vendors procurement teams and stakeholders to ensure smooth invoice processing timely payments and adherence to SLA and audit requirements. Address: Sodexo India on Sites Solutions Pvt Ltd, 5th Floor 509, Topiwala Centre, Off S V Road, Near BMC Market, Goregaon (West), Mumbai - Facility: SBS P2P Middle East Qualification: Graduate Experience: 2 - 3 years Source: Sodexo India | Job Code: IJP575928

Work Flexibility: Onsite 1st Shift: Monday - Friday 8am-5pm What You Will Do: Own the operation, maintenance, and audit readiness of assigned laboratory areas, ensuring compliance with operational standards and safe laboratory practices. Serve as the primary asset owner for assigned lab equipment, overseeing maintenance, repairs, calibration, and contributing to equipment acquisition and retirement decision Provide day-to-day guidance, mentoring, and technical training to junior technicians, modeling best practices and safety-first behaviors. Lead the fabrication, qualification, verification, and validation (V&V) of complex test fixtures, providing expertise on components and construction processes. Independently execute development and verification testing with limited oversight, applying sound technical judgment to resolve test issues or deviations. Ensure accurate, compliant documentation by consistently following Good Documentation Practices (GDP) and clearly communicating test results. Manage laboratory logistics, including inventory control and proactive supply purchasing, balancing engineering needs, business priorities, and budget constraints. Continuously identify and implement opportunities to improve lab efficiency, expand testing capabilities, and enhance overall service offerings. What You Need: <span style="col

We are now looking for a Senior Chip Design RTL Design Engineer for the Switch Silicon group. As a Chip Design Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! What you'll be doing: Work in a combined design and verification team which develops some of the switch silicon core units. Plan and Design RTL units / blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance. Build reference models, verify and simulate chip blocks/entities according to specifications. Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. What we need to see: B.Sc. in Electrical Engineering or Computer Engineering. 4&#43; years of experience in RTL design or RTL verification. Previous experience in networking - an advantage. A team player with good communication and interpersonal skills. NVIDIA has some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear from you. Come, join our Switch Silicon design team and help us build the next chip in this exciting and quickly growing field. #LI-Hybrid <