Verification Director Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we are transforming how the world uses information to enrich life. The High Bandwidth Memory (HBM) Design team develops industry-leading memory solutions that enable advances in Artificial Intelligence, high-performance computing, graphics, and data-center applications. Our engineers collaborate across global teams to deliver innovative memory architectures and semiconductor technologies that power next-generation computing systems. As an HBM Design Engineer Intern, you will work alongside experienced memory engineers and gain hands-on experience in semiconductor design, simulation, verification, and analysis. This internship provides exposure to industry-standard design methodologies, EDA tools, and cross-functional collaboration throughout the product development lifecycle. You will also have opportunities to apply AI-Assisted and AI-Enabled workflows to improve engineering productivity, debug efficiency, and design quality. Responsibilities Assist with the design, simulation, analysis, and verification of HBM memory and logic circuits using industry-standard semiconductor design tools. Support RTL development, circuit implementation, timing analysis, power analysis, and functional validation activities. Develop scripts, automation solutions, and AI-Assisted workflows to improve design productivity, debug efficiency, and design-flow quality. Collaborate with Design, Verification, Physical Design, CAD, and Product Engineering teams on technical reviews, debug activities, and project deliv

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Staff Design Engineer is responsible for designing, simulating, and optimizing DRAM circuits while supporting the development of digital and analog circuitry used in advanced memory products. This role collaborates globally across design, verification, product engineering, test, probe, process integration, assembly, and marketing to ensure manufacturable, high‑quality, cost‑optimized solutions. The position drives innovation in future memory generations and contributes to silicon‑to‑system development in a dynamic engineering environment. Responsibilities Design digital, analog, and memory core circuits using CMOS logic and transistors, implementing device specifications from concept to solution. Utilize AI-Enabled tools to assist with schematic editing, data collection and layout floorplan. Create optimized floorplans for circuit placement, routing, power delivery, sense margins, array timing, and die size, including layout leadership. Conduct circuit simulations using FINESIM, HSPICE, and VERILOG; analyze power, performance, reliability, and parasitic impacts. Validate builds through reticle experiments, tape‑out revisions, and simulation‑to‑silicon correlation, identifying required schematic edits. Prepare and maintain design documentation while contributing to best‑known practices and departmental training. Collaborate with global build, verification, product engineering, test, probe, process integration, assembly, and marketing teams to ensure manufacturability and quality. <l

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality Driving innovation into the future Memory generations within a dynamic work environment Demonstrate openness to leveraging AI‑based tools and automation to improve design efficiency, accelerate analysis, and explore innovative solutions across the design and verification workflow. Minimum Qualifications Bachelor’s degree in electrical or computer engineering with 1-2 years of experience with DDR5, LPDDR5, LPDDR6, or HBM3 or in any other memory related field. Preferred Qualifications Strong communication and teamwork skills. <p

About Datadog We're on a mission to build the best platform in the world for engineers to understand and scale their systems, applications, and teams. We operate at a high scale - trillions of data points per day — providing always-on alerting, metrics visualization, logs, and application tracing for tens of thousands of companies. Our engineering culture values pragmatism, honesty, and simplicity to solve hard problems the right way. The Opportunity We are looking for an experienced software engineer to join our CI/CD Security Team within our SDLC Security organization. We work at the intersection of security and engineering infrastructure to secure Datadog's continuous integration and continuous delivery systems. Our responsibilities include hardening pipelines, protecting credentials, and enforcing tightly scoped access controls. We also develop authorization and verification mechanisms to ensure that only trusted code and approved processes can reach production. In this role, you will shape and build a new security layer for our CI/CD infrastructure and drive its adoption across the engineering organization. You will solve challenging systems problems around trusted build provenance, secure secret delivery, and real-time policy enforcement at high throughput. The work sits directly in the critical path of software delivery, where strong security guarantees have to coexist with low latency, high reliability, and a seamless developer experience. You’ll join at an ideal time to make a big impact, as the need for robust software supply chain security is higher than ever. Datadog is growing rapidly, and AI-assisted development is increasing both the pace of software delivery and the amount of activity flowing through our CI/CD systems. Securing that scale without slowing engineers down requires strong software engineering fundamentals, thoughtful automation, and security controls designed to operate reliably at high throughput. At Datadog, we pla

About the job Shape the SoC architecture behind Graphcore's next generation of AI acceleration platforms. Graphcore is expanding its Silicon Architecture Team in Bristol to deliver complex AI compute platforms. As a SoC Architect, you will define how critical subsystems are specified, modelled and integrated. You will turn product requirements into architecture choices across interfaces, interconnect, memory and platform behaviour. Your work will guide implementation, validation and trade-offs across multiple chip programmes. You will work with processor, SoC and system architects, plus design, verification, hardware and software teams. Together, you will evaluate IP, resolve integration questions and support silicon bring-up where needed. This is a rare chance to influence real AI silicon while Graphcore scales its contribution to SoftBank Group's AI ecosystem. The team and culture The team owns SoC architecture, subsystem modelling and system-level trade-offs across future AI acceleration platforms. Work moves from requirements to specifications, models, reviews and guidance for implementation teams. People here are expected to take responsibility early and keep decisions moving. You will speak directly with adjacent teams to clarify constraints, challenge assumptions and close open questions. Decisions are made through technical evidence, clear specifications and direct cross-functional discussion. The team values people who think big, act fast and speak up when architecture needs sharper choices. What we're looking for • Experience specifying or architecting complex SoC devices or subsystems. • Strong understanding of computer architecture, SoC integration, RTL development and verification processes. • Ability to turn product requirements into clear technical specifications and practical design trade-offs. • Software development capability, ideally with Python, C++, Rust or architecture modelling experience. • Knowledge of PCIe, LPDDR, DDR, E

Work Flexibility: Hybrid or Onsite Schedule 1st Shift: Mon – Fri What you will do As the Global Support Coordinator, you will be responsible for prioritizing and fulfilling repair fixture orders received from our global service centers. You will act as the point of contact for fixture and tooling inquiries for Stryker Instruments' international service locations. This role is also responsible for: Organizing blueprints to provide outside vendor for Request For Quote Collaborating with global partners to confirm order requirements Managing and communicating order status updates to relevant parties Leading continuous improvement in service fixture process Coordinating with process tech/sustaining engineer for verification of fixtures Packaging and shipping global fixture orders, working with Stryker Import/Export team, and Shipping. Remotely supporting global service centers through install and setup of fixtures, downloading software from intranet locations. Coordinating global training with local training team to coincide with delivery of fixtures. Working with Advanced Service Engineers to create Service Launch Kits and HTS code documents for new products. Maintaining service launch kit order forms for existing products as fixtures are revised, or update fixture cost estimates periodically. What you need Required High School Diploma or GED Three (3) years’ relevant work experience Proficiency in Microsoft Office Suite Must have ability to lift, push, pull, and carry up to 50 lbs. Preferred Proficiency in SmartSheet Demonstrated mechanical aptitude $24.54 - $33.68 USD Hourly

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we are transforming how the world uses information to enrich life. The High Bandwidth Memory (HBM) Design team develops industry-leading memory solutions that enable advances in Artificial Intelligence, high-performance computing, graphics, and data-center applications. Our engineers collaborate across global teams to deliver innovative memory architectures and semiconductor technologies that power next-generation computing systems. As an HBM Design Engineer Intern, you will work alongside experienced memory engineers and gain hands-on experience in semiconductor design, simulation, verification, and analysis. This internship provides exposure to industry-standard design methodologies, EDA tools, and cross-functional collaboration throughout the product development lifecycle. You will also have opportunities to apply AI-Assisted and AI-Enabled workflows to improve engineering productivity, debug efficiency, and design quality. Responsibilities Assist with the design, simulation, analysis, and verification of HBM memory and logic circuits using industry-standard semiconductor design tools. Support RTL development, circuit implementation, timing analysis, power analysis, and functional validation activities. Develop scripts, automation solutions, and AI-Assisted workflows to improve design productivity, debug efficiency, and design-flow quality. Collaborate with Design, Verification, Physical Design, CAD, and Product Engineering teams on technical reviews, debug activities, and project deliv

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Design Engineer in the FLASH Group at Micron Technology, Inc., will be core technical individual contributor in design and validation of the on-chip controller and mixed signal circuitry in NAND FLASH chips. In this highly visible and challenging role, your responsibilities will include architecture development and product definition, detailed transistor level design, test plan, system integration and verification. Some RTL design and implementation of the controller hardware, design and development of firmware code for NAND internal operations and full-chip Verilog Validation. Successful candidates must have: Solid knowledge in Verilog language. Solid digital logic fundamentals. Basic understanding of analog circuits. An understanding and knowledge with mixed-mode design and validation. Through understanding of Design/Verification CAD tools such as ncsim, Design Compiler, Formality, PrimeTime, etc. Knowledge of TCL or PERL. Knowledge in non-volatile memory design (NAND in particular) is a strong plus. Using AI or AI proficiency is a plus About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performan

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are building innovative physical design capabilities that help bring advanced semiconductor products from concept to silicon. Our team collaborates across design, verification, and manufacturing disciplines to deliver high-quality solutions using leading-edge technologies. We value technical excellence, continuous learning, and a culture of teamwork and innovation. As a Physical Design Engineer, you will play a key role in driving semicustom physical implementation from netlist handoff through tapeout. You will work closely with cross-functional engineering teams to optimize design quality, achieve physical signoff, and support successful product delivery in advanced technology nodes. Responsibilities: Execute the semi-custom physical design flow from netlist handoff through physical verification and tapeout Develop and maintain floorplans, placement, routing, power distribution networks (PDN), and physical design constraints Perform DRC, LVS, parasitic extraction, and physical signoff activities Analyze and resolve timing, signal integrity, electromigration, IR drop, reliability, and manufacturability issues Partner with cross-functional teams to drive design closure, debug issues, and support tapeout readiness Minimum Qualifications: Bachelor's or Master's degree in Electrical Engineering or a related field Experience in VLSI physical design, semiconductor lay

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. You will also work to enable and integrate AI-driven tools and AI-enabled workflows into the team's methodologies. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations. Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure. Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues. Contribute to design documentation, block specifications, and design reviews. Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds. Minimum Qualifications Bachelor’s or master’s degree in electrical engineering, Computer Engin

Job Details: Job Description: The Role and Impact Are you ready to make a significant contribution to cutting-edge semiconductor designs? As a DFT Design Engineer, you will play a critical role in shaping the testability, debuggability and reliability of complex SoC (System-on-Chip) designs. You will work closely with cross-functional teams, influencing designs from concept to production, and ensuring our products meet the highest quality standards. In this role, you will develop innovative DFT/DFD methodologies, optimize workflow with AI, and enhance post silicon efficiency. Your work will directly impact Intel's ability to deliver world-class semiconductor solutions that advance technology across industries. Key Responsibilities : Develop and implement advanced DFT methodologies for complex SoC designs to maximize test coverage and efficiency. Collaborate with design, verification, and manufacturing teams to define and optimize post silicon strategies and requirements. Integrate DFT/DFD features into RTL and ensure verification of design for testability requirements. Collaborate with post-silicon teams to debug and validate DFT features. Stay current with emerging trends, AI adoption and technologies in DFT/DFD to ensure best practices are incorporated into workflows. Qualifications: Minimum Qualifications : Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field. 5&#43; years of experience in DFT, SoC design, or related semiconductor design areas. Expertise in RTL design using hardware description languages like Verilog, VHDL, or SystemVerilog. Preferred Qualifications : Familiar with AI application. Familiarity w

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Program Planning & Execution Own end‑to‑end program plans for chip design programs from concept → tape‑out → silicon bring‑up . Develop and maintain coordinated schedules, achievements, and critical paths across: Architecture RTL & DV Physical Design CAD / Methodology DFT, AMS, Packaging, and Silicon Validation Drive program reviews, achievement readiness, and stage‑gate decisions. Multi-Functional Leadership Act as the primary interface between Design, Verification, Layout, CAD, Technology, Product Engineering, Manufacturing, and Business teams. Drive alignment across global teams (India, US, Japan, etc.). Resolve cross‑team dependencies , priority conflicts, and execution bottlenecks. Risk, Issue & Transition Coordination Proactively identify schedule, technical, resource, and dependency risks . Drive mitigation and recovery plans for execution gaps. Own change control for scope, schedule, and resource adjustments. Execution Metrics & Reporting Define and track program critical metrics: Schedule health Resource loading Design & verification readiness Tape‑out quality indicators Provide clear, concise executive updates with data‑driven insights.</l

About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role As Claude reaches more people, including individuals, businesses, developers building on our APIs, and the platforms and resellers building on top of those, knowing who is on the other side of a request and what they are allowed to do becomes foundational to running our products responsibly. Creating a centralized identity, verification, and access system that every Claude surface draws on is important to accomplishing our mission. We are hiring a Product Manager to own the safe access. The primitives are the building blocks the rest of Anthropic uses to manage access to models and capabilities: access programs, accounts, organization linking, verifications, user APIs for platforms, and the internal tooling teams use. You will own the end-to-end product experience and strategy for internal and external access,, across every surface. This is a role for a strong executor with the ability to be agile in shipping in a 0-1 product space. Safe access is a new product that sits on the critical path of every model launch and every access program. Requirements arrive from many organizations at once, and most weeks you will be the person defining the problem rather than receiving it. Key responsibilities Own the product strategy and roadmap for the account and access primitives, with the goal that any team at Anthropic can provision access or run an access program with minimal support. This is highly ambiguous and requires a lot of cross team coordination and deep understanding of the systems of today. Own the end-to-end experience of getting and managing access for internal stakeholders (research, model launches, saf

ABOUT THIS ROLE GHX connects healthcare suppliers and hospitals across North America, processing over 2.2 million Purchase Order (PO) documents per year through its ADM (Automated Document Management) platform. The platform processes the majority of documents automatically; documents the system cannot process with sufficient confidence are routed to a human review queue. The Document Review Specialist verifies those flagged documents and corrects extraction errors at the field level. Every correction feeds directly into model retraining — you are not maintaining a status quo, you are actively improving the platform’s accuracy over time. This is a precision operations role, not conventional data entry. KEY RESPONSIBILITIES Document Verification & Field Correction — 85% Verify documents like purchase orders, invoices, etc. flagged by the platform as requiring validation Compare extracted field values against the source document image and correct every discrepancy at the field level Verify and correct core fields, including vendor name, PO/Invoice number, line item descriptions, quantities, unit prices, delivery dates, and ship-to addresses Sustain throughput of ~30 documents per hour at a field accuracy rate of 99% or above Self-audit daily output before shift-end submission to catch and correct errors before they enter the system Flag ambiguous, damaged, or edge-case documents per the team escalation protocol; do not attempt to resolve documents outside defined parameters Process Documentation & Reporting — 10% Create and maintain Standard Operating Procedures (SOPs) for document review workflows, and update them as document types and field standards change Build and maintain process maps for end-to-end document review flows, including exception and escalation paths Perform basic analytics — collate production and quality data, and pull routine and ad-hoc reports on throughput, accuracy, and error trends as required Calibration & Continuous Improvement —

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The ASIC Logic Design Team plays a critical role in developing the custom silicon that powers Micron's industry-leading memory and storage solutions. Our team designs high-speed, high-performance ASICs and memory controller IP, collaborating closely with engineers across design, verification, validation, and product development to bring innovative technologies from concept to production. As a Digital Design Engineer Intern, you will work alongside experienced engineers to help design and develop next-generation ASIC solutions. This internship provides hands-on exposure to advanced semiconductor technologies and the complete ASIC development lifecycle, including digital, analog, and mixed-signal design. You will have the opportunity to contribute to meaningful projects while building technical expertise in a collaborative and innovative environment. What You Will Do Support the design and implementation of high-speed digital logic for tester ASICs and memory controller IP. Collaborate with cross-functional teams including Design Verification, Analog Design, Synthesis, Physical Design, and Lab Validation. Assist with integrating digital designs alongside custom analog circuitry and third-party IP solutions. Participate in design reviews and contribute to technical documentation. Present technical concepts and project updates to engineering teams. Explore and leverage AI-enabled design methodologies, including Generative AI and AI-assisted engineering workflows, t