Cad Engineer in United States

NPI Mechanical Quality Engineer Description - As part of the Personal Systems Quality organization, the NPI Mechanical Quality Engineer drives product quality and reliability throughout the NPI product development lifecycle. This role partners with cross-functional teams to evaluate designs, identify and mitigate reliability risks, drive failure analysis and root cause investigations, and implement corrective actions that improve product quality and customer experience. This role provides technical leadership in reliability test development, mechanical design assessment, and Design for Quality and Reliability (DFX) initiatives to ensure high-quality products from concept through production. Strong mechanical engineering expertise, problem-solving skills, and team collaboration are essential for success in this role. *Onsite in Spring office is required 4-days a week Responsibilities: • Provides technical analysis of compute products during NPI Phase through RFQ design proposal reviews, CAD reviews, and DFX product tear downs. • Provides advanced failure analysis, root cause identification, and corrective/preventive actions for reliability concerns and/or issues during development, manufacturing, and field operations. • Proactively addresses customer requests or issues related to mechanical reliability, ensuring timely resolution while liaising with the relevant stakeholders. • Provides consultation to product development architecture teams regarding material component selection, design risk assessment, and associated reliability test plans. • Provides NUD (new, unique, difficult) risk mitigation and test plan development and develops issue prevention. • Actively mentors less-experienced engineers in the field of mechanical reliability and contributes to their growth in the organization. Education & Expe

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we are transforming how the world uses information to enrich life. The High Bandwidth Memory (HBM) Design team develops industry-leading memory solutions that enable advances in Artificial Intelligence, high-performance computing, graphics, and data-center applications. Our engineers collaborate across global teams to deliver innovative memory architectures and semiconductor technologies that power next-generation computing systems. As an HBM Design Engineer Intern, you will work alongside experienced memory engineers and gain hands-on experience in semiconductor design, simulation, verification, and analysis. This internship provides exposure to industry-standard design methodologies, EDA tools, and cross-functional collaboration throughout the product development lifecycle. You will also have opportunities to apply AI-Assisted and AI-Enabled workflows to improve engineering productivity, debug efficiency, and design quality. Responsibilities Assist with the design, simulation, analysis, and verification of HBM memory and logic circuits using industry-standard semiconductor design tools. Support RTL development, circuit implementation, timing analysis, power analysis, and functional validation activities. Develop scripts, automation solutions, and AI-Assisted workflows to improve design productivity, debug efficiency, and design-flow quality. Collaborate with Design, Verification, Physical Design, CAD, and Product Engineering teams on technical reviews, debug activities, and project deliv

About the Team Our Robotics team is focused on unlocking general-purpose robotics and pushing towards AGI-level intelligence in dynamic, real-world settings. Working across the entire model stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the constraints of physical systems to improve peoples’ lives. About the Role We are seeking a Mechanical Design Engineer to lead the development of motor mechanical designs and prototype hardware for advanced robotic systems. You will own stator and rotor mechanical development from early concepts and detailed design through hands-on builds and prototype validation, partnering closely with electromagnetic, electrical, test, and manufacturing teams. This role focuses on the design, integration, and validation of motor components and prototype processes, including laminations, stack assemblies, bobbins, winding interfaces, and fixtures. You will help drive motor development from initial design through repeatable low-volume builds while establishing the tooling, work instructions, and validation practices needed for future robotic platforms. This role is based in San Francisco, CA, and requires in-person presence 4 days a week. In this role, you will Own stator and rotor mechanical designs and released CAD and drawings, including geometry, interfaces, fits, tolerances, retention, assembly access, and mechanical validation. Develop laminations, stack assembly methods, bobbins, and winding interfaces that control alignment, insulation, conductor placement, and end-turn packaging. Design, fabricate, and debug fixtures for winding, stacking, assembly, alignment, and inspection. Build and troubleshoot prototypes. Use measurements, defects, rework, and assembly effort to improve designs and processes. Establish low-volume prototype production with equipment, build sequences, work instructions, revision control, traceability

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s High‑Bandwidth Memory (HBM) Digital Design organization is seeking a Digital Physical Design Engineer to drive backend implementation of high‑performance, low‑power digital logic used in advanced memory products. This role spans backend implementation from Netlist to GDSII, with a strong focus on timing closure, power integrity, and manufacturability in advanced process technologies. The successful candidate will work closely with RTL, DFT, CAD, and verification teams to deliver high‑quality physical designs, contribute to methodology improvements, and help push performance, power, and area (PPA) targets in complex, multi‑hierarchy designs. Key Responsibilities: Own and execute physical design implementation from synthesized netlist through GDSII, including floorplanning, placement, clock tree synthesis, routing, and physical signoff Utilize AI-Enabled tools in the Netlist to GDS flow Perform and drive timing closure across multiple modes, corners, and scenarios using industry‑standard STA tools Analyze and resolve congestion, timing, IR drop, EM, and power integrity issues Develop and refine floorplans, power grids, and clocking strategies for high‑performance designs Work with placement and timing closure of custom analog hard IP macros in a digital-on-top design flow Collaborate closely with RTL designers to influence partitioning, constraints, and micro‑architecture decisions early in the design cycle Implement and va

About the Team Our Robotics team is focused on unlocking general-purpose robotics and pushing towards AGI-level intelligence in dynamic, real-world settings. Working across the entire model stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the constraints of physical systems to improve peoples’ lives. About the Role We are seeking a Senior Mechanical Engineer to lead the design, integration, and sustaining engineering of mechanical subsystems in robotic platforms. You will work closely with experienced engineers and cross-functional partners to set functional requirements, develop and iterate on hardware to meet program expectations. This role is aimed at candidates with strong fundamentals in mechanical system design — including tolerance, alignment, load paths, wear, and failure modes — and robotics. You will contribute to real hardware programs moving from prototype through early production. You will lead both new subsystem development and ongoing improvements to existing systems based on testing, field performance, and manufacturing feedback. This role is based in San Francisco, CA, and requires in-person presence 4 days a week. In this role, you will Lead the design and iteration of mechanical subsystems, including structures, mechanisms, and actuators. Create and maintain CAD models, assemblies, and drawings with appropriate tolerancing and documentation. Build and test prototypes, supporting debugging of mechanical issues such as fit, alignment, friction, and wear. Assist in developing test methods and executing validation to evaluate performance, durability, and failure modes. Work with cross-functional teams to integrate mechanical components with sensors, actuators, and control systems. Support transition of designs from prototype to manufacturable assemblies, incorporating DFM and DFA considerations. Collaborate with manufacturing partners

Job Details: Job Description: The Role and Impact As a Physical Design Engineer, you will play a critical role in driving the development of cutting-edge technologies at Intel. You will work hands-on to deliver high-performance physical designs, ensuring the successful integration of advanced semiconductor technologies. Your work will directly impact Intel's product innovation, addressing complex challenges in power, performance, and area optimization to shape the future of computing architectures. From synthesis to sign-off, your contributions will enable Intel to meet ambitious design goals and deliver transformative solutions to the market. Business Group This role is part of Intel's Corporate Technology Office (CTO), a dynamic group dedicated to advancing the company's technological leadership and innovation. The group focuses on developing foundational technologies, architectures, and methodologies that drive Intel's product roadmap and enable breakthrough computing solutions. Collaborating with cross-disciplinary teams, the CTO plays a pivotal role in delivering impactful designs that support Intel's broader mission of creating world-changing technology. Key Responsibilities - Drive RTL-to-GDS design convergence using advanced synthesis and place-and-route tools targeting performance, power, and area (PPA) goals. - Deliver block-level physical design, including closure of backend flows, electrical requirements, and enhancing silicon yield. - Collaborate with CAD and physical design methodology teams to adopt industry-leading tools and optimizations for custom designs. - Execute physical implementation tasks such as floor planning, bus/pin placement, power/clock distribution, congestion analysis, timing closure, IR drop analysis, and physical verification. - Debug timing, EM/IR, LVS, and DRC violations, and driv

What if the work you did every day could impact the lives of people you know? Or all of humanity? At Illumina, we are expanding access to genomic technology to realize health equity for billions of people around the world. Our efforts enable life-changing discoveries that are transforming human health through the early detection and diagnosis of diseases and new treatment options for patients. Working at Illumina means being part of something bigger than yourself. Every person, in every role, has the opportunity to make a difference. Surrounded by extraordinary people, inspiring leaders, and world changing projects, you will do more and become more than you ever thought possible. We are seeking a Senior Mechanical Engineer to support new product development in genomics instrumentation. This is a highly technical mechanical design role focused on the development of custom mechanisms, precision motion systems, and electromechanical assemblies used in advanced instrumentation. The ideal candidate will be an engineer with experience designing motorized mechanisms and precision motion systems, including a strong understanding of system requirements, motion architecture, controls integration, structural design, and performance validation. The ideal candidate also has experience developing motion solutions from requirements through implementation and understands the engineering principles behind achieving precise, reliable motion in complex systems. Responsibilities Design and develop custom mechanical mechanisms for use in genomics instruments, including motion systems, precision assemblies, and fluidic or sample‑handling components. Integrate mechanical designs with electrical, firmware, and control systems Create and maintain 3D CAD models, engineering drawings, and support

Air Proprietary Tooling Engineer (Entry-Level or Associate) Company: The Boeing Company The Boeing Defense, Space & Security (BDS) team is seeking motivated Tooling Engineers located in Berkeley, MO . This role will support design, development, installation, and sustainment of production tooling and assembly aids used across manufacturing and maintenance programs. The role partners with manufacturing, quality, suppliers, and design engineering to deliver safe, compliant, and cost-effective tooling solutions that enable efficient production. At The Boeing Company, our mission is to connect, protect, and explore our world and beyond. Position Responsibilities Develop and qualify production tooling, jigs, fixtures, and assembly aids from concept through production release Translate manufacturing and design requirements into tooling specifications, drawings, 3D CAD models, and bill of materials Perform tolerance stack-up, fit checks, and tooling validation through analysis, prototyping, and hands-on trials Support tooling fabrication and inspection, including supplier management, fabrication oversight, and acceptance criteria verification Lead root-cause analyses for tooling-related manufacturing issues and implement corrective actions and continuous improvement Create and maintain tooling documentation: process plans, safety assessments, work instructions, inspection plans, and change records Collaborate with multidisciplinary teams—manufacturing, quality, stress, systems, and supply chain—to ensure tooling meets program schedule, safety, and quality goals Ensure compliance with company and regulatory standards, maintain configuration control and toolin

NVIDIA's GPUs and SOCs are the world leaders in power, performance and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in the world through their contributions! This position will collaborate with Technical Package Lead and different design teams in the design and development of sophisticated, detailed layout of IC substrates for NVIDIA products. In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical design issues. What you'll be doing: As part of a Layout team, you will collaborate to implement high speed/density ASIC packages. Perform substrate breakout patterns for ASIC packages. Optimize package pinout incorporating system level trade-offs of pins assignment. Help perform package routing, placement, stack-up, reference plane and power distribution using Cadence APD or SiP tool suite. Propose layout design trade-offs to the Technical Package Lead for resolution and implementation. Conduct design feasibility studies to evaluate the Package design goals for size, cost, and system performance. Develop symbols and CAD library databases using Cadence APD design tools Develop methodologies to improve layout productivity What we need to see: Hold a B.S. Electrical Engineering or equivalent experience 5+ years experience in PCB Layout of graphics cards, motherboards, line cards or other related technology. Experience with HDI designs is a plus Proven experience in substrate layout of wire bond and flip chip packages, preferred Significant background with Cadence AP

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Product Engineer in Node Development group, you will be part of a forward-thinking team of engineers that solves complex problems to develop industry leading DRAM! You will engage on new technology at design start and be part of a team responsible for delivering technology to enable the full product portfolio, initial device qualification and production ramp. This will be accomplished through innovation and by cross-functional engagement with partner groups; Design, Test, Technology Development, Marketing, Manufacturing and Quality Assurance departments to co-optimize product and process. While you may not exhibit all of the characteristics/skills listed below today, we are highly interested in a teammate who is motivated to grow in technical breadth and depth. Suppose you are open to learning while being a valued member of a team of world-class engineers. In that case, we are determined to help build upon your existing foundation, while focusing on your individual and collaborative skills in this exciting and outstanding opportunity. Responsibilities Include: Enable new process node startup, qualification, yield, and ramp Collaborate with internal engineering groups; Design, Technology Development, Design for Test, and Quality teams to understand yield issues and priorities. Provide direction to development teams using thorough knowledge for process integration Develop and key metrics for feedback on a new technology Support design verification and validation using CAD tools and simulation

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an Physical Design Engineer to lead cross-functional efforts to solve complex physical design challenges and develop end-to-end RTL-to-GDS methodologies across advanced nodes, with a strong focus on PPA and runtime improvements. The engineer will architect, integrate, and deploy AI/ML-driven solutions into production physical design flows, creating custom CAD tools and partnering with internal teams and EDA vendors to drive next-generation, ML-enabled capabilities. This role is hybrid, based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are BS in Electrical or Computer Engineering (or equivalent experience) with 5+ years in Physical Design CAD methodology at advanced nodes. Proven track record improving PPA and/or runtime on high-performance, low-power taped-out designs. Hands-on with industry-standard EDA tools (e.g., Fusion Compiler) across synthesis, P&R, STA, signoff, and hierarchical flows. Strong Python/Tcl and data skills, with interest or experience in ML frameworks (PyTorch, TensorFlow), and the ability to drive complex projects independent

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Physical Design Verification Engineer to drive full-chip signoff and ensure manufacturable, high-quality silicon across advanced technology nodes. You’ll lead physical verification closure (DRC, LVS, ERC, etc.), debug issues using standard industry PV tools, and collaborate across RTL, PD, CAD, and packaging teams to achieve successful tapeouts. If you thrive in a fast-paced environment and enjoy solving complex challenges in cutting-edge silicon, we’d love to hear from you. This role is hybrid , based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned engineer with a strong background in CPU/IP/SoC physical verification and tapeout closure. A hands-on problem solver who excels at debugging and driving signoff through complex verification flows. A collaborative team player who works effectively across RTL, PD, CAD, and foundry interfaces. A mentor and technical leader passionate about building efficient, manufacturable silicon. What We Need BS/MS in Electrical/Electronics Engineering (or related) with 7–14 years of hands-on CPU/IP/SoC physical verif

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team and lead the front-end RTL physical implementation team. Drive CAD flows on multiple process technologies while working closely with core micro-architects to refine CPU core configurations and optimizing PPA. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, RTL and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An expert in physical design practices used to optimize PPA Experienced in high-performance physical design. Proficient in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation and power analysis. Skilled in synthesis, place and route tools including flows and physical design methodology. Background in CPU micro-architecture. What We Need Own front‑end physical implementation and PPA definition for a high‑performance RISC‑V CPU and CPU subsystem Work closely with microarchitects and RTL designers to “make the IP better” by optimizing frequency, power, and area

Work Flexibility: Onsite Shift: 1st Shift Tuesday – Friday, 5:45 AM – 4:15 PM What You Will Do: The Specialist, R&D is responsible for independently manufacturing prototype and development components that support the design and advancement of innovative medical devices. Working closely with Product Development Engineers and global R&D teams, this role transforms engineering concepts into functional prototypes through precision machining, programming, and problem-solving. Success in this role requires the ability to evaluate engineering drawings, determine machining processes, and independently produce complex components from concept to completion with minimal supervision. Evaluate and translate engineering drawings into manufacturing plans for prototype and development components. Plan, set up, program, and operate manual and CNC equipment to produce complex prototype parts. Develop machining programs using both machine-console and CAD/CAM programming methods. Manufacture precision components while maintaining tight tolerances and high-quality standards. Independently determine machining processes, tooling, setups, and operation sequences required to complete a part from start to finish. <span style="color:#00

Computer Generated Image Producer Description - HP Creative Services is expanding its CG production team, and we’re looking for a CG Producer who can support the creation of high-quality computer-generated imagery across a diverse range of device types — including laptops, desktops, accessories, and peripherals. This role is ideal for a technical project manager or CG pipeline operator with 4–7 years of experience who is ready to deepen their expertise in structured CG workflows, CAD/GP file handling, and AI-assisted imagery production. You’ll work closely with CG Designers, Worldwide Marketing, and product teams to facilitate the creation of accurate, brand-aligned imagery that supports global launches and campaign needs. Responsibilities Oversee day-to-day CG production workflows across multiple device categories with varying form factors. Gather, review, and validate CAD/GP files and other technical inputs required for CG asset creation. Maintain awareness of configuration changes and product updates, ensuring CG assets reflect accurate specifications. Monitor production progress using Workfront, ensuring teams and projects remain aligned and serve as point of escalation for design, marketing, and CG. Partner with Worldwide Marketing, GBU, and creative partners to align on imagery needs and delivery timelines as well as serve as bridge between marketing and agency partners. Participate in product kickoff meetings to understand configuration requirements, launch milestones, and creative direction. Support creative agency HP DAM asset transfer, resulting in accuracy of CG asset metadata and downstream asset availability. Leads budget and expense management, manages project budgets as assigned and handles assigned agencies or contractors as needed, including Purchase Order creation and quarte