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Design Verification Lead in San Francisco

688 active opportunities · Updated October 2026

Explore current design verification lead jobs in San Francisco. Filter by work mode, employment type, experience, department, date posted and distance.

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📍 San Francisco, California, United States· Full-time· Remote
✓ High-confidence listingCompany trend -79.2%
Quick readStrong listing-quality and freshness signals

About the Team OpenAI is building the next generation of advertising for an AI-powered world. As AI changes how people discover information, explore possibilities, and make decisions, we believe this presents a huge opportunity for small and medium-sized businesses to connect with customers in new ways. The SMB Ads Marketing team is building this opportunity from the ground up. We define how businesses discover OpenAI’s advertising platform, become successful advertisers, and grow their investment over time. Working closely with Product, Ads Engineering, Data Science, and Sales, we combine customer insight, rigorous experimentation, and fast execution to turn early opportunities into scalable growth. About the Role We are hiring a Lead, Ads Prospecting & Growth Intelligence to build the intelligence and orchestration platform powering OpenAI’s ads business. This person will help us identify the right companies and people, understand why they are relevant, determine the right next action, and learn from what happens afterward. Own the prospecting function for the ads business, serving SMB Ads while building a foundation reusable across segments. Set the vision, operating model, roadmap, platform choices, business rules, adoption, and outcomes; and partner with Ads Engineering, Data Science, and internal platform teams. Decide what to build in-house, enable through internal platforms, or deliver through selected vendors and partners. In This Role, You Will Lead the function’s strategy, roadmap, operating model, and adoption. Connect platform investments to measurable advertiser and business outcomes. Define a unified prospect, account, contact, and advertiser data model. Establish standards for identity, data quality, provenance, freshness, confidence, and consent. Combine market, intent, behavioral, product, CRM, campaign, and customer-success signals to improve targeting and customer engagement. Design enrichment and verification workflows. Evaluate in-house cap

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📍 San Francisco, California, United States· Full-time· Remote
✓ High-confidence listingCompany trend -79.2%
Quick readStrong listing-quality and freshness signals

About the Team OpenAI’s Forward Deployed Engineering team partners with leading semiconductor companies to deploy production-grade AI systems across the entire chip design lifecycle: design, verification, and physical design. We operate at the intersection of customer delivery and core platform development, embedding deeply with customers to translate frontier model capabilities into systems that materially improve engineering workflows and accelerate innovation. Our work turns early, high-touch deployments into repeatable solution patterns, reference architectures, and evaluation practices that scale across the semiconductor ecosystem. About the Role We are seeking a highly skilled Physical Design Engineer to join our semiconductor-focused Forward Deployed Engineering team. This is a senior IC role that will begin with a strong emphasis on physical design expertise, technical judgment, advisory leverage, and customer credibility, with the expectation that the person will grow into a broader Forward Deployed Engineering role over time. In the near term, you will serve as the team’s physical design SME across semiconductor deployments: helping FDEs, Product, and Research understand backend implementation workflows, pressure-test AI-assisted solution ideas against real physical design constraints, and raise the quality of our customer-facing technical work. You will help the broader team build fluency in implementation flows, EDA tooling, signoff methodology, and the trade-offs that shape physical design decisions in practice. Over time, we expect this role to expand beyond SME support into broader FDE ownership: partnering directly with customers, shaping deployment strategy, building and iterating production-grade AI systems, driving technical workstreams, and helping turn high-touch semiconductor deployments into repeatable solutions. This is a strong fit for someone who brings deep physical design expertise today and is excited to grow into a customer-facing, syst

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📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -79.2%

About the Team Our Robotics team is focused on unlocking general-purpose robotics and pushing towards AGI-level intelligence in dynamic, real-world settings. Working across the entire model stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the constraints of physical systems to improve peoples’ lives. About the Role We are seeking a Lead Robotics Safety Engineer to define and lead the product safety strategy for our robotics program. You will work closely with leadership, engineering, research, legal, and policy teams to ensure safety is integrated into our products from the earliest stages of development through deployment. This role combines product safety, regulatory strategy, systems engineering, and risk management. You will help shape how we think about safety across robotic platforms, influence product architecture and development decisions, and ensure our systems are designed to meet both current and emerging regulatory expectations. You will serve as a subject matter expert on robotics safety standards, regulatory frameworks, and safety engineering practices while helping establish the long-term safety strategy for our products and organization. This role is based in San Francisco, CA. This role will be expected to be in office 4 days per week and offer relocation assistance to new employees. In this role, you will Define and lead the product safety strategy for robotic systems across the development lifecycle. Monitor and influence emerging regulatory frameworks, industry standards, and policy developments relevant to robotics and autonomous systems. Partner with engineering teams to translate safety requirements into product architecture, design decisions, and engineering requirements. Develop and maintain system-level hazard analyses, risk assessments, and safety cases for robotic products. Establish safety requirements, verification strat

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📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -79.2%

About the Team OpenAI’s Forward Deployed Engineering (FDE) team turns research breakthroughs into production-grade systems. We embed deeply with customers to solve high-leverage problems and act as the delivery engine for our most complex large-scale engagements. We move quickly from prototype to production and surface reusable patterns that shape our platform. We operate at the intersection of deployment and development – working closely with OpenAI Research, Product and Partnerships. About the Role As a Technical Deployment Lead (TDL), you will define how OpenAI delivers complex systems to Semiconductor customers. You will own how solutions are scoped, built, shipped, and adopted across high-value engineering workflows such as RTL design, verification, and physical implementation. You’ll translate business outcomes into a technical plan, run day-to-day execution across FDEs, Researchers, and Customer Engineers, and partner with customer teams to ensure delivery supports their goals. You will focus on the semiconductor vertical to deploy next-generation AI capabilities. You will own delivery end-to-end: embedding with customers to map workflows and success criteria, ensuring components ship on time, and leading readiness and change management for adoption. You’ll track progress, manage dependencies, make sequencing decisions, and drive 0→1 prototypes through MVP and scale. You will also share field insights with Product and Research to guide roadmap and priorities. Success will be measured first and foremost by impact - deployments that deliver measurable value against customer goals, drive adoption, and become critical to their workflows. Additional measures of success include delivery reliability (milestones hit, low reopen/churn), operating leverage (patterns reused across deployments), judgment under pressure, and product impact (field signal that shifts roadmaps/architectures). This is a high-trust, high-autonomy role. Success requires deep technical project m

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📍 San Francisco, California, United States· Full-time· Remote
✓ High-confidence listingCompany trend -79.2%
Quick readStrong listing-quality and freshness signals

About the Team OpenAI’s mission is to ensure the responsible and widespread adoption of artificial intelligence. In support of that mission, the Marketing team helps deeply understand customer audiences and market dynamics, influence the development of the right products, build sustainable and customer-aligned monetization models, and drive awareness, adoption, and usage across OpenAI’s products and platform. We take a data-driven approach to understand markets, develop monetization strategies, and uncover customer needs that shape product strategy and messaging. We partner closely with Sales, Partnerships, Product, Engineering, Research, Comms, and Design to deliver a cohesive end-to-end customer experience and lead go-to-market efforts for new product launches across channels. About the Role We’re looking for a Marketing Scientist to join OpenAI’s Ads Marketing Science function. Reporting to Marketing Science leadership, you’ll be a senior individual contributor who combines rigorous measurement expertise with strong client judgment and hands-on execution. Your mission is to help OpenAI Ads prove and improve advertisers’ media performance. You’ll work with sales, partners, and clients supporting all forms of measurement including verification, attribution, incrementality, brand, marketing mix modeling (MMM), and scalable advertiser reporting, connecting sound methodology to decisions advertisers can act on. You will partner closely with Sales on key advertising accounts and with Product, Engineering, Data Science, Partnerships, Legal, and Privacy. Initial priorities include advancing incrementality measurement, helping onboard measurement partners to privacy-forward measurement workflows and integrations, and creating reusable programs, tools, agents, skills, and workflows that let sales and clients access high-quality Marketing Science support at scale. This role is based in either San Francisco or New York, and follows a hybrid schedule (Monday-Wednesday). In th

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📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -79.2%

About the Role The Mechanical Commissioning Project Engineer owns mechanical commissioning planning, readiness, quality coordination, and test execution oversight for the project. This role ensures mechanical systems are installed, inspected, started, balanced, controlled, and tested in a way that supports reliable integrated facility performance. Reports to the Commissioning Project Lead and partners closely with mechanical contractors, equipment vendors, design/engineering teams, the electrical commissioning lead, controls stakeholders, and vendor field/test engineers. Key Responsibilities Develop and maintain the mechanical commissioning scope, readiness criteria, inspection strategy, and discipline test execution plan. Review mechanical design packages, specifications, submittals, method statements, controls narratives, sequence assumptions, and testing requirements for commissionability and risk. Coordinate mechanical QA/QC inspections with contractors and vendor field/test engineers, including installation checks, pre-functional readiness, deficiency capture, and closeout tracking. Own mechanical commissioning procedure development and review, including equipment startup, functional testing, controls verification, balancing prerequisites, failure mode validation, and integrated systems testing inputs. Coordinate with equipment vendors on factory/site acceptance requirements, startup support, test prerequisites, documentation packages, and vendor participation during critical tests. Support readiness and execution for cooling, ventilation, hydronic, pumping, heat rejection, controls, and other project-specific mechanical systems. Lead discipline-level review of mechanical test results, deficiencies, corrective actions, retest requirements, trend logs, and acceptance evidence. Maintain mechanical commissioning dashboards and status inputs for the Commissioning Project Lead, including risk items, resource needs, test readiness, and issue aging. Partner with the E

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📍 San Francisco, California, United States· Full-time
✓ High-confidence listingCompany trend -91.5%
Quick readStrong listing-quality and freshness signals

Drata is building the trust layer between great companies - automating compliance, managing risk, and helping organizations prove trust continuously as they scale. We're Dratanauts: a global crew of 600+ professionals united by a culture that rewards integrity, ownership, and raising the bar, no matter where in the world we're working from. Why Join the Drata Team? At Drata, you're not maintaining legacy compliance software - you're building the agentic AI platform defining what trust looks like for the next generation of companies. Here's what makes the work itself worth showing up for: Problems without a playbook: You'll work at the edge of AI and security, building agentic governance, continuous compliance, and real-time trust verification to solve problems that don't have an established answer yet. You're writing it as you go. Real ownership, not just process: Our values center on owning outcomes and raising the bar, not checking boxes. You're expected to have opinions and back them. A seat at the table: Your perspective is unique and valued. Open debate and diverse viewpoints are built into how decisions actually get made here, at every level. Growth at rocketship speed: Drata is scaling fast, which means scope grows fast too. High performers get more ownership, visibility, and experience. A crew, not just coworkers: Dratanauts consistently describe a "come as you are" culture with sharp, curious people—the kind of team that makes hard problems genuinely fun to solve. See what they say here and follow us on LinkedIn for company news, employee stories, and career updates. Job Summary: The Senior Platform Engineer II, AI Tooling on the Developer Experience Team (part of Foundation Engineering group) will lead the design and delivery of the internal AI platform that makes Drata's engineers more efficient - the tools, agents, and integrations that turn AI coding agents (and the rest of the AI dev stack) into a paved road for everyday engineering work. This is not a

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📍 San Francisco, California, United States· Full-time
✓ High-confidence listingCompany trend -91.5%

$200.7K – $271.5K/yr

Quick readStrong listing-quality and freshness signals

Drata is building the trust layer between great companies - automating compliance, managing risk, and helping organizations prove trust continuously as they scale. We're Dratanauts: a global crew of 600+ professionals united by a culture that rewards integrity, ownership, and raising the bar, no matter where in the world we're working from. Why Join the Drata Team? At Drata, you're not maintaining legacy compliance software - you're building the agentic AI platform defining what trust looks like for the next generation of companies. Here's what makes the work itself worth showing up for: Problems without a playbook: You'll work at the edge of AI and security, building agentic governance, continuous compliance, and real-time trust verification to solve problems that don't have an established answer yet. You're writing it as you go. Real ownership, not just process: Our values center on owning outcomes and raising the bar, not checking boxes. You're expected to have opinions and back them. A seat at the table: Your perspective is unique and valued. Open debate and diverse viewpoints are built into how decisions actually get made here, at every level. Growth at rocketship speed: Drata is scaling fast, which means scope grows fast too. High performers get more ownership, visibility, and experience. A crew, not just coworkers: Dratanauts consistently describe a "come as you are" culture with sharp, curious people—the kind of team that makes hard problems genuinely fun to solve. See what they say here and follow us on LinkedIn for company news, employee stories, and career updates. Job Summary: The Staff Software Engineer serves as a technical leader across multiple small teams. They design and build scalable systems, guide architectural decisions, and tackle complex challenges that span codebases and domains. They work closely with Product and Engineering leadership to shape the technical roadmap, ensure systems are reliable and secure, and drive key cross-team initiativ

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📍 San Francisco, CA, United States· Remote
✓ Quality checkedCompany trend -84.3%

About Pinterest: Millions of people around the world come to our platform to find creative ideas, dream about new possibilities and plan for memories that will last a lifetime. At Pinterest, we’re on a mission to bring everyone the inspiration to create a life they love, and that starts with the people behind the product. Discover a career where you ignite innovation for millions, transform passion into growth opportunities, celebrate each other’s unique experiences and embrace the flexibility to do your best work. Creating a career you love? It’s Possible. At Pinterest, AI isn't just a feature, it's a powerful partner that augments our creativity and amplifies our impact, and we’re looking for candidates who are excited to be a part of that. To get a complete picture of your experience and abilities, we’ll explore your foundational skills and how you collaborate with AI. Through our interview process, what matters most is that you can always explain your approach, showing us not just what you know, but how you think. You can read more about our AI interview philosophy and how we use AI in our recruiting process here . About tvScientific tvScientific is the first and only CTV advertising platform purpose-built for performance marketers. We leverage massive data and cutting-edge science to automate and optimize TV advertising to drive business outcomes. Our solution combines media buying, optimization, measurement, and attribution in one, efficient platform. Our platform is built by industry leaders with a long history in programmatic advertising, digital media, and ad verification who have now purpose-built a CTV performance platform advertisers can trust to grow their business. As a Data Engineer at tvScientific, you will be a key player in implementing the robust data infrastructure to power our data-heavy company. You will collaborate with our cross-functional teams to evolve our core data pipelines, design for efficiency as we scale, and store data

SQLAWSMachine LearningAI
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📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -79.2%

About the Team: OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role OpenAI is developing custom silicon to power the next generation of frontier AI models. We’re looking for experienced Design Verification (DV) Engineers to ensure functional correctness and robust design for our cutting-edge ML accelerators. You will play a key role in verifying complex hardware systems—ranging from individual IP blocks to subsystems and full SoC—working closely with architecture, RTL, software, and systems teams to deliver reliable silicon at scale. In this role you will: Own the verification of one or more of: custom IP blocks, subsystems (compute, interconnect, memory, etc.), or full-chip SoC-level functionality. Define verification plans based on architecture and microarchitecture specs. Develop constrained-random, directed, and system-level testbenches using SystemVerilog/UVM or equivalent methodologies. Build and maintain stimulus generators, checkers, monitors, and scoreboards to ensure high coverage and correctness. Drive bug triage, root cause analysis, and work closely with design teams on resolution. Contribute to regression infrastructure, coverage analysis, and closure for both block- and top-level environments. You might thrive in this role if you have: BS/MS in EE/CE/CS or equivalent with 3+ years of experience in hardware verification. Proven success verifying complex IP or SoC designs in industry-standard flows Proficient in SystemVerilog, UVM, and common simulation and debug tools (e.g., VCS, Questa, Verdi). Strong knowledge

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📍 San Francisco, California, United States· Full-time· Remote
✓ High-confidence listingCompany trend -79.2%
Quick readStrong listing-quality and freshness signals

About the Team OpenAI develops models that can reason through complex problems and hardware designed for the demands of advanced AI. AI for Chips connects these efforts: applying increasingly capable AI systems to the work of semiconductor engineering. Our goal is to help engineers develop better chips and shorten design cycles. This work brings research, model training, and hardware expertise together to build tools that engineers can use on real designs, with correctness and measurable performance at the center. About the Role We’re hiring a Research Engineer to help OpenAI models solve chip-design problems through reinforcement learning, tool use, and evaluation. You’ll own experiments from the initial idea through implementation and analysis. That means building environments and evaluations, running training, investigating failures, and using the results to decide what to try next. You’ll also build the software needed to make those experiments reliable and reproducible. We value strong coding fundamentals, careful experimental judgment, and the ability to make progress independently. Prior chip-design experience is helpful, but you can learn the domain alongside the team’s hardware specialists. In this role, you will: Build RL environments and evaluations for tasks such as RTL generation, design verification, and physical design optimization. Develop and test approaches that help models use chip-design tools and improve power, performance, and area while preserving correctness. Design experiments, establish baselines, and measure whether improvements hold up on new tasks and designs. Investigate failures across model behavior, rewards, evaluation tools, and experiment infrastructure. Improve iteration speed through better tooling, faster evaluations, and proxy rewards that reflect the outcomes we care about. Turn successful experiments into reusable research code and training workflows, working closely with researchers and engineers. You might thrive in this ro

AWSRestAIGo
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📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -100%

What you’ll do Execute weekly system-level exploratory testing across the scanner and supporting software; log and triage issues with clear reproduction steps. Work with engineering to debug root cause and validate fixes. Help maintain the DHF and traceability between user needs, design requirements, tests, and results. Own practical test execution logistics (fixtures, test data, environments, calibration artifacts) and keep things repeatable. Help build the continuous testing strategy: automated tests where feasible, plus structured manual and system tests. Support V&V activities, including coordination with external partners as needed. What we’re looking for Strong hands-on testing instincts for complex electromechanical systems with substantial software. Ability to write clear bug reports and communicate risk/impact. Experience building and maintaining test plans/protocols; comfort operating lab equipment and debugging across layers. Useful experience Experience testing complex systems end-to-end (automation where it pays off, plus hands-on hardware/instrumentation). Medical device or other safety-critical environments and comfort translating risk into practical test coverage.

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📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -79.2%

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for a software engineer to help build the design methodology, software abstractions, and infrastructure that enable a small silicon team to develop complex chips rapidly and with high confidence. You will turn evolving architecture and design needs into reusable tools and workflows that improve iteration speed, quality, and then apply those tools to help construct world-class silicon. You’ll work closely across architecture, design, verification, performance modeling, and systems software. This role is well suited for an engineer who enjoys building high quality software and is motivated by the challenge of improving velocity and quality of the silicon development process. In this role, you will: Develop and scale design methodologies for rapid first-party chip development and apply them to construct complex custom chips Create abstractions that allow hardware structures, configurations, experiments, and results to be represented consistently across tools. Automate high-value engineering workflows and improve their reproducibility, observability, testability, and ease of use. Partner with architects, RTL designers, verification engineers, compiler engineers, and systems software engineers to gather requirements and then implement solutions. Use methodology and tooling to identify design risks early, accelerate iteration, and improve confidence in performance and implementation tradeoffs. Contribute across multiple aspects of software and hardware

PythonAWSGitRest
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📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -79.2%

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are looking for a highly experienced RTL engineer to own critical on- and off-chip interconnect components for our custom AI accelerator platform. You will drive the microarchitecture and RTL implementation of scalable on-chip communication fabrics connecting high-bandwidth compute, memory, and I/O subsystems as well as purpose-built off-chip interfaces and protocols needed to enable custom computing at scale. This is a senior, hands-on engineering role with broad technical ownership. You will drive design from requirements through the full silicon lifecycle, from architecture definition and performance analysis through RTL implementation, verification closure, physical design convergence, bring-up, and production readiness. You will plan and oversee the work of junior engineers and help drive and develop productive engineering relationships with external partners and help manage partner execution. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Own the microarchitecture, RTL design, and delivery of major SoC interconnect components, including network-on-chip fabrics, switches, routers, bridges, protocol adapters, arbiters, and traffic-management logic as well as off-chip protocol bridges and interfaces. Drive third party engagements to develop novel networking and interface protocols and silicon IP while ensuring high quality and de

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O
📍 San Francisco, California, United States· Full-time· Remote
✓ High-confidence listingCompany trend -79.2%
Quick readStrong listing-quality and freshness signals

About the Team OpenAI develops models that can reason through complex problems and hardware designed for the demands of advanced AI. AI for Chips connects these efforts: applying increasingly capable AI systems to the work of semiconductor engineering. Our goal is to help engineers develop better chips and shorten design cycles. This work brings research, model training, and hardware expertise together to build tools that engineers can use on real designs, with correctness and measurable performance at the center. About the Role We’re hiring a Software Engineer to build the research infrastructure and tooling that help OpenAI models design silicon. You’ll turn chip-design workflows into reliable environments for reinforcement learning and evaluation, and make it easier for researchers to run experiments and iterate on new ideas. You’ll move between software engineering, tool integration, and open research problems. We value strong coding fundamentals, clear technical judgment, and independent execution. Prior chip-design experience is helpful, but you can learn the domain alongside the team’s hardware specialists. In this role, you will: Build and maintain infrastructure for reinforcement learning environments, evaluations, and long-running experiments. Integrate electronic design automation (EDA) tools into workflows for RTL generation, verification, and physical design optimization. Improve experiment reliability, reproducibility, observability, and performance; debug failures across tools, services, and infrastructure. Develop tooling and model harnesses that let researchers test ideas quickly and measure correctness and power, performance, and area (PPA). Collaborate with researchers and engineers to turn successful experiments into reusable systems and training workflows. Own ambiguous projects end to end, communicate progress, and use results to guide the next iteration. You might thrive in this role if you: Have strong software engineering fundamentals, with

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