Experienced And Lead Level Structural Analysis Engineer in United States

Position Overview Diligent is looking for an experienced GRC Advisor to join the team and work on Key accounts to drive adoption and retention and identify areas for expansion within our platform. This position will leverage our GTM, and value drivers established through combining people, process, and technology. If you are anything like the talented GRC Advisors at Diligent then this feeling you have, might be the desire to serve others- but you are blinded by the limits placed on you in your current role. The Client Success Advisor role is key to Diligent’s Customer Success retention strategy. Key Responsibilities Provide guidance and best practices on configuring, customizing, and optimizing the functionality of the GRC platform and modules to align with clients’ business processes and objectives. Conduct in-depth assessments of clients’ GRC requirements, objectives, and challenges to recommend tailored solutions to address their business needs and goals. Collaborate with clients on internal roadmaps, governance, risk, and compliance requirements to be implemented within Diligent’s platform. Ensure proper understanding and adoption of the platform solutions to identify at-risk clients and help increase usage of the software and modules. Partner closely with internal Product, Customer Success, Support, and Sales teams to drive continuous improvement of the platform based on client use cases. Monitor industry trends, regulatory developments, and emerging best practices in the GRC landscape to proactively share insights and recommendations with clients from a subject matter expert perspective. Required Experience/Skills Minimum of 5-7 years of experience in a client-facing role within the legal, audit, risk, or compliance industry. Adaptive mindset and ability to drive out a meaningful path to how our customers see tangible business

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team to define and implement RTL for high-performance CPUs. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in CPU microarchitecture with expertise in Rename, Scheduler, ROB, Load Store, Branch Prediction, Cache or Datapath. Skilled in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation, synthesis, and power analysis. Proficient in debugging RTL/logic across multiple design hierarchies and pre/post-silicon environments. Background in microarchitecture definition, design specification, and performance-driven trade-off analysis. What We Need Own RTL design and microarchitecture development for a portion of a CPU block of a high-performance RISC-V CPU. Collaborate closely with DV, PD, and performance engineers to meet functional, timing, and power goals. Use innovative techniques to optimize power, performance, and

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Design Verification Engineer to validate the System Management Controller (SMC) and enable seamless multi-chip integration. In this role, you will design and execute tests, build infrastructure, and debug issues across chiplet-based SoCs. You’ll have the opportunity to work with remote mentorship while contributing to the foundation of scalable multi-die systems. This role is hybrid, based out of Toronto, Ontario, Boston, MA or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Proficient in SystemVerilog, SV-UVM, Python, and C/C++ with strong verification skills. Experienced in writing test plans, building infrastructure, and debugging hardware/software flows. Comfortable working with remote mentorship and distributed teams. Familiar with AI-assisted tools like Copilot, Cursor, and Claude to accelerate verification. What We Need Develop and maintain SMC tests and supporting DV infrastructure. Write, execute, and track test plans for chiplet and multi-chip SoC designs. Use C/C++ to develop tests compiled, loaded, and executed directly on the DUT. Triage, analyze, and debug issues in clos

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. As a Director, Strategy & Solutions in our GTM team, this role defines how Tenstorrent shows up in the market for AI/ML workloads—from positioning and messaging to real customer solutions. Sitting at the intersection of product, sales, engineering, and marketing, this role turns deep technical capability into clear, compelling value across industries and use cases. This role is hybrid OR remote, based out of The United States. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced at connecting complex AI/ML systems to real customer outcomes and business value. Comfortable acting as a technical storyteller for developers, architects, and executive audiences. Naturally curious and forward-looking about customer workloads, competitive dynamics, and emerging AI trends. What We Need Ownership of GTM positioning and messaging for Tenstorrent’s AI hardware, software stack, and solutions. Development of application - and vertical-specific value propositions across enterprise, cloud, and regulated markets. Value proposition & GTM strategy, including creation of technical collateral (whitepapers, sales decks, benchmarks, dem

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Our Tensix team is building custom AI compute cores, RISC-V CPUs, and chiplet-based architectures for datacenter, edge, and automotive AI. Design Verification Engineers on this team validate compute IP and subsystems and build scalable DV infrastructure to keep verification fast, automated, and production-grade. This role is hybrid, based out of Toronto, ON, Austin, TX or Belgrade, Serbia. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in modern verification methodologies with strong SystemVerilog skills and exposure to structured testbench development. Comfortable working from block-level to system-level verification and reasoning about microarchitecture behavior from specs and waveforms. Proficient in Linux environments with Python, or Bash scripting for automate builds, parse logs, manage CI pipelines. Skilled in coverage-driven verification and confident debugging across RTL, testbench, and workload scenarios. Motivated by AI hardware and eager to learn verification strategies for new architectures and domains. What We Need Contribute to verification of Tensix IP and subsystems from early planning through tape-out, owning cov

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking a GCC Compiler Engineer to design, develop, and optimize compilers for next-generation RISC-V and AI compute architectures. You will work across hardware and software teams to improve performance, programmability, and integration of our custom toolchains into real applications. This role is fully hands-on and central to how developers interact with Tenstorrent hardware across both traditional compute and advanced machine learning workloads. This role is Hybrid, based out of Santa Clara, CA, Austin, TX, or Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced compiler engineer with deep knowledge of GCC and LLVM internals, comfortable optimizing for custom hardware targets. Strong C/C++ developer with a solid grasp of algorithms, data structures, and performance analysis. Collaborative and analytical, able to work across hardware and software domains to deliver efficient, high-performance toolchains. Passionate about enabling breakthrough compute architectures through compiler innovation and software-hardware co-design. What We Need Design, develop, and optimize GCC and/or LLVM compilers for Tenstorrent’s cust

CLEAR is building THE secure identity company of the future. Our mission is to make experiences safer and easier—physically and digitally. With more than 43 million Members and a growing network of partners across the world, CLEAR's secure identity platform is transforming the way people live, work, and travel. Whether it’s at the airport, stadium, or throughout your everyday life, CLEAR unlocks the magic of frictionless experiences. We’re looking for an experienced Software Engineer to help us build the next generation of products which will go beyond just ID and enable our members to leverage the power of a networked digital identity. As a Software Engineer at CLEAR, you will participate in the design, implementation, testing, and deployment of applications to build and enhance our platform- one that interconnects dozens of attributes and qualifications while keeping member privacy and security at the core. A brief highlight of our tech stack: Java / Kafka / Postgres AWS cloud What you'll do: Advance our capabilities across a wide array of industries and domains and gain hands-on experience with privacy, security, data modeling and architecture Develop and deliver code across the full stack, driving engineering excellence by defining to best practices in testing, documentation and observability Partner with product and other stakeholders to uncover requirements, to innovate, and to solve complex problems Have a strong sense of ownership, responsible for architectural decision-making and striving for continuous improvement in technology and processes at CLEAR What you’re great at: 3+ years of backend software development experience in Java Working with cloud-based application development, and being fluent in at least a few of: Cloud service providers like AWS Containerization technologies like Docker and Kubernetes Collaboration, integration, and deployment tools like Github, Argo, and Jenkins Arti

CLEAR is building THE secure identity company of the future. Our mission is to make experiences safer and easier—physically and digitally. With more than 43 million Members and a growing network of partners across the world, CLEAR's secure identity platform is transforming the way people live, work, and travel. Whether it’s at the airport, stadium, or throughout your everyday life, CLEAR unlocks the magic of frictionless experiences. We’re looking for an experienced Machine Learning Engineer to help us build the next generation of products which will go beyond just ID and enable our members to leverage the power of a networked digital identity. As a Machine Learning Engineer at CLEAR, you will participate in the design, implementation, testing, and deployment of applications to build and enhance our platform - one that interconnects dozens of attributes and qualifications while keeping member privacy and security at the core. A brief highlight of our tech stack: Python / Postgres / Snowflake / dbt AWS SageMaker and MLflow What you'll do: Own and drive the foundational work of a ML system at CLEAR Design, build and deploy ML models for various applications, such as document and image processing, fraud detection. Develop and implement robust data pipelines at a variety of scales, including collection, pre-processing, transformation, and feature engineering Partner with product and other stakeholders to uncover requirements, to innovate, and to solve complex problems Have a strong sense of ownership, responsible for architectural decision-making and striving for continuous improvement in technology and processes at CLEAR What you're great at: 3+ years of experience building, operating and scaling ML models for consumer applications, particularly those with experience building end-to-end systems Experience designing, implementing, and scaling complex data pipelines for ML models and evaluating their performance Expertise in best practices for feature enginee

The Datadog Major Accounts Team is focused on driving new business and expanding the current Datadog footprint with our largest and most strategic clients. The success of the Major Accounts Team directly impacts the success of Datadog and is a highly visible position with bold revenue targets. We are searching for seasoned and successful Account Executives that have a passion for technology and a fast-paced sales environment. The Major Accounts Team has experienced unprecedented success since its inception in 2021 and we are continuing to expand the team. This is a lucrative opportunity for any driven and competitive salesperson. At Datadog, we place value in our office culture - the relationships and collaboration it builds and the creativity it brings to the table. We operate as a hybrid workplace to ensure our Datadogs can create a work-life harmony that best fits them. What You’ll Do: Prospect into a targeted set of accounts while running an efficient sales process Nurture existing client relationships and grow the Datadog footprint Maintain, build and own specific relationship maps for your territory including existing relationships and aspirational contacts Develop a deep comprehension of the customer's business Negotiate favorable pricing and business terms by selling value and ROI Demonstrate resourcefulness when faced with challenges Determine necessary steps to close business and gain customer validation Identify a robust set of business drivers behind all opportunities Ensure high forecasting accuracy and consistency Who You Are: Someone with 7+ years Enterprise software sales experience Experienced in selling Fortune 100 companies with the ability to win new business Experience managing a complex account team from multiple GTM Ecosystem partner functions to support Sales cycle Experience/success selling new solutions into accounts already leveraging core technical products Combination of leveraging existing customer contacts and net new PG to brea

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. Role Overview We are seeking an experienced ASIC Package Signal Integrity / Power Integrity Engineer to drive electrical architecture, modeling, optimization, and validation for the most advanced AI/HPC silicon and package design. This role focuses on high-speed SerDes and memory channel architecture, advanced 2.5D/3D package SI/PI, substrate to package co-design, power-delivery-network optimization, electromagnetic modeling, and simulation-to-measurement correlation. The ideal candidate has strong hands-on experience with high-speed channel and PDN analysis across ASIC packages, interposers, substrates, and power-delivery structures, and can translate simulation results into practical design requirements for interposers and package substrate design optimization. The engineer will work closely with ASIC, package, system, mechanical, thermal, power, and silicon validation teams from early architecture and feasibility studies through production bring-up. In this role you will Own SI/PI architecture and analysis for advanced AI ASIC packages from early feasibility studies through production. Develop and optimize high-speed electrical channels for 200G/400G SerDes, PCIe, HBM, DDR, and chiplet/die-to-die interfaces. Perform package, interposer and substrate modeling using 2D/3D electromagnetic solvers. Define and optimize package stack-ups, transmission-line structures, via transitions, breakout structures, return paths, ground shielding, bump maps, and ball maps based on SI/PI re

Our Key Accounts Executive will target and close new business within the largest, most strategic prospects in key, high potential companies. In this role you’ll be focused on understanding and uncovering the pain points these companies face as they operate in or migrate to a cloud environment at scale as well as delivering the appropriate Datadog solution. At Datadog, we place value in our office culture - the relationships and collaboration it builds and the creativity it brings to the table. We operate as a hybrid workplace to ensure our Datadogs can create a work-life harmony that best fits them. What You’ll Do: Develop and execute an outbound prospecting strategy tailored to specific Fortune 100 accounts Drive a strategic, multi-threaded sales motion spanning multiple stakeholders and product suites Cross-sell and navigate throughout complex accounts Create, own, and grow your own accounts, demonstrating the value of the Datadog platform Develop a deep comprehension of customer's business Work cross-functionally with marketing, and solutions engineering to drive coordinated efforts that support the outbound prospecting strategy Negotiate favorable pricing and business terms with large commercial enterprises by selling value and ROI Demonstrate resourcefulness when faced with challenges that defy easy solution Have intuitive sense of necessary steps to close business and gain customer validation Identify robust set of business drivers behind all opportunities Ensure high forecasting accuracy and consistency Who You Are: Someone with 5+ years Enterprise Sales experience selling into Fortune 100 companies with the ability to win new logos Driven and have met/exceeded direct sales goals of 1M+ and operated with an average deal size of $100k+ Able to demonstrate methodology to prospect and build pipeline on your own Experienced in working for an innovative tech company (SaaS, IT infrastructure or similar preferred) Self-starter mindset and resourceful by nature

About the Team OpenAI’s User Operations team shepherds our customers’ adoption of AI and ensures that our customers' product experience is nothing short of exceptional. We are building the very first post-AGI support team. We resolve complex issues, provide technical guidance, and support customers in maximizing value and adoption from deploying our products. We work closely with Sales, Technical Success, Product, Engineering and others, to deliver the best possible experience to our customers at scale. OpenAI's customers represent a range of diverse backgrounds and maturity, from early-stage startups to established global enterprises. About the Role We are looking for an experienced, hands-on support leader to build and run the support and escalation motion for GPT-Rosalind and OpenAI’s life sciences customers. This is both a builder role and a frontline support role. You will work directly with customers, own complex cases, diagnose technical and operational issues, and coordinate cross-functional teams through resolution. You will also create the intake paths, playbooks, knowledge, tooling, and operating mechanisms needed to support life sciences workflows across ChatGPT, Codex, and the OpenAI API. You’ll partner closely with Account Directors, Product, Engineering and Forward Deployed Engineering, Security, Legal, and bioscience subject-matter experts. You will help customers receive coordinated, accurate answers while maintaining clear boundaries between technical support, scientific consultation, product feedback, and roadmap commitments. This role is an opportunity to define how OpenAI supports scientists and life sciences organizations as they adopt increasingly capable AI systems. In this role, you will: Work directly with Rosalind and life sciences customers, taking ownership of complex technical and operational support cases from intake through resolution. Serve as a critical escalation point and final line of defense for complex technical issues, partner

About the Team The Infrastructure Engineering function sits within IT and is responsible for reliably building, deploying, and operating critical on prem and hybrid environments that power internal services and critical R&D environments. This is an early, high-leverage technical role focused on applying strong Site Reliability Engineering discipline to environments where uptime, safety, recoverability, and security are non-negotiable. This person helps replace bespoke, one-off infrastructure with standardized infrastructure-as-code building blocks that compound reliability and operational leverage as OpenAI scales. About the Role We are looking for an experienced Site Reliability Engineer working on security infrastructure to design, build, and operate reliable, secure, and scalable infrastructure that underpins identity, access, endpoint, and shared platform services across the company. In this role, you will be a senior technical owner for infrastructure and identity systems end to end, from architecture and implementation through policy enforcement, upgrades, recovery, and day-two operations. You will build durable, production-grade platforms that remove operational friction, enforce security by default, and enable teams to move faster with confidence. This role is well suited for a hands-on senior engineer who thrives in ambiguity, enjoys owning complex systems end to end, and raises the reliability and security bar by replacing fragile implementations with standardized, repeatable infrastructure. This role is based in our San Francisco HQ and requires in-office presence. In this role, you will: Design, build, and operate reliable infrastructure across on-prem, hybrid, shared, and product adjacent environments. Establish standardized infrastructure patterns that replace bespoke implementations with repeatable, auditable, secure-by-default systems. Own the lifecycle of critical infrastructure platforms, including provisioning, deployment, upgrades, patching,

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for an experienced systems software engineer to help define and build the host software stack for our custom next-generation AI systems. You will work close to the hardware on performance-critical software, including Linux kernel drivers, high-throughput I/O paths, and system-scale networking and RDMA. This role spans architecture, implementation, platform bring-up, debugging, and performance optimization. You will work across hardware and software boundaries to make new systems usable end to end, from low-level device interfaces through userspace tooling and production validation. In this role you will: Design, implement, and debug host-side systems software for AI infrastructure, including Linux kernel drivers and supporting userspace components. Build and optimize software paths for high-throughput, low-latency communication, including RDMA and related networking functionality. Develop software around PCIe, DMA, NICs, accelerators, memory movement, and device interaction. Bring up new hardware platforms and diagnose complex issues across kernel, firmware, networking, and hardware boundaries. Build tooling for integration, testing, diagnostics, observability, qualification, and performance characterization. Collaborate with hardware, networking, and platform teams to define interfaces and integrate new capabilities. Work with external vendors where needed to integrate technologies and drive issues to resolution. Contribute across the systems sof

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are looking for a highly experienced RTL engineer to own critical on- and off-chip interconnect components for our custom AI accelerator platform. You will drive the microarchitecture and RTL implementation of scalable on-chip communication fabrics connecting high-bandwidth compute, memory, and I/O subsystems as well as purpose-built off-chip interfaces and protocols needed to enable custom computing at scale. This is a senior, hands-on engineering role with broad technical ownership. You will drive design from requirements through the full silicon lifecycle, from architecture definition and performance analysis through RTL implementation, verification closure, physical design convergence, bring-up, and production readiness. You will plan and oversee the work of junior engineers and help drive and develop productive engineering relationships with external partners and help manage partner execution. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Own the microarchitecture, RTL design, and delivery of major SoC interconnect components, including network-on-chip fabrics, switches, routers, bridges, protocol adapters, arbiters, and traffic-management logic as well as off-chip protocol bridges and interfaces. Drive third party engagements to develop novel networking and interface protocols and silicon IP while ensuring high quality and de