About the Team OpenAI develops models that can reason through complex problems and hardware designed for the demands of advanced AI. AI for Chips connects these efforts: applying increasingly capable AI systems to the work of semiconductor engineering. Our goal is to help engineers develop better chips and shorten design cycles. This work brings research, model training, and hardware expertise together to build tools that engineers can use on real designs, with correctness and measurable performance at the center. About the Role We’re hiring a Software Engineer to build the research infrastructure and tooling that help OpenAI models design silicon. You’ll turn chip-design workflows into reliable environments for reinforcement learning and evaluation, and make it easier for researchers to run experiments and iterate on new ideas. You’ll move between software engineering, tool integration, and open research problems. We value strong coding fundamentals, clear technical judgment, and independent execution. Prior chip-design experience is helpful, but you can learn the domain alongside the team’s hardware specialists. In this role, you will: Build and maintain infrastructure for reinforcement learning environments, evaluations, and long-running experiments. Integrate electronic design automation (EDA) tools into workflows for RTL generation, verification, and physical design optimization. Improve experiment reliability, reproducibility, observability, and performance; debug failures across tools, services, and infrastructure. Develop tooling and model harnesses that let researchers test ideas quickly and measure correctness and power, performance, and area (PPA). Collaborate with researchers and engineers to turn successful experiments into reusable systems and training workflows. Own ambiguous projects end to end, communicate progress, and use results to guide the next iteration. You might thrive in this role if you: Have strong software engineering fundamentals, with
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Semiconductor Equipment Applications Eng in United States
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About the Role We’re seeking an Associate General Counsel to lead commercial legal strategy and execution for OpenAI’s silicon initiatives and the semiconductor ecosystem that supports our AI infrastructure. This is a senior, highly cross-functional role for a lawyer who can advise business and technical leaders across the semiconductor development, manufacturing, and supply lifecycle. The role will partner closely with silicon engineering, infrastructure, strategic sourcing, supply chain, manufacturing, finance, partnerships, IP, policy, regulatory, and trade compliance teams to structure and negotiate strategic arrangements with semiconductor ecosystem partners, technology providers, and critical suppliers. This person will help establish the commercial frameworks needed to protect OpenAI’s technology and support resilient, scalable commercial arrangements. We’re looking for an experienced technology transactions lawyer with meaningful semiconductor industry experience who can translate highly technical and operational issues into practical commercial structures. The ideal candidate combines strong judgment, commercial creativity, and the ability to lead complex, high-value transactions in a fast-moving and complex global ecosystem. This role is based in San Francisco, CA. We use a hybrid work model of 3-days in the office per week and offer relocation assistance to new employees. This role will: Lead commercial legal strategy and risk management for OpenAI’s silicon and related technology initiatives. Advise senior business, engineering, sourcing, and operational stakeholders on strategic relationships, commercial priorities, and complex transactions. Draft, negotiate, and advise on sophisticated development, manufacturing, supply, licensing, services, and strategic partnership agreements. Structure commercial arrangements that support long-term business and operational requirements. Advise on the commercial and operational issues that arise across the developmen
Job Details: Job Description: As one of the world's largest semiconductor manufacturers, Intel is committed to advancing every aspect of semiconductor technology, from process development and manufacturing to advanced packaging and reliability characterization. Employees within Intel Foundry are part of a global network spanning technology development, manufacturing, assembly, test, and quality organizations across both front-end silicon and advanced packaging facilities. You will join the Foundry Lab Network (FLN), a key organization within Foundry Quality, Reliability, and Labs (FQRL), located at Intel's growing Chandler, Arizona site. This site serves as the technology development hub for Intel's most advanced packaging technologies, including Hybrid Bond Interconnect (HBI), Embedded Multi-die Interconnect Bridge (EMIB-T), glass substrates, Foveros, and future advanced packaging innovations. FLN is actively expanding its laboratory capabilities and capacity to support Intel Foundry's roadmap, enabling faster technology qualification and accelerating development cycles through Quick Turn Monitoring (QTM) solutions that significantly reduce time-to-data. As the Stress Test and Reliability (STaR) Back-End Laboratory Manager, you will play a critical leadership role within FLN. You will partner closely with Packaging Technology Development, Quality and Reliability, and Failure Analysis teams to establish and enhance laboratory capabilities that support qualification and certification of next-generation packaging technologies and products. This position offers a unique combination of people leadership, technical problem solving, and organizational strategy. You will lead a team of 7-10 talented engineers, spearhead cross-functional efforts to resolve complex reliability and technology challenges, drive strong quality and operati
Job Details: Job Description: Intel Foundry is building the future of semiconductor manufacturing. As Intel continues to accelerate its foundry strategy, we are seeking an exceptional Factory Manager to help lead one of the world's most sophisticated semiconductor manufacturing operations. This executive leadership role will oversee a large-scale manufacturing organization responsible for delivering world-class safety, quality, yield, velocity, cost, and customer commitments while helping shape the future of advanced semiconductor manufacturing. This is a rare opportunity to lead at the intersection of manufacturing excellence, technology innovation, and business performance. Why This Role Matters Intel already possesses deep manufacturing expertise. What makes this opportunity unique is the need for a leader who can combine operational excellence with a proven ability to drive manufacturing performance through yield improvement, technology ramp execution, and large-scale organizational leadership. We are looking for an executive who understands the physics behind semiconductor manufacturing, can lead thousands of employees through complexity and change, and has successfully transitioned advanced technologies from development into high-volume production. Candidates who can demonstrate ownership of both factory operations and yield performance will be especially compelling. What You'll Do Lead a large-scale semiconductor manufacturing organization supporting advanced process technologies. Drive safety, quality, die yield, line yield, productivity, velocity, cost, and customer commitments. Lead technology transfer, qualification, and manufacturing ramp activities from development through high-volume production. Partner closely with technology development,
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary: The ID1 Facilities Electrical team supports the safe, reliable, and compliant operation of electrical systems critical to high-volume semiconductor manufacturing. The team coordinates maintenance, repairs, installations, documentation, and service-provider activities that support dependable site operations. The Facilities Electrical Coordinator plans, schedules, and tracks electrical maintenance and project activities across facilities operations. This role coordinates technicians, contractors, vendors, materials, documentation, and site partners to help ensure work is prepared, communicated, and completed safely with minimal impact to operations. Responsibilities Coordinate schedules, priorities, resources, and site access for electrical maintenance, repairs, installations, and minor system modifications. Serve as a primary coordination point for technicians, contractors, vendors, operations, engineering, and other business partners. Confirm work packages, permits, materials, documentation, and required support are ready before scheduled execution. Track work status, action items, service requests, documentation, and completion requirements. Coordinate outsourced electrical services and verify vendor activities align with safety, LOTO, quality, and operational requirements. Identify scheduling conflicts, coordination gaps, and execution risks; escalate issues and support timely resolution. Support asset information, maintenance records, reporting,
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The US Expansion Construction team is driving some of the most significant semiconductor manufacturing projects in the United States, including two high-volume manufacturing facilities in Boise, Idaho (ID1 and ID2) and a greenfield manufacturing facility in Clay, New York. Our team partners across engineering, construction, commissioning, and operations to deliver world-class facilities that support the future of technology and innovation. As the ID Quality Assurance Lead, you will be a key member of the US Expansion Strategic Programs team, reporting to the ID Sr. Commissioning Manager. In this highly visible role, you will lead quality governance across major capital projects, ensuring compliance, commissioning readiness, documentation integrity, and operational turnover excellence. You will serve as the primary owner-side quality leader, collaborating with contractors, vendors, inspection agencies, operations teams, and regulatory stakeholders to deliver successful project outcomes. Responsibilities: Lead quality governance, performance metrics, audit programs, reporting, and continuous improvement initiatives across Idaho capital projects Oversee contractor and vendor quality execution, including quality plans, inspections, testing, material verification, hold points, and compliance with project requirements Manage special inspection programs, testing agency coordination, regulatory interfaces, and turnover-ready quality documentation Align construction quality activities with co
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro: The Advanced Packaging Technology Development (APTD) department at Micron Technology is at the forefront of innovation, driving the advancement of memory and storage Interconnects and Packaging solutions that transform how the world uses information. Our team is dedicated to developing innovative processes and technologies that enable the creation of next-generation semiconductor products which drive the AI revolution. Position Overview: As a Staff Process Engineer in Advanced Packaging CMP team, you will be primarily responsible for starting up, developing and optimizing processes to improve product quality and reliability, working on process yield improvement, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems. You will also be required to identify, diagnose and resolve assembly process related problems by applying failure analysis, FMEA, 8D or SPC/FDC methodology. This position requires communication and collaboration with associates both within the region and internationally. Strict adherence to Micron Intellectual Property Protection policy is vital. This role will also extensively collaborate with vendors to develop processes that meet integration requirements. Responsibilities: Perform fundamental research, consumables development, and hardware evaluation, as well as test processes for novel applications Initiate and manage experiments to widen process margins and evaluate man
Job Details: Job Description: The Role As a Cloud Application Development Engineer within Intel Manufacturing Foundry Cloud Services (imFCS) , you will design, develop, deploy, and support cloud-native applications that power semiconductor manufacturing, engineering automation, and AI-driven factory operations. You will build scalable, secure, and resilient platforms that improve engineering productivity, enable advanced analytics, and accelerate Intel Foundry's digital transformation. Key Responsibilities Develop and maintain cloud-native applications and services supporting manufacturing and engineering workflows. Support 24x7 manufacturing operations through on-call rotations, incident response, and root-cause analysis. Design and implement scalable microservices, APIs, and containerization systems utilizing Kubernetes orchestrator and cloud native applications. Architect secure cloud solutions spanning application, data, networking, identity, and observability domains. Build and maintain CI/CD pipelines, Infrastructure-as-Code, and DevOps automation. Provide technical leadership for contractor and partner development teams across multiple geographic regions, driving architecture, implementation, and operational excellence for cloud-native solutions. Collaborate with manufacturing, engineering, and software teams to deliv
Job Details: Job Description: The Role and Impact As a SoC Design Verification Engineer, you will play a pivotal role in ensuring that Intel's complex System-on-Chip (SoC) designs meet functional specifications and deliver high-quality performance. You will design scalable and reusable verification plans, develop test environments, and execute tests to uncover issues and improve functionality. Your contributions will directly enhance Intel's product quality and ensure optimal performance in presilicon development. Business Group You will be joining Intel's cutting-edge product development group, a team focused on designing and verifying advanced semiconductor solutions. This group is at the forefront of innovation, delivering high-quality, scalable products that drive Intel's leadership in technology and performance. By contributing your skills here, you will help shape the future of computing and enable groundbreaking advancements in the industry. Key Responsibilities - Define and develop scalable and reusable block, subsystem, and SoC verification plans. - Create test benches and verification environments that align with microarchitecture specifications. - Execute verification plans, including emulation and system simulation models, to ensure design functionality and uncover bugs. - Debug and root cause issues in presilicon environments, implementing corrective measures to address failures. - Collaborate with architects, RTL developers, postsilicon teams, and physical design teams to improve verification of complex architectural features. - Document and maintain test plans, driving technical reviews with design and architecture teams. - Integrate security coverage activities within test plans, including regression and debug tests. - Maintain and improve
Job Details: Job Description: As a Packaging Module Development Engineer, you will play a pivotal role in the development and optimization of Intel's assembly media and collaterals. Your daily work will involve designing innovative solutions to improve media and collateral reliability, manufacturability, and cost efficiency. Your contributions will directly support Intel's cutting-edge assembly packaging technology roadmap, driving advancements in semiconductor manufacturing processes. Business Group You will be part of Intel Corporation's Media Development organization, a team dedicated to advancing packaging technologies and manufacturing processes. This group operates at the forefront of innovation, enabling high-performance products and driving Intel's leadership in the semiconductor industry. By joining this collaborative environment, you will contribute to Intel's broader goals of delivering transformative technology solutions. Key Responsibilities Develop and optimize media and collaterals to meet quality, reliability, cost, yield, and productivity targets. Design and implement new media and collateral solutions, leveraging statistical methods like Design of Experiments (DOE) and Statistical Process Control (SPC). Conduct evaluations of media and collaterals under simulated field conditions, including tests for heat, humidity, temperature cycling, and dynamic forces. Lead initiatives to identify and mitigate media and collateral quality and reliability risks, utilizing innovative tools and methods. Provide technical consultation on media and collateral challenges and deliver solutions that align with operational and technology milestones. Document technical improvements and innovations through research papers and presentations. <p styl
Director / DMTS, Process Integration Lead – Advanced Packaging (2.5D/3D, HBM, Hybrid Bonding)
Micron TechnologyOur vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro: We are advancing the future of semiconductor packaging through innovative 2.5D, 3D, and heterogeneous integration technologies. Our team develops the processes that enable next-generation AI and high-performance computing products, working across materials, device, design, manufacturing, and test engineering to solve complex technical challenges. If you're excited by emerging packaging architectures and breakthrough integration approaches, you'll find meaningful opportunities to make an impact here. Position Overview: As a Process Integration Lead for Advanced Packaging, you will lead a team focused on developing and integrating advanced packaging technologies from concept through full-scale manufacturing. This role plays a critical part in enabling high-performance multi-die solutions by driving technology development, process integration, technology transfer, and collaborative execution. You will help shape the roadmap for next-generation packaging platforms while mentoring a highly skilled technical team. Responsibilities: Manage and grow a team responsible for seamless process integration across 2.5D and 3D packaging platforms, including advanced interconnect architectures, die-stacking solutions, and HBM implementation. Spearhead the development, optimization, and qualification of emerging packaging technologies through experimental design (DOE), process analysis, performance validation, and establishment of design rules. Improve
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The US Construction Engineering department is responsible for the design and construction efforts for high-tech, large-scale projects for Micron in the US. Current high-profile projects include the design and construction of two high-volume manufacturing fabs in Boise, ID1 and ID2, and a third fab in Clay, New York. We are seeking an experienced Chemical Systems Engineer to oversee the third-party design of chemical delivery and handling systems for high-tech large-scale construction projects. The Chemical Systems Engineer will manage external design firms, ensuring that chemical systems meet stringent project specifications, safety standards, and regulatory requirements. This role requires deep technical expertise in chemical systems, strong project management skills, and effective collaboration with multidisciplinary teams to deliver safe, efficient, and compliant systems for semiconductor manufacturing. Job Responsibilities: Manage third-party design firms in developing chemical delivery and handling systems, including storage, distribution, and hazardous waste management. Coordinate with external and internal stakeholders—including contractors, vendors, procurement, finance, construction and design teams—to ensure alignment with facility needs and project schedules. Ensure seamless integration of third-party designs with facility systems using Building Information Modeling (BIM) tools like Revit and Navisworks. Review capacity plan
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro: The Advanced Packaging Technology Development (APTD) department at Micron Technology is advancing next-generation packaging technologies that enable the performance and scalability requirements of tomorrow’s AI and high-performance computing applications. Our team brings together experts in process integration, materials engineering, and semiconductor development to solve complex technical challenges and turn new ideas into production-ready solutions. Join us and help shape the future of advanced memory and packaging technology! Position Overview: As a Process Integration Engineer for Advanced Packaging, you will play a key role in developing and integrating advanced package architectures, including 2.5D, 3D stacking, HBM, and hybrid bonding technologies. You will work across engineering disciplines to develop new processes, improve performance and yield, and support the transfer of emerging technologies into manufacturing. This is an opportunity to contribute to innovative products while working on some of the industry's most advanced packaging solutions. Responsibilities: Develop and optimize advanced packaging technologies, including 2.5D/3D integration, HBM, hybrid bonding, and advanced interconnects Design and execute experiments to qualify materials, process flows, and design rules for new package architectures Analyze yield, performance, and defect data to identify process improvements using SPC and advanced analytics Drive
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our Vision Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate, and advance faster than ever. Micron is advancing a historic $15 billion investment in semiconductor manufacturing in Boise, Idaho, with DRAM production planned for the second half of the decade. As a global leader in memory and storage solutions, Micron is investing more than $150 billion worldwide over the next decade to expand leading-edge manufacturing capabilities and drive innovation across the semiconductor industry. Join the Boise expansion team and help build the future of semiconductor manufacturing. You will work alongside experienced engineers to develop advanced processes, solve complex manufacturing challenges, and support the production of technologies that power everything from artificial intelligence to next-generation computing systems. Position Overview As a PCVD Process Engineer , you will contribute to the development, optimization, and sustainment of semiconductor manufacturing processes. You will gain hands-on experience in a state-of-the-art fabrication environment, partnering with teams to improve yield, quality, reliability, and productivity. This role offers an outstanding opportunity to apply engineering fundamentals, build technical expertise, and develop a career in advanced semi
Job Details: Job Description: The Role and Impact As a Physical Design Engineer, you will play a critical role in driving the development of cutting-edge technologies at Intel. You will work hands-on to deliver high-performance physical designs, ensuring the successful integration of advanced semiconductor technologies. Your work will directly impact Intel's product innovation, addressing complex challenges in power, performance, and area optimization to shape the future of computing architectures. From synthesis to sign-off, your contributions will enable Intel to meet ambitious design goals and deliver transformative solutions to the market. Business Group This role is part of Intel's Corporate Technology Office (CTO), a dynamic group dedicated to advancing the company's technological leadership and innovation. The group focuses on developing foundational technologies, architectures, and methodologies that drive Intel's product roadmap and enable breakthrough computing solutions. Collaborating with cross-disciplinary teams, the CTO plays a pivotal role in delivering impactful designs that support Intel's broader mission of creating world-changing technology. Key Responsibilities - Drive RTL-to-GDS design convergence using advanced synthesis and place-and-route tools targeting performance, power, and area (PPA) goals. - Deliver block-level physical design, including closure of backend flows, electrical requirements, and enhancing silicon yield. - Collaborate with CAD and physical design methodology teams to adopt industry-leading tools and optimizations for custom designs. - Execute physical implementation tasks such as floor planning, bus/pin placement, power/clock distribution, congestion analysis, timing closure, IR drop analysis, and physical verification. - Debug timing, EM/IR, LVS, and DRC violations, and driv
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