Simulation Infrastructure Engineer in United States

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we are transforming how the world uses information to enrich life. The High Bandwidth Memory (HBM) Design team develops industry-leading memory solutions that enable advances in Artificial Intelligence, high-performance computing, graphics, and data-center applications. Our engineers collaborate across global teams to deliver innovative memory architectures and semiconductor technologies that power next-generation computing systems. As an HBM Design Engineer Intern, you will work alongside experienced memory engineers and gain hands-on experience in semiconductor design, simulation, verification, and analysis. This internship provides exposure to industry-standard design methodologies, EDA tools, and cross-functional collaboration throughout the product development lifecycle. You will also have opportunities to apply AI-Assisted and AI-Enabled workflows to improve engineering productivity, debug efficiency, and design quality. Responsibilities Assist with the design, simulation, analysis, and verification of HBM memory and logic circuits using industry-standard semiconductor design tools. Support RTL development, circuit implementation, timing analysis, power analysis, and functional validation activities. Develop scripts, automation solutions, and AI-Assisted workflows to improve design productivity, debug efficiency, and design-flow quality. Collaborate with Design, Verification, Physical Design, CAD, and Product Engineering teams on technical reviews, debug activities, and project deliv

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Engineer at Micron’s HBM New Product Validation team in Boise, ID you will be a senior technical guide responsible for validation strategy and readiness for future-generation High Bandwidth Memory (HBM) products. You will apply deep expertise in complex RAM and high-bandwidth memory architecture and building to establish architecture validation strategies. You will impact decisions that improve validation observability and debug efficiency . You will lead investigations of complex architecture, building , and silicon issues from pre-silicon simulation through post-silicon characterization. You will partner across Design Engineering, Design Validation, Product Engineering, Systems teams, and will develop and promote AI-enabled validation methodologies that improve efficiency, quality, and scalability. Responsibilities: Define architecture-aware validation strategies and coverage direction for future-generation HBM products. Drive validation readiness for next-generation products by preparing strategies, test environments, and execution plans before first silicon, reducing risk, accelerating issue resolution, and preventing late-stage surprises. Evaluate new DRAM/HBM architectural features and define validation requirements and testability needs before DBR. <span style="color:#

Associate Systems Engineering Support Analyst Company: The Boeing Company Boeing Defense, Space & Security (BDS has an exciting opportunity for an Associate Systems Engineering Analyst (Level 2) for Flight Simulation Labs , located in Berkeley, MO . The Flight Simulation Labs organization has expertise supporting marketing, design, development, integration, test and training objectives for Boeing military aircraft. As a Systems Engineering Analyst, you will be responsible for researching, analyzing, and compiling technical data to optimize system performance throughout the program lifecycle. You will apply systems engineering processes, methodologies, and tools to develop and refine system architectures, functional requirements, and product designs for programs such as T-7, F-15, F-18, and MQ-25. Position Responsibilities Apply systems engineering methodologies to design, develop, and maintain systems, tools, and new product solutions Serves as system administrator for Engineering tools in the Flight Simulation Labs organization Identifies opportunities and implements data analysis and automation including dashboard and reporting for the organization Derives and develops basic architecture, functional requirements, and product designs, ensuring alignment with project objectives Collaborates with cross functional project teams including engineering, IT, cyber, networking, software, customers, and suppliers to achieve organizational goals Engages in continuous improvement initiatives for all Flight Simulation Labs processes and tools This position requires the ability to obtain a U.S. Security Clearance for which the U.S. Government re

Job Overview : Seeking Technical Electronic Intelligence (TechELINT) Analyst. Become a member of a highly accomplished ELINT team providing direct support to geographically dispersed USAF Wing and Squadron-level organizations. Perform interpretive pulse-level and P-Cubed analysis of ELINT data, in-depth radar and weapons systems studies, and cutting-edge modeling and simulation efforts. The TechELINT analyst will leverage their aviation, Electronic Warfare experience, and critical-thinking prowess to develop tactics and techniques to counter emerging threats. The analyst will also work and coordinate with DoD entities and agencies to facilitate cutting-edge product development to ensure client capabilities meet current and future objectives. The analyst must possess an in-depth understanding of the key factors in aircraft survivability and combat mission planning to ensure client objectives are met. Primary Responsibilities : Support the collection, documentation, and post-test analysis of ELINT to evaluate programming effectiveness. Use specialized tools to ingest intel data and program ELINT, ensuring integration with EW systems. Work with a team of engineers to collaborate on ELINT products and ensure proper programming in alignment with mission objectives. Design procedures to analyze testing results, ensuring accurate validation and effectiveness of systems. Utilize the latest intel databases to perform detailed analysis and research, identifying potential threats and solutions. Basic Qualifications : Bachelor's degree (or 2-4 additional years of experience) in Intelligence or Information Operations and minimum of 8 years ofTechnical Signals Analysis experience. Experience with intel tools such as ASPEN, WILLOW, MARTES, THRESHER, and GALE. Former Military Experience in Technical Signals Analysis. Active TOP SECRET clearanc

NVIDIA is at the forefront of the AI and robotics revolution, and NVIDIA’s robotics teams are on a mission to build the essential technology that can enable any company to become a robotics company. The Seattle Robotics Lab is uniquely positioned at the intersection of open academic research and real-world industry impact, pursuing fundamental and applied robotics research across the full robotics stack, including perception, planning, control, reinforcement learning, imitation learning, simulation, and robotics foundation models. This research aims to transform research paradigms, transfer into NVIDIA’s robotics and simulation products, and create new robotics markets for the world. The Seattle Robotics Lab has published over 500 research papers, including many influential works that have been presented at top robotics, AI, and computer vision conferences. These works include BayesSim , cuRobo , DeXtreme , DiSECT , Factory , GraspNet , IndustReal , ITPS , LAPA , <a href="h

Work Flexibility: Onsite It's Time to Join Stryker! Stryker is seeking a Staff Electrical Engineer to support the design and development of electrical systems and subsystems for complex medical devices. In this role, you will apply your electrical engineering expertise across design, prototyping, testing, troubleshooting, and documentation. You will translate product and customer needs into engineering requirements and robust electrical designs while collaborating closely with cross-functional teams throughout the product development lifecycle. What You Will Do Electrical Design and Development Design and develop electrical components, circuits, and subsystems for medical devices. Translate design inputs and system requirements into electrical engineering specifications and detailed designs. Develop, evaluate, and refine design concepts through analysis, prototyping, simulation, and bench testing. Apply advanced electrical test methods to evaluate component and subsystem performance. Investigate complex technical problems, identify potential solutions, and evaluate design alternatives against product and subsystem requirements. Conduct technical research, analysis, and engineering studies to support design decisions and product development. Assess system-level impacts and dependencies associated with electrical design choices. Verification and Technical Execution Develop and execute test methods to evaluate electrical designs, components, and subsystems. Analyze test results, troubleshoot design issues, and drive problems to root cause and resolution. Apply engineering analysis, modeling, simulation, and statistical methods as appropriate to support design decisions. Partner with other engineering dis

1671 About the Role We are seeking a Senior Signal Integrity Engineer to develop, validate, and optimize high-speed signaling solutions across blade- and rack-level architectures for advanced compute platforms. This role sits at the intersection of silicon, package, interconnect, board, and system design , with a strong emphasis on hands-on measurement, simulation correlation, and cross-functional technical communication. Key Responsibilities End-to-end signal integrity analysis for blade- and rack-level system architectures. Analyze and optimize high-speed and low-speed I/O interfaces, including PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI , I2C, etc . and related interconnects. Perform time-domain and frequency-domain simulations using tools such as Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE , or similar. Support hands-on lab validation using VNA, TDR, BERT, and high-speed oscilloscopes . Correlate simulation results with lab measurements to identify margin gaps, debug issues, and improve design methodology. Collaborate with silicon, package, board, connector, cable, and system design teams to optimize I/O channel performance. Work with interconnect vendors and ODMs to guide board layout, stack-ups, routing rules, and system design decisions. Review schematics, layouts, simulation results, and validation data for blade, backplane, and rack-level hardware. Prepare and communicate clear validation reports, measurement summaries, debug findings, and technical recommendations to internal teams, vendors, and senior technical stakeholders. Required Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field . Strong experience in signal integrity for high-speed digital systems. Hands-on measurement expertise using VNAs, TDRs, BERTs, and high-speed oscilloscopes . Experience measuring and analyzing S-parameters, impedance profiles, eye diagrams, jitter, timing margins, insertion loss, return loss, and cro

About the Team Our Robotics team is focused on unlocking general-purpose robotics and advancing toward AGI-level intelligence in dynamic, real-world environments. Working across the full model and systems stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the physical constraints of real-world systems to improve people’s lives. About the Role We are looking for a PCB Layout Engineer to design high-density electronics for next-generation robotic systems. You will own PCB layout from floor planning through fabrication release, working closely with electrical, SI/PI, mechanical, and manufacturing teams. This role is based in San Francisco and requires in-person presence four days per week. In this role, you will: Own PCB layout, component placement, routing, and fabrication release for complex robotic systems. Collaborate with SI/PI engineers to refine layouts based on simulation results. Implement high-speed routing, controlled impedance, power distribution, decoupling, grounding, EMI/EMC, thermal, and mechanical-integration requirements. Work directly with fabricators and assembly partners to define stack-ups, establish design rules, drive DFM/DFA/DFT reviews, and close findings before release. Prepare fabrication and assembly documentation, including drawings, ODB++, drill files, stack-up tables, and manufacturing notes. Inspect newly received PCBAs and participate in board-level manufacturing failure analysis. Contribute to reusable design constraints and layout workflows, and maintain component-library assets such as symbols, footprints, and 3D models. You might thrive in this role if you: Have 6+ years of experience designing complex, multilayer PCBs. Are fluent in Cadence Allegro PCB Designer and Constraint Manager. Have strong HDI design experience, including fine-pitch BGAs, microvias, blind and buried vias, via-in-pad, and sequential lamination.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Sr Design Engineer, you will work on design, simulation, and validation of next ‑ generation High ‑ Bandwidth Memory (HBM) architectures and circuit blocks. HBM requires advanced DRAM design knowledge combined with deep understanding of 3D stacked architecture, TSV signaling, wide I/O interfaces, PHY timing, power integrity, and system co ‑ optimization with GPUs/accelerators. This role sits at the intersection of DRAM design and high ‑ performance computing, enabling future AI/ML, HPC, and advanced graphics products. In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction.

ABOUT THE BRAND: Callaway Golf Company is a premium golf equipment, gear and apparel company with a portfolio of global brands, including Callaway Golf, Odyssey, TravisMathew, and OGIO. Through an unwavering commitment to innovation and premium craftsmanship, Callaway designs, manufactures, and sells high-performance golf clubs, golf balls, apparel, bags, and other accessories—setting the standard for performance in the game of golf. Our Mission: To create demonstrably superior and pleasingly different products powered by innovative technology and premium craftsmanship enabling golfers of all abilities to play their best and find more joy in the game. Our company is a blend of experience and diverse backgrounds, and together we look to leave the past behind while moving the game forward. For more information, please visit https://www.callawaygolf.com Roles and Responsibilities: Advanced Analytics, Optimization & AI Set the strategy and lead the enterprise warehouse optimization program, leveraging advanced optimization, simulation, and AI to improve slotting, pick-paths, wave/batch planning, and labor capacity; scale proven solutions across the distribution network. Lead the development and deployment of AI-driven operational solutions, including computer vision and machine learning applications that enhance quality, operational efficiency, and warehouse performance. Define and execute the organization’s Generative AI strategy and roadmap, including technology and platform selection, prioritized use cases, pilot programs, adoption and capability building, and responsible AI governance. Drive advanced manufacturing and energ

Where Performance Meets Purpose Join a team that values excellence and innovation, at a company known for its iconic golf brands. At Acushnet Company, your background and experience contribute to creating the best products for dedicated golfers worldwide. Here, your performance has purpose. What You Will Be Doing: Titleist is seeking a passionate and driven Associate Research Engineer to help shape the future of golf club performance through innovation, engineering, and data-driven design. In this role, you will apply engineering principles, scientific methods, and advanced computational tools to explore emerging technologies, analyze golf club designs and biomechanical swing dynamics, and validate concepts that contribute to next-generation Titleist products. Working alongside world-class researchers, engineers, and product designers, you will leverage modeling, simulation, and testing techniques to solve complex design challenges and uncover new opportunities for performance advancement. You'll collaborate across Research, Design, Product Development, Testing, Manufacturing, Sales, and Marketing to evaluate concepts, support product innovation, and translate technical findings into meaningful product improvements. This is a unique opportunity to deepen your expertise in golf club research and development, contribute to patentable technologies, and play a direct role in creating the high-performance products trusted by golfers around the world. What You Bring: Bachelor’s degree in Mechanical Engineering, Engineering, Computer Science, or a related field required. Strong foundation in engineering analysis, problem-solving, and product development. Experience with MATLAB and/or Python required. Exposure

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in artificial intelligence possible! We do it all while committing to integrity, sustainability, and giving back to our communities, because doing so can fuel the very innovation we are pursuing. As a process integration engineer in the DRAM organization, you will be part of a team of world-class engineers who are working in an industry leading 300mm R&D facility on technology which enables future memory scaling. You will focus on the performance and manufacturability of Micron’s cutting-edge next-generation memories. Areas of concentration will include integration and circuit issues specific to DRAM technology. In addition to a broad basis of process integration knowledge, this position will require a strong background in semiconductor device physics. Role interacts significantly with the process development, simulation, modeling, characterization, and reliability groups. Responsibilities include, but not limited to: Lead technology integration activities in enabling manufacturability of state-of-the-art DRAM technology Engage with numerous cross-functional teams including process development, product engineering, design, yield improvement, advanced mask and probe to arrive at solutions to

Job Details: Job Description: The Role and Impact As a SoC Design Verification Engineer, you will play a pivotal role in ensuring that Intel's complex System-on-Chip (SoC) designs meet functional specifications and deliver high-quality performance. You will design scalable and reusable verification plans, develop test environments, and execute tests to uncover issues and improve functionality. Your contributions will directly enhance Intel's product quality and ensure optimal performance in presilicon development. Business Group You will be joining Intel's cutting-edge product development group, a team focused on designing and verifying advanced semiconductor solutions. This group is at the forefront of innovation, delivering high-quality, scalable products that drive Intel's leadership in technology and performance. By contributing your skills here, you will help shape the future of computing and enable groundbreaking advancements in the industry. Key Responsibilities - Define and develop scalable and reusable block, subsystem, and SoC verification plans. - Create test benches and verification environments that align with microarchitecture specifications. - Execute verification plans, including emulation and system simulation models, to ensure design functionality and uncover bugs. - Debug and root cause issues in presilicon environments, implementing corrective measures to address failures. - Collaborate with architects, RTL developers, postsilicon teams, and physical design teams to improve verification of complex architectural features. - Document and maintain test plans, driving technical reviews with design and architecture teams. - Integrate security coverage activities within test plans, including regression and debug tests. - Maintain and improve

Experienced Electro-Optical Infrared Design, Assembly, Integration, and Test Engineer Company: The Boeing Company Boeing Defense, Space and Security (BDS) is looking for an Experienced Electro-Optical Infrared Design, Assembly, Integration, and Test Engineer (Level 3) to join our team in Huntington Beach or El Segundo, California. This position will be joining a team of engineers, analysts and staff within the Space and Missile Systems (SMS) and Boeing Technology and Innovation (BTI) Mission Systems organizations in the development, assembly, integration, and test of a constellation of satellites. The SMS and BTI organizations develop and capture technology for designing disruptive Mission Systems solutions. Focused on visible and infrared spectrum Electro-Optics Infrared (EO/IR) sensors operating in Space and Air domains, our growing team is leaping ahead of our competition with an exceptional mix of mission architectures, sensor designs, and algorithms for advanced image and data processing. Position Responsibilities: Develops and validates requirements for various communication, sensor, electronic warfare and other electromagnetic systems and components Develops and validates electromagnetic requirements for electrical\electronic systems, mechanical systems, interconnects and structures Develops architectures to integrate systems and components into higher level systems and platforms Performs trade studies, modeling, simulation and other forms of analysis to predict component, interconnects and system performance and to optimize design around established requirements Defines and conducts tests to validate performance of designs to requirements Manages appropriate aspe

Job Details: Job Description: Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum IC Substrate Package Layout Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for design of large form factor IC substrates within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing. Key Responsibilities - Design of IC substrates using Siemens Xpedition IC package design software - Work closely with stakeholders to meet design requirements - e.g., receive feedback from silicon testchip, signal integrity (SI), power integrity (PI), thermal simulation, and system integration engineers - Deliver and disseminate design milestones to stakeholders - Design validation and verification; including DRC and LVS - Advanced packaging design integration (2.5D and 3D) with IC substrate - Tapeout of designs with substrate suppliers in collaboration with Intel substrate teams - Communicate designs in presentations and relevant documentation - Stay curre