Advanced Cmos Device And Process Integration Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. As a Principal Engineer, you will be an integral part of our HIG HBM Team in Hyderabad, India, responsible for designing and developing complex Application-Specific Integrated Circuits to meet our product's specifications and requirements for High Bandwidth Memories, working for intensive applications such as artificial intelligence and high performance computing solution. Your expertise will contribute to the successful realization of pioneering semiconductor products, enabling our company to maintain its competitive edge in the industry. Role and Responsibilities Must have a solid understanding of die design . This includes knowledge of various die components, their functions, and how they interact within the overall tool. Familiarity with the principles of die design is essential to create effective and efficient layouts. Industry Involvement : You actively participate in standards committees, representing Micron and staying informed about industry developments. Leading Project Layout Team : You lead the establishment and growth of a layout team to meet Micron’s global HBM layout requirements. Technical Expertise :

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are looking for Layout Design engineer at our Micron Technology’s HBM Team in Hyderabad, India. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Role and Responsibilities • Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. • Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design • Perform layout verification like LVS/DRC/Antenna, quality check and documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. • Guide junior team-members in their execu

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are looking for Layout Design engineer at our Micron Technology’s HBM Team in Hyderabad, India. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Role and Responsibilities • Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. • Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design • Perform layout verification like LVS/DRC/Antenna, quality check and documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. • Guide junior team-members in their execu

About Sentry Software runs the world and the pace is faster than ever. Sentry helps developers fix errors and performance issues before users notice, so teams can spend less time firefighting and more time building. Trusted by 200,000+ organizations, Sentry is today’s application monitoring standard and our team is building its AI-native future. Ready to build the future of mobile app monitoring? This is no ordinary engineering role. At Sentry, our Mobile SDK team creates the next generation of tools for developers worldwide, processing over a billion events every single day. We're looking for a talented Senior iOS SDK Engineer to join our team of experts. You'll dive deep into Apple's most advanced technology, from powerful new APIs and SwiftUI to Foundation Models. If you love using cutting-edge tech to solve complex challenges, you've found your team. What you will achieve in this role As the owner of our iOS SDK, you will guide its development from the core architecture to the final product experience. You'll pioneer exciting new features like Session Replay and next-generation performance monitoring, all while mastering Apple's latest innovations like modern concurrency and on-device AI. You will design robust, high-quality APIs built to handle massive scale, and you'll get to shape the overall vision for mobile at Sentry. Ultimately, you will be the go-to expert, helping our teams solve the most complex and interesting customer challenges. Why you will love this role We're looking for someone who is passionate about their craft and loves building elegant, intuitive tools that other developers are excited to use. You'll have the chance to contribute full-time to a major open-source project and see the immediate impact of your work in our fast-paced environment. You will be surrounded by thoughtful, collaborative engineers who are dedicated to a culture of excellence, constantly pushing each other to learn, grow, and produce their best work. Qualifications 5+ ye

About the team The AI Deployment Engineering team works closely with frontier startups. We are trusted advisors to, and thought partners with, startups to ensure that OpenAI’s technology is deployed safely and effectively, whilst also partnering with engineering, research, and product to turn those insights into evaluation systems, product improvements, and better model behavior. This team sits at the intersection of customer reality and model quality. We combine hands-on technical depth with strong product judgment, helping translate complex, high-value use cases into clear signals that can improve both the customer experience and the underlying systems. About the role We are seeking a technically proficient, product-minded engineer to help push the frontier of advanced AI with our strategic startup customers. You'll work with some of the most exciting AI startups in the world, helping them optimize their own systems and turning those learnings into durable improvements across OpenAI’s research and products. You will partner deeply on complex workflows, identify the gaps that matter, and help transform those gaps into reproducible evaluations, technical insights - helping shape OpenAI's research and product direction. This role is well suited to engineers who are equally comfortable debugging a workflow, iterating on prompts or agents, designing evaluations, and collaborating across research and product. You should be excited by ambiguous, high-impact problems and motivated by the opportunity to shape how advanced AI systems improve in practice. This role is based in London. We use a hybrid work model of 3 days in the office per week. We offer relocation assistance. In this role, you will: Work directly with strategic startup customers to understand critical workflows, uncover failure modes, and identify high-impact opportunities for improvement. Prototype and iterate on prompts, agents, and workflow designs to better understand system behavior and unlock customer

About the Team DoorDash Labs is an independent team within DoorDash. We explore robotics and automation to transform last-mile logistics in the long term. If you have a passion for applying robotics solutions in a service used by millions of people, then we want to talk to you! About the Role You will be a fundamental and experienced member of the Service Operations team at DoorDash Labs. You will complete more advanced diagnostic and repair work to maximize uptime, supporting our overall fleet utilization goals. You will report to the Associate Operations Manager, Service, in our DoorDash Labs organization. This is an on-site role with expectations of 100% in-office in Fremont, CA, San Jose, CA, or Sunnyvale, CA. You’re excited about this opportunity because you will… Execute any Senior Service Technician task and: Diagnose complex, intermittent, or unusual faults in robotic systems, modular components, and support vehicles, often requiring advanced troubleshooting techniques and interpretation of complex data Perform advanced repairs, including component-level troubleshooting and fixes on intricate electrical systems, control units, and associated hardware, with minimal supervision Interpret complex technical manuals, schematics, and diagnostic flowcharts to guide troubleshooting efforts Meticulously document complex diagnostic processes, root cause hypotheses, non-standard troubleshooting steps, repair details, and component failure information in the service management system, contributing potential updates to the knowledge base Provide technical guidance, mentorship, and on-the-job assistance to Level 2 Technicians for challenging tasks Work independently to manage and prioritize assigned workload effectively Calibrates, configures, and maintains specialized diagnostic tools and test equipment We operate 7 days a week, 16 hrs a day to support Robot Operations. During training, you will be on a temporary schedule until your on-the-job training is completed

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are looking for Layout Design engineer at our Micron Technology’s HBM Team in Hyderabad, India. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Role and Responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Guide junior team-members in their execution of Sub block-level layouts & review their work Cont

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tape-out. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. Key Responsibilities Own physical implementation for SoC blocks and/or top-level, including floor-planning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust physical integration and timing/power integrity. Perform and/or coordinate physical signoff, including DRC/LVS, IR drop/EM, and timing signoff, addressing violations efficiently. Partner with DFT teams to ensure scan/MBIST requirements are physically realizable and do not compromise PPA or schedule. Work with packaging, assembly, test, probe, and manufacturing collaborators to ensure builds meet manufacturability and quality requirements. Support tape-out execution (checklists, ECO flows, signoff r

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description As a QEM PQE Quality engineer, you will be responsible to monitor and drive continuous improvement for the quality and reliability of cutting-edge memory/storage products manufactured in Fab10. Support the wafer manufacturing efforts for developing, validating, characterizing, and qualifying new products, enabling volume manufacturing with improved reliability performance to fulfill customer requirements. Leverage the knowledge of electrical operation and wafer fabrication technology of advanced NAND memory products to conduct root cause understanding for reliability failures or customer returns, and facilitate the implementation of required Fab specifications and documentation to ensure product quality meets or exceeds customer expectations. Job Responsibility: • Responsible for monitoring and improving Quality and Reliability for products out of Fab, including wafer level reliability sampling for Outgoing Quality Control. • Responsible to collect wafer level reliability data, manage various Reliability scorecard, and drive fab activities to improve Reliability performance (Extrinsic, Intrinsic, Process) for continuous improvement. • Ensure proper reliability and quality indicators inclu

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s Technology Development Group, where we turn advanced materials into manufacturable memory technology. Our thin films teams work at the groundbreaking edge of DRAM scaling, partnering across R&D, manufacturing, and suppliers to enable future nodes. We operate in a fast paced, hands‑on environment where strong fundamentals and execution matter! As a Thin Films Engineer, you will develop and integrate deposition processes that directly enable Micron’s next-generation DRAM! This role owns thin film concepts from early development through high‑volume manufacturing, with a strong focus on EUV patterning films. You will work closely with cross‑functional teams and external partners to deliver robust, scalable processes that meet aggressive technology requirements. Responsibilities: Develop, optimize, and transfer thin film deposition processes for EUV‑enabled DRAM technology Lead process characterization, troubleshooting, and defect reduction through VME Drive thin film roadmap activities aligned to future technology nodes Collaborate with internal teams and suppliers to mature equipment, chemistries, and process solutions Analyze large physical and electrical datasets and communicate clear recommendations Minimum Qualifications: PhD or MS with 4+ years of semiconductor experience in materials or process development Strong foundation in materials science, chemical reaction engineering, and thin film physics H

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities: Successfully implement and coordinate transportation logistics to achieve the goal of on-time delivery Develop and align warehouse policies and procedures to ensure compliance with all relevant regulations Uses advanced SAP functions, such as goods receiving, goods issuance, goods return, inventory control and product shipping Work with stakeholders to meet customer needs, optimize inventory levels, and space optimization Participate in special projects and coordinate implementation of warehouse management and provide technology solutions for problem-solving Support on regular internal/external audits and performance reviews of local warehousing operations, identifying improvement opportunities and implementing corrective actions Qualifications & Skills: Strong communication and interpersonal skills to effectively collaborate with diverse teams Proven experience managing warehouse/logistics, including inventory maintenance, transportation, and layout Ability to compete in a fast-paced environment and balance multiple tasks simultaneously Be familiar with various systems operations and applications (e.g., SAP, basic MS Office programs) Increase knowledge of material safety concerns Monitors warehouse space utilization and bin location

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s Technology Development Group, where we turn advanced materials into manufacturable memory technology. Our thin films teams work at the groundbreaking edge of DRAM scaling, partnering across R&D, manufacturing, and suppliers to enable future nodes. We operate in a fast paced, hands‑on environment where strong fundamentals and execution matter! As a Thin Films Engineer, you will develop and integrate deposition processes that directly enable Micron’s next-generation DRAM! This role owns thin film concepts from early development through high‑volume manufacturing, with a strong focus on EUV patterning films. You will work closely with multi-functional teams and external partners to deliver robust, scalable processes that meet aggressive technology requirements. Responsibilities: Develop, optimize, and transfer thin film deposition processes for EUV‑enabled DRAM technology Lead process characterization, troubleshooting, and defect reduction through VME Drive thin film roadmap activities aligned to future technology nodes Collaborate with internal teams and suppliers to mature equipment, chemistries, and process solutions Analyze large physical and electrical datasets and communicate clear recommendations Minimum Qualifications: PhD or MS with 4+ years of semiconductor experience in materials or process development Strong foundation in materials science, chemical reaction engineering, and thin film physics H

About the Team The Core Network Engineering team owns the end-to-end networking stack that connects OpenAI’s compute infrastructure — spanning global WAN/edge connectivity, data-center networking, and high-performance host/xPU networking used for large-scale training and inference workloads. This team is responsible for ensuring networking is never the bottleneck to model training efficiency, cluster reliability, or fleet expansion. They design and operate the systems that provide predictable, high-throughput, low-latency connectivity across some of the world’s most advanced AI infrastructure. About the Role We’re looking for engineers to help build and operate the networking foundation behind OpenAI’s frontier AI systems. Depending on your background and area of focus, you may work across host networking, datacenter fabrics, or global WAN infrastructure. The problems span low-level systems software, distributed infrastructure, protocol readiness, observability, performance engineering, automation, and large-scale network operations. You’ll work on systems where microseconds of latency, tail performance, and network reliability directly impact model training efficiency and production serving performance. This role is ideal for engineers who enjoy operating close to the hardware/software boundary and solving performance-critical infrastructure problems at massive scale. In this role, you will: Design, build, and operate networking systems that support large-scale AI training and inference infrastructure Improve performance, reliability, and scalability across host networking, datacenter fabrics, and WAN systems Develop automation for provisioning, configuration management, validation, upgrades, and lifecycle management of networking infrastructure Build tooling and observability systems for network health, performance analysis, debugging, and automated remediation Optimize network performance across technologies such as RDMA, RoCE, InfiniBand, Ethernet, and high-perf

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job / Role Summary The Staff Engineer delivers module/sub-module ownership in NAND Advanced Thin Films process development, owning defined portions of the process space (dielectric/carbon film processes via CVD/Diffusion) and driving robustness, capability, and integration readiness. Success requires strong hands-on deposition/characterization skills, cross-functional execution discipline, and the ability to translate experimental results into scalable process improvements. Main Responsibilities Process Development & Optimization Develop, optimize , and characterize thin film processes (CVD/Diffusion) to meet performance, reliability, and manufacturability targets. Execute well-designed experiments, analyze data, and translate results into process improvements . Support scaling of dielectric and carbon film processes across nodes

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job / Role Summary The Principal Engineer provides technical leadership for NAND Advanced Thin Films, defining technical direction and driving the strategic advancement and integration of sophisticated structural and electrical film processes into manufacturing. Success requires proven leadership in thin film module development, strong cross-functional influence, deep characterization and correlation capability, and strong judgment in technical tradeoffs for manufacturability, scaling, yield, and reliability. Main Responsibilities Define and implement technical strategy for structural and electrical film process development aligned to business and technology objectives . Lead multi-functional teams to develop, integrate, and scale thin film processes for advanced NAND structures/devices. Oversee end-to-end development of process modules with