Advanced Cmos Device And Process Integration Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In your role as a Staff / Principal Wafer Bonding Process Engineer within Micron Technology's DRAM Technology Development group, you will join a worldwide memory development organization. You will contribute to developing modern wafer bonding process technology that keeps Micron at the forefront of memory technology. This position is important because it directly affects product quality, reliability, yield, cost savings, efficiency, and risk control. You will initiate, develop, and fine-tune bonding processes while addressing manufacturing line challenges. You will also manage process, equipment, and material evaluations and improvements to apply changes at various process steps. Your duties include leading and engaging in activities to improve yield and reduce costs, overseeing new process baseline qualifications, and collaborating with suppliers to achieve quality, cost, and risk objectives. You will use AI/ML/LLM tools to boost efficiency and maintain flawless operations. Responsibilities include, but not limited to: Develop and optimize wafer bonding processes to enable next-generation DRAM technologies. Plan and execute experiments (DOEs) to improve process performance, product quality, and reliability. Drive yield improvement, cost reduction, and productivity initiatives using data-driven problem solving. Evaluate and qualify new equipment, materials, and process technologies for development and manufacturing. Collaborate with manufacturing, suppliers, and cross-

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks: • Establish and improve process condition and technology. • Upgrade process capability and reduce production cost. • Establish and modify process management projects. • Set up process parameters for a variety of semiconductor equipment. • Evaluation, promotion and planning of new equipment / materials. • Abnormal analysis and improvement. AI Relevant Job Responsibilities: - Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. - Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. - Ability to apply baseline digital fluency and role‑appropriate AI literacy to use AI‑enabled tools responsibly and effectively for research, analysis, content creation, problem‑solving, operational tasks, and achieving business About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and op

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Yield Technology Equipment group helps the fab learn faster by delivering defect detection, metrology, and analysis where it matters most. We work side by side with process teams to surface risks early, protect yield, and enable smooth process transitions. We value safe operations, trustworthy data, and teamwork! In this RDA Applications Engineering role, you will own inspection equipment strategies that keep critical learning flowing through Technology Development and manufacturing. You’ll work hands‑on with optical inspection tools while partnering with engineers and vendors to detect standard process defects as well as close defect gaps and improve tool efficiency across the factory. Responsibilities: Develop and maintain inspection recipes to find Defects of Interest (DOI), close defect gaps, and improve automation Partner with module owners to ensure recipe quality and resolve issues Lead projects to improve inspection efficiency, sampling strategies, and new techniques Coordinate vendor applications engineering work Serve as a technical liaison between Micron engineering teams and equipment suppliers Collaborate with RAM (RDA and Metrology) Equipment Sustaining Team to track tool maintenance, SPC charts, and monitor vendor support Minimum Qualifications: Bachelor’s degree or equivalent experience in Engineering or Physics Knowledge of semiconductor equipment and fabrication processes Experience analyzing data to support da

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In the OMT manufacturing area, be responsible for a designated area, working closely with Subject Matter Experts (SMEs) related to processes, equipment, and production to analyze overall machine performance and drive systematic improvements. Transform analysis results into actionable on-site improvement actions and assist cross-teams in tracking improvement progress and effectiveness. Regularly conduct weekly/monthly OEE analyses to systematically identify performance gaps and propose specific and prioritized improvement recommendations. Be responsible for P2P (Plan-to-Performance) monitoring of the area, ensuring baseline performance aligns with planned goals and promptly identifying deviation risks. Assist in establishing and optimizing the area-level OEE indicator framework and analysis methodology to improve consistency and analysis efficiency across areas and sites. Compare machine or process performance across different sites to identify replicable and scalable best improvement models. Collaborate and exchange ideas across regions with SMEs and Global Team experts from other sites, sharing analytical methods and improvement experiences to disseminate results and maximize benefits throughout the Micron network. Establish and participate in OEE Task Forces based on operational or project needs, enabling rapid cross-area support and resource integration to complete tim

About AlphaSense: The world’s most sophisticated companies rely on AlphaSense to remove uncertainty from decision-making. With market intelligence and search built on proven AI, AlphaSense delivers insights that matter from content you can trust. Our universe of public and private content includes equity research, company filings, event transcripts, expert calls, news, trade journals, and clients’ own research content. The acquisition of Tegus by AlphaSense in 2024 advances our shared mission to empower professionals to make smarter decisions through AI-driven market intelligence. Together, AlphaSense and Tegus will accelerate growth, innovation, and content expansion, with complementary product and content capabilities that enable users to unearth even more comprehensive insights from thousands of content sets. Our platform is trusted by over 6,000 enterprise customers, including a majority of the S&P 500. Founded in 2011, AlphaSense is headquartered in New York City with more than 2,000 employees across the globe and offices in the U.S., U.K., Finland, India, Singapore, Canada, and Ireland. Come join us! About the Role: As a Staff Quality Engineer on the Content Portfolio team, you will own and drive test strategy, build automation frameworks, and embed a culture of quality ownership across the engineering organization. Your deep expertise in automation, cloud services, Kubernetes, and modern programming languages will directly shape how we test, release, and deliver reliable software at scale. You will partner closely with developers, product managers, and platform teams to define test requirements, architect quality infrastructure, and ensure AlphaSense ships with confidence at velocity. You will: Lead the development of test automation frameworks across UI, API, and GraphQL layers, focusing on reliability, maintainability, and speed Design and integrate AI evaluation frameworks to assess accuracy, consistency, and reliability of LLM-powered features L

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the Customer Engineering team at Micron, where we partner directly with leading datacenter customers to solve complex challenges and bring cutting-edge memory solutions to life. Our work sits at the intersection of innovation and real-world impact—enabling faster computing, smarter systems, and breakthroughs across industries. This role is a key bridge between Micron and our customers. As a Datacenter DRAM Customer Engineer, you’ll act as a primary technical advisor, helping customers design, qualify, and deploy memory solutions that power next-generation compute platforms. You’ll collaborate across engineering, sales, and product teams while influencing both customer success and Micron’s product direction. Responsibilities: Drive design wins and product qualifications for DRAM, HBM, SSD, and compute-focused solutions Partner with sales and cross-functional teams to execute strategic customer plans and track progress Resolve system configuration, setup, and performance issues in customer environments Guide customers on memory architecture, system configuration, and optimization for cloud/datacenter workloads Support validation and deployment through lab activities, design reviews, and system-level testing utilize AI proficiency or AI‑enabled ways of working where applicable Minimum Qualifications: <s

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking an experience high-speed high-speed IO/Clocking Design Engineering at a Principal/Sr Member of Technical Staff (SMTS) level to join our DRAM IP Design team and contribute to the development of critical high-speed IP circuits used across Micron’s DRAM memory products. In this role, you will be responsible for the architecture, design, development, optimization, verification, and technical support of these high-speed IPs. You will focus on equalization and bandwidth extension to push the limits of circuit and process performance, analyze IO impairments as well as clock jitter and duty cycle distortion, and assess their impact on DRAM system timing. You will also develop core strategy and implement effective engineering solutions to address these challenges. Relocation to Micron headquarter in Boise, Idaho is required for this position. Responsibilities: Define, innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply robust high-speed circuit design techniques and enhance critical performance evaluation, including timing and jitter sensitivity, of the IO data path and clock path at circuit and full-chip level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation resu

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal/Member of Technical Staff (MTS) IO/Clock Design Engeer to join our DRAM IP Design team and contribute to the development of critical high-speed IP circuits used across Micron’s DRAM memory products. In this role, you will be responsible for the design, development, optimization, verification, and technical support of these high-speed IPs. You will focus on equalization and bandwidth extension to push the limits of circuit and process performance, analyze IO impairments as well as clock jitter and duty cycle distortion, and assess their impact on DRAM system timing. You will also develop and implement effective engineering solutions to address these challenges. Relocation to Micron headquarter in Boise, Idaho is required for this position. Responsibilities: Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply robust high-speed circuit design techniques and enhance critical performance evaluation, including timing and jitter sensitivity, of the IO data path and clock path at circuit and full-chip level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities. Collaborate with process integration and transistor

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As the Product Quality Engineering PQA Sr. manager, your role involves ensuring that DRAM products shipped from Micron Taiwan Frontend Manufacturing meet customer requirements in terms of performance and reliability. Simultaneously, you aim to minimize the overall Cost of Non-Conformance. In that, your responsibilities include for the comprehensive monitoring and analysis of probed wafers for potential Quality and Reliability risks and for the technical standard of the fail mode modelling on which the disposition decision is based. Collaborating with GQ and PE, you continuously improve product test coverage and setting of appropriate warning and screen limits to prevent escapes to Backend and Customer. Concurrently, your mission is to provide guidance for process improvements to enhance the baseline Probe-to-Ship yield and the overall ratio of prime Product Grading available for Micron shipment. In collaboration with Process QE and Fab Operation you assure the comprehensive Problem Solving of deviations that occur and seamless implementation of Preventive Actions and Shift-Left detection points. You also ensure that manufacturing process/equipment changes impacting products undergo a full risk assessment and qualification process by using AI methodlogy and solution. Responsibilities include but are not limited to the following: Define and maintain critical quality metrics aligned with business objectives Establish clear goals and aggressive timelines to achiev

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities: Leveraging AI in procurement strategies Lead Site Supplier Performance and Relationships Own procurement process for designated areas and accounts Negotiate with suppliers to meet business needs Support capital budgeting and cash flow management, and the execution of Global Procurement strategies Handle cost saving initiatives and metric Implement cost savings and process improvement programs Have deep knowledge to serve as a consultant for procurement process and supplier issues. Support site audits AI proficient to utilize in procurement domain AI‑enabled ways of working where applicable About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.c

About Dialpad Dialpad is the AI platform for customer experience, built to resolve customer problems in real time across voice and digital. Our AI agents learn from your best human agents and improve with every interaction, helping organizations understand their customers, deliver better experiences, increase operational efficiencies, and build a lasting competitive advantage. Unlike legacy systems built to route and answer, or standalone agentic bot vendors built to deflect, Dialpad was built to resolve. Our AI agents and human agents operate on a single platform with shared context, allowing Agentic AI to resolve issues, advance deals, and eliminate busywork through automation while seamlessly handing conversations to humans when needed, with full context preserved. Market-leading brands, including Randstad, Motorola Solutions, Netflix, the San Diego Padres, the Colorado Rockies Baseball Club, and Cal Athletics, trust Dialpad. Dialpad is backed by Andreessen Horowitz, GV, ICONIQ Capital, and T-Mobile. Being a Dialer At Dialpad, AI isn’t just a feature; it’s how our teams do their best work every day. We put powerful AI tools in every employee’s hands so they can move faster, think bigger, and achieve more. We believe every conversation matters. And we’ve built the platform that turns those conversations into insight and action, for our customers and ourselves. We look for people who are intensely curious and hold themselves to a high bar. Our ambition is significant, and achieving it requires a team that operates at the highest level. We seek individuals who embody our core traits: Scrappy, Curious, Optimistic, Persistent, and Empathetic . Your Role As a Sales Engineer, you’ll own running demos and proofs of concept, including gathering success criteria, system configuration, admin training, user training, and troubleshooting. You’ll work closely with Account Executives to identify key customer requirements and present Dialpad solutions that meet those requirement

Who we are About Stripe Stripe is a financial infrastructure platform for businesses. Millions of companies—from the world’s largest enterprises to the most ambitious startups—use Stripe to accept payments, grow their revenue, and accelerate new business opportunities. Our mission is to increase the GDP of the internet, and we have a staggering amount of work ahead. That means you have an unprecedented opportunity to put the global economy within everyone’s reach while doing the most important work of your career. About the team Trust is central to Stripe’s mission to grow the GDP of the internet and the Risk team advances that mission by building products and infrastructure that Stripe businesses, Stripe product teams, and Stripe’s network of regulators and financial partners rely on. From helping businesses onboard to Stripe to managing regulatory compliance at scale, Risk is at the center of what makes Stripe run. The Technical Program Manager team is responsible for delivering the cross-Stripe programs that help businesses grow on Stripe, enable products to launch safely at scale, and Stripe to maintain its position as the most trusted network in the financial ecosystem. What you’ll do You will lead a team of TPMs and PGMs to deliver on Stripe’s most complex, cross-cutting, and critical programs. As a manager, you will support your team in leading programs that advance Stripe and Risk’s mission. You’ll hire, coach, and grow a team of excellent TPMs that support Stripe’s growing needs and the individuals’ careers. You will also act as a TPM yourself on the most complex initiatives that uniquely need your hands-on leadership. Responsibilities Build, lead and manage high-performing teams, managers, and individuals, across multiple locations, including providing performance reviews, continual feedback, and career growth. Define and deliver on long-term vision and multi-year strategy for company-wide programs collaborating with product management and engineering lead

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in memory and storage solutions, accelerating the transformation of information into intelligence to help the world learn, communicate, and advance faster than ever. Micron Global Procurement is a critical engine of Micron’s growth—delivering best‑in‑class total cost, supply chain resiliency, and value through predictive capabilities, risk analysis, sustainability, and supplier diversity. We invest deeply in our people through skills‑based development, clear career pathways, and an inclusive, globally connected culture. Role Overview As Senior Manager, AI Transformation , you will lead the strategy, execution, and scaling of Micron Global Procurement’s agentic AI ecosystem . This role is responsible for driving AI adoption at scale, uplifting AI and automation capabilities across the global GP organization, and managing teams that design and deliver AI‑powered solutions using low‑code/no‑code and professional development platforms. This role spans both citizen developers and professional developers —from empowering business users to safely build AI‑assisted workflows, to guiding team members delivering production‑grade, enterprise agentic AI solutions. Strong focus areas include user experience, measurable business value, and responsible AI adoption . This is not an IT role , but it requires close partnership with IT, Security, Data,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron's Data Center Workload Engineering team tests how memory and storage products perform in complete data center systems. We deploy customer-representative AI, database, virtualization, and software-defined storage workloads in production-class labs. We trace I/O from the application through the system to the SSD to explain performance and identify opportunities to improve it. As a Principal Systems Performance Engineer, you will lead complex performance studies from the initial question through the final recommendation. You will personally lead the hardest investigations while setting technical direction for the team. Your work will guide SSD architecture and product development and help customers get the best performance from Micron products. This is a hands-on senior individual-contributor role. Key Responsibilities Lead application performance studies on enterprise servers, GPU-accelerated systems, and data center storage platforms. Deploy customer-representative workloads across one or more areas, such as AI training and inference, checkpointing, KV-cache offload, data preparation, databases, virtualization, and software-defined and object storage. Develop test plans with clear hypotheses, realistic configurations, appropriate controls, and repeatable methods. Instrument systems and trace I/O from the application through the software and storage stack to the SSD. Measure application throughput

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Position Overview The Principal Design Engineer in Micron’s NVEG organization contributes to the development of new memory products by assisting with the overall design, layout, and optimization of datapath circuits for NAND flash memory. This position will drive task forces and make strategic decisions on major datapath architectural changes influenced by new design specs such as higher speed/lower power. They will assess pros and cons of new architecture and drive all activities pertaining its implementation. The role will be expected to lead technical datapath design projects, directing the design planning, layout, and validation activities according to project timelines. Responsibilities Design and optimize TSV(Through-Silicon Via) interface circuits connecting memory die to logic die including Rx/Tx circuit for internal TSV channels, impedance matching and timing margin analysis. Develop and characterize TSV electrical models and define circuit design constraints for datapath interface. Define and implement signal integrity requirements for the TSV channel, including eye margin, crosstalk, and noise budget analysis Define and implement power integrity requirements using TSV for highly parallel IO and array operations Design and verify TSV-specific DFT (Design for Testability) circuits including loopback test modes, TSV continuity checks, and lane redundancy/remapping logic Interface with process technology and DTCO teams to optimize TSV de