Advanced Cmos Device And Process Integration Engineer Jobs

About Graphcore Graphcore is a global leader in artificial intelligence computing systems. We design advanced semiconductors and data center hardware that deliver the specialized processing power needed to advance AI while improving the efficiency required for broad adoption. As part of SoftBank Group, Graphcore belongs to a family of companies developing some of the world's most transformative technologies. Our AI Engineering Campus in Austin plays an important role in building the future of AI computing. The Opportunity As Technical Services Director, you will lead the teams that operate and evolve Graphcore's engineering labs, high-performance computing (HPC) platforms, and data center environments globally. You will be accountable for reliable, secure, cost-effective infrastructure that supports demanding engineering, AI, silicon-development, and validation workloads. This role combines people leadership, infrastructure strategy, operational excellence, capacity and financial planning, procurement, and program delivery. You will partner with Engineering, Information Technology, Security, Finance, Facilities, Supply Chain, customers, and external suppliers. The position is based onsite in Austin and requires travel to company facilities, data centers, and supplier locations, including international travel. What You'll Do Lead, recruit, mentor, and develop the systems administration, lab operations, and technical services teams responsible for the facility supporting global Engineering and Research and Development. Own the reliability, efficiency, protection, safety, supportability, and continuous improvement of engineering labs, HPC systems, and infrastructure facilities. Establish service levels, operating standards, escalation paths, performance measures, monitoring, observability, automation, ticketing, and configuration-management practices. Translate engineering and customer requirements into infrastructure roadmaps, capacity p

About Us Pearl is AI for professional services at global scale, combining advanced AI with verified human expertise to deliver help that is accurate, accountable, and fast. Since 2003, our network has connected millions of customers with licensed professionals across 196 countries, making real expertise available anytime, anywhere. Our Values Data driven: Start with truth, measure what matters. Courageous: Bias to action; run toward hard problems. Innovative: Seek novel, elegant solutions. Lean: Do more with less. Build, ship, learn fast. Humble: Strong opinions, lightly held. About the Role As a Software Engineer on the Quality team, you will help build, maintain, and improve business-critical systems that support Pearl’s core business and the future of B2P migration efforts. This role is ideal for a full-stack engineer who enjoys working across both front-end and back-end development, solving complex technical problems, and collaborating closely with product and business stakeholders to shape practical solutions. You’ll contribute to new feature development, improve existing systems, and help strengthen engineering practices within the team. This is a strong opportunity for an engineer who is eager to grow long-term, work on high-visibility initiatives, and contribute to systems that directly impact important business operations. What You’ll Do Design, develop, maintain, and enhance reliable, scalable software across front-end and back-end systems. Build user-facing features and the back-end services that support them. Partner with product and business stakeholders to clarify requirements and develop effective technical solutions. Contribute to business-critical initiatives, including B2P migration efforts and improvements to core operational systems. Write clean, maintainable, and well-tested code that supports overall system quality and reliability. Use SQL and application data flows to support functionality, troubleshoot issues, and improve system

About Us Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Job Summary Working within the logical design team, the silicon logical design engineer is responsible for a wide range of logical design tasks. The team is responsible for delivering the Microarchitecture and RTL design to implement the chip architecture specification for Graphcore Silicon, working closely with other engineers within the Silicon team. The successful candidate will be responsible for helping the team deliver high quality micro-architecture and RTL for Graphcore chips, working within the logical design team and with the broader Silicon team to ensure we meet the company objectives for Silicon delivery. Responsibilities and Duties Integrate IP and subsystems into top-level SoC designs Develop and maintain build and configuration environments Perform synthesis, linting, CDC/RDC, and timing checks at the SoC level Support verification and physical design teams through clean interface hand-offs Debug and resolve integration-related issues across multiple hierarchies Contribute to the continuous improvement of integration flows and automation Producing high quality microarchitecture and other documentation Ensure good communication between sites to maintain consistent working practises Candidate Profile Essential skills: Logical design experience in relevant industry Experience range 4-8 years in Semiconductor Industry/Product development exposure. Be highly motivated, a self-starter, and a team player Ability to work across teams and debugging issues seen to find root caus

About the Team OpenAI’s Industrial Compute team is building and productizing infrastructure capabilities that help organizations deploy and operate advanced AI systems at scale. The team works across AI hardware, systems engineering, physical infrastructure, and customer delivery to turn emerging technologies into reliable, repeatable infrastructure solutions. Our work sits at the intersection of technical strategy, product development, engineering, and deployment. We partner closely with customers and internal engineering teams to solve complex infrastructure challenges spanning compute, power, cooling, controls, and facility efficiency. About the Role We are seeking a senior, hands-on Data Center Infrastructure Architect to develop and optimize the physical infrastructure required for large-scale AI deployments. This is a broad technical role spanning data center architecture, electrical and mechanical systems, high-density compute, controls, telemetry, and digital modeling. You will use simulation, operational data, and digital-twin approaches to evaluate infrastructure designs, identify system-level constraints, and improve efficiency, reliability, cost, and speed of deployment. The ideal candidate can move fluidly between first-principles analysis, facility and equipment design, computational modeling, engineering review, and real-world implementation. You should be comfortable working across disciplines rather than operating solely within electrical, mechanical, or software boundaries. Key Responsibilities Define system-level architectures for high-density AI data centers across power, cooling, IT equipment, controls, and facility infrastructure. Develop digital twins and other computational models that represent the behavior of data center systems under changing workloads, environmental conditions, equipment configurations, and failure scenarios. Use design and operational data to identify constraints, improve PUE and related efficiency metrics, and optimize

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description: As a QEM PQE Quality engineer, you will be responsible to monitor and drive continuous improvement for the quality and reliability of cutting-edge memory/storage products manufactured in Fab10. Support the wafer manufacturing efforts for developing, validating, characterizing, and qualifying new products, enabling volume manufacturing with improved reliability performance to fulfill customer requirements. Leverage the knowledge of electrical operation and wafer fabrication technology of advanced NAND memory products to conduct root cause understanding for reliability failures or customer returns, and facilitate the implementation of required Fab specifications and documentation to ensure product quality meets or exceeds customer expectations. Job Responsibility: Responsible for monitoring and improving Quality and Reliability for products out of Fab, including wafer level reliability sampling for Outgoing Quality Control. Responsible to collect wafer level reliability data, manage various Reliability scorecard, and drive fab activities to improve Reliability performance (Extrinsic, Intrinsic, Pro

"The job purpose of a Cluster Manager - Diffusion in cell process within solar manufacturing is to accelerate the adoption and integration of advanced cell processing technologies among solar companies. This role involves strategizing, coordinating collaborations, managing resources efficiently, and advocating for policies that support innovation and industry growth. The goal is to enhance operational efficiency, competitiveness, and sustainability within the solar manufacturing sector. Design DOEs for emitter layer, Junction performance enhancement, ECV profiling. Circulate within team and complete tast within speacific time interval Source: Adani Group | Job ID: 57353

About the Team: OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. In this role you will: As a Hardware Test Engineer, you will work on Machine Learning/AI hardware system projects to craft the solutions for current and future data center deployments. You will bring a strong understanding of hardware system testing, excellent project management skills, and the ability to collaborate across multiple teams to ensure efficient lab operations. You will be responsible for designing, implementing, and executing comprehensive test plans that ensure the reliability, performance, and scalability of our supercomputing hardware systems. You will develop detailed test plans and methodologies tailored to hardware components, including processors, memory modules, custom accelerators and interconnects. You will collaborate with hardware design, manufacturing, firmware teams and vendors to identify, analyze, and resolve issues affecting hardware, power, thermal and high-speed interconnects. You will perform in-depth debugging on the hardware system Excellent analytical skills to diagnose hardware issues, troubleshoot problems, and propose solutions. Ability to interpret complex test data, identify trends, and draw meaningful conclusions. High-speed links, with a focus on SerDes (Serializer/Deserializer) technology to assess signal integrity, error rates, and overall link performance. You will collaborate with the lab manager to maintain the equipment and hardware systems, including oscilloscopes, thermal test chambers, liquid cooling systems, and other mea

About Us Pearl is AI for professional services at global scale, combining advanced AI with verified human expertise to deliver help that is accurate, accountable, and fast. Since 2003, our network has connected millions of customers with licensed professionals across 196 countries, making real expertise available anytime, anywhere. Our Values Data driven: Start with truth, measure what matters. Courageous: Bias to action; run toward hard problems. Innovative: Seek novel, elegant solutions. Lean: Do more with less. Build, ship, learn fast. Humble: Strong opinions, lightly held. About the Role As a Senior Business Systems Analyst at Pearl, you'll play a central role in enabling workflow and workforce AI transformation, with a strong emphasis on Agent Hub requirements analysis, platform support, and project coordination. This role blends classic BSA responsibilities with project management and practical AI fluency, supporting both Agent Hub product evolution and broader AI transformation initiatives across the organization. You'll help define and document requirements for complex AI opportunities, translate high-level ideas into actionable work, and coordinate across engineering, prompt engineering, and internal stakeholders. This is a hybrid role designed to support both requirements analysis and execution oversight for high-impact AI operations and transformation projects. You'll be a heavy, daily user of AI tools, not just experimenting on the side, while also contributing directly to the development and improvement of AI tools and features, especially within Agent Hub and related AI transformation initiatives. This is a great opportunity for someone who wants to work at the center of a company's AI transformation, with meaningful ownership across both platform evolution and broader AI operations, and the chance to help shape how AI-enabled work gets defined, prioritized, and operationalized. What You’ll Do Evaluate and document Agent Hub product requirements,

About the job Turn complex engineering changes into controlled, traceable actions that keep advanced AI hardware moving forward. As an Engineering Change Analyst, you’ll coordinate product and manufacturing changes across complex hardware. You’ll bring structure and momentum to every change. You’ll help ensure changes are complete, reviewed and implemented correctly. Your work will improve visibility and maintain accurate product records. You’ll coordinate ECRs, ECOs and Deviations throughout their lifecycle. You’ll also support impact assessments, change reviews and clear communication across teams. This role puts you at the centre of engineering, manufacturing, quality and supply chain. You’ll see how decisions become controlled product changes. The team and culture You’ll join Configuration Management within Manufacturing Operations. The team owns product configuration, engineering change control, product data governance and PLM processes. Day to day, you’ll work across technical teams and manufacturing partners. You’ll track actions, surface blockers and keep changes progressing. Good decisions depend on accurate information and clear ownership. You’ll help teams understand impacts, document decisions and resolve issues before changes move forward. What we’re looking for Essential Experience in engineering change control, product lifecycle management, or manufacturing operations. Experience using PLM, ERP, or engineering data management systems, with a solid understanding of bills of materials (BOMs), part numbering, revision control, and engineering documentation. Strong organisational skills and attention to detail, with the ability to coordinate multiple changes, track actions to completion, and escalate issues appropriately. Strong written and verbal communication skills, with the confidence to collaborate across Engineering, Manufacturing, Quality, and Supply Chain teams. Desirable Experience in electronics, semiconductors, computing, or complex hardware pr

About Us Pearl is AI for professional services at global scale, combining advanced AI with verified human expertise to deliver help that is accurate, accountable, and fast. Since 2003, our network has connected millions of customers with licensed professionals across 196 countries, making real expertise available anytime, anywhere. Our Values Data driven: Start with truth, measure what matters. Courageous: Bias to action; run toward hard problems. Innovative: Seek novel, elegant solutions. Lean: Do more with less. Build, ship, learn fast. Humble: Strong opinions, lightly held. About the Role As a member of the Finance team within a global e-commerce membership organization, the Payments Analyst provides analytical support across payments performance, testing, and process optimization. This role analyzes payment data to identify opportunities for improvement and optimization. Collaborating with cross-functional teams, the Payments Analyst supports testing initiatives, helps improve authorization rates and payment processes, and provides data-driven recommendations that contribute to revenue growth and a better customer experience. This role is intended for someone who can move beyond basic reporting to interpret results, identify meaningful insights, anticipate follow-up questions, and provide actionable recommendations. What You’ll Do Conduct in-depth payment data analysis to identify patterns, trends, and improvement opportunities Identify opportunities to optimize payment processes, enhance customer experience, and drive revenue growth Support testing initiatives through sample sizing, monitoring, and readouts Partner with cross-functional teams on payment performance and optimization initiatives Respond to ad-hoc analytical requests and translate findings into clear, actionable insights Create and maintain dashboards and reporting tools that provide visibility into key payment metrics Provide data-driven recommendations to improve authorization rates and overall

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role You will build the low-level device runtime that turns compiled programs into efficient, functional and performant execution on OpenAI’s custom AI accelerator. This software will schedule kernel launches, manage device memory and address spaces, coordinate synchronization, and expose reliable abstractions to higher-level runtimes and frameworks. You will work at the boundary of software and hardware, partnering with compiler, kernel, architecture, verification, and silicon teams to define interfaces and validate behavior. You will also use and improve event-based, cycle-accurate simulation to develop runtime capabilities before silicon is available, diagnose performance and correctness issues, and guide hardware-software co-design. In this role, you will: Design and implement the low-level device runtime for OpenAI custom silicon. Build kernel-launch scheduling, command submission, queueing, dependency tracking, and completion handling. Manage device memory spaces, allocation, virtual-to-physical mappings, data movement, and lifetime across concurrent workloads. Implement synchronization primitives, events, barriers, streams, and ordering guarantees that are correct and efficient. Define clean interfaces between the runtime, drivers, firmware, compiler-generated code, kernels, and higher-level execution systems. Use event-based, cycle-accurate simulators to develop, validate, debug, and performance-tune runtime behavior before and after silicon availability. Di

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role You will work on the systems software strategy and execution that brings new AI silicon from first power-on to a fully integrated system running production-representative models at expected functionality and performance. You will define how software exercises and validates compute, memory, interconnect, and I/O subsystems, then build the diagnostics, automation, and observability needed to find issues quickly. This role sits at the center of silicon, firmware, platform, systems, and workload teams. You will turn hardware specifications and performance targets into an end-to-end bringup plan, drive cross-functional debug, and establish the stress and regression infrastructure that makes each new platform reliable across operating environments. In this role, you will: Contribute to the end-to-end software bringup and validation strategy for new silicon and first-party systems. Define software-driven test coverage across compute, memory, interconnect, I/O, and their system-level interactions. Build diagnostics, test automation, telemetry, and regression infrastructure that accelerate first-silicon learning and issue isolation. Lead bringup from initial silicon arrival through board and system integration, docking, runtime enablement, and model execution. Design stress tests that characterize reliability, performance, and stability across workloads and operating conditions. Translate architecture specifications and performance models into measurable acceptance crit

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role You will build the model runtime within the inference engine that executes complex, frontier models at scale on OpenAI’s custom silicon. The runtime will sit between models running on the hardware and the upper layers of the cluster serving software stack, translating demanding inference workloads into efficient execution while optimizing for throughput, latency, utilization, and reliability. You will work across model architecture, distributed systems, compilers, kernels, and silicon to design a production-grade runtime comparable in ambition to systems such as vLLM and SGLang, but customized and optimized for OpenAI’s AI accelerator. Your work will shape how new model capabilities map onto the platform and how quickly custom silicon can deliver meaningful performance in production. In this role, you will: Design and implement the LLM inference runtime for frontier models running on custom silicon. Build scheduling, continuous batching, memory management, KV-cache management, and execution orchestration for high-performance inference. Develop distributed execution strategies across chips, hosts, and racks, including model partitioning, communication, and synchronization. Optimize end-to-end latency, throughput, memory efficiency, and hardware utilization across diverse model architectures and serving workloads. Partner with kernel, compiler, architecture, and silicon teams to co-design interfaces and remove performance bottlenecks across the stack. Enable new

Data & AI Lead will enable data driven decision making, advanced analytics, and AI led value creation across the organization by transforming raw data into trusted insights, predictive intelligence, and scalable AI solutions. The primary purpose of this role is to design, build, deploy, and govern data platforms, analytics, machine learning, computer vision, operations research and generative AI capabilities that directly support business strategy, operational excellence, and innovation. By working closely with business leaders, Business Technology, Software Engineering, Architecture, IT, and Cybersecurity teams, Data & AI role translate business problems into analytical and AI use cases, develop scalable and responsible AI solutions, and ensure adoption through explainability, trust, and governance. This role plays a critical role in institutionalizing data driven culture, embedding AI into core processes, and enabling faster, better, and more consistent decisions at scale. Source: Adani Group | Job ID: 52726

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for a Product Manufacturing Engineer to drive manufacturing strategy and execution for next-generation AI hardware within the Silicon & Systems team, with a particular focus on PCBA manufacturing, assembly, process development, and production readiness. You will work closely with design engineering, systems engineering, operations, TPMs, contract manufacturers, suppliers, and other external partners to ensure new hardware products successfully transition from concept and prototype builds through NPI and high-volume production. You’ll own critical manufacturing initiatives, identify and resolve production risks, and help establish the processes and controls required to deliver complex hardware at scale. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Drive manufacturing and quality initiatives to ensure product success from concept and early development through NPI, production launch, and scale. Lead manufacturing process development for next-generation AI hardware systems, partnering closely with design engineering, systems engineering, operations, TPMs, suppliers, and manufacturing partners. Own PCBA manufacturing development and production readiness, including assembly processes, process validation, manufacturing test, rework, yield improvement, and successful transition into volume production. Establish NPI manufact