Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 1. Key Responsibilities: Process Optimization: Establish, monitor, and optimize daily assembly process parameters to ensure stable production lines. Troubleshooting & Failure Analysis: Lead the containment and root-cause analysis of manufacturing defects and process abnormalities. Yield & Quality Improvement: Implement Statistical Process Control (SPC) to reduce process variation, drive yield enhancement, and prevent quality excursions. Documentation: Author and update standard operating procedures (SOPs), failure mode and effects analysis (FMEA), and technical reports. Cross-functional Support: Collaborate with equipment, product, and quality engineering teams to resolve technical bottlenecks. 2. Role Requirement Work Experience: 0 to 2 years of experience in semiconductor manufacturing, packaging, or assembly processes (Fresh graduates with a strong research background in related fields are highly welcome). Work Environment: Ability to work in a cleanroom environment and flexibility to support on-call rotations or shifts when critical production issues arise. Attributes: Strong analytical thinking, proactive problem-solving mindset, and a high degree of self-motivation. 3. Education Degree: Master’s degree (M.S.) is required. Engineering, Electrical Engineering, Physics, or a related STEM discipline. 4. Skills and Experience Core Technical Knowledge: Fundamental understanding of semi
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. • Identify, diagnose and resolve assembly process related problems • Coordinate and execute process, equipment and material evaluation / optimization initiatives and implement changes at process step • Lead / participate in continuous yield improvement and cost reduction activities • Validate and fan out new process baseline qualified, including new process, tools and/or materials for new product introduction • Support SPC/FDC/RMS/APC • Support site to site portability • Manage / audit material suppliers to achieve quality, cost and risk management objectives • Support internal and external audits Requirement: 1 years of experience in semiconductor manufacturing, packaging, or assembly processes. Ability to work in a cleanroom environment and flexibility to support on-call rotations or shifts when critical production issues arise. Strong analytical thinking, proactive problem-solving mindset, and a high degree of self-motivation. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses infor
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Advanced Packaging Technology Development is where Micron pushes the boundaries of 3D memory. We take ideas from early experiments to factory‑ready processes, working hands‑on with materials, tools, and partners across the industry. If solving foundational problems that shape future products excites you, you’ll feel right at home here! This role is a senior Process Engineering Technical Leader focused on chip‑to‑wafer and hybrid bonding. You’ll lead the development and scale‑up of bonding processes that enable high‑performance 3D memory products like HBM and 3DS DRAM. Your work will span early pathfinding through high‑volume manufacturing, with a clear impact on reliability, performance, and cost. Responsibilities: Set technical direction for chip‑to‑wafer and hybrid bonding processes across development programs Develop and mature process flows, materials, and integrations that meet performance, reliability, and cost needs Lead problem solving across wafer fab, die processing, bonding, thinning, and downstream packaging interactions Partner with integration, equipment, product, manufacturing, and quality teams to deliver TD breakthroughs Drive technology transfer into manufacturing with a focus on repeatability and high‑volume readiness Minimum Qualifications: Master’s degree or PhD in Materials Science, Electrical, Mechanical, or Chemical Engineering, or a related field 13+ years of semiconductor R&D experience, incl
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Advanced Packaging Technology Development is where Micron pushes the boundaries of 3D memory. We take ideas from early experiments to factory‑ready processes, working hands‑on with materials, tools, and partners across the industry. If solving foundational problems that shape future products excites you, you’ll feel right at home here! This role is a senior Process Engineering Technical Leader focused on chip‑to‑wafer and hybrid bonding. You’ll lead the development and scale‑up of bonding processes that enable high‑performance 3D memory products like HBM and 3DS DRAM. Your work will span early pathfinding through high‑volume manufacturing, with a clear impact on reliability, performance, and cost. Responsibilities: Set technical direction for chip‑to‑wafer and hybrid bonding processes across development programs Develop and mature process flows, materials, and integrations that meet performance, reliability, and cost needs Lead problem solving across wafer fab, die processing, bonding, thinning, and downstream packaging interactions Partner with integration, equipment, product, manufacturing, and quality teams to deliver TD breakthroughs Drive technology transfer into manufacturing with a focus on repeatability and high‑volume readiness Minimum Qualifications: Master’s degree or PhD in Materials Science, Electrical, Mechanical, or Chemical Engineering, or a related field 13+ years of semiconductor R&D experience, incl
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate, and advance faster than ever. Within the HBM organization, this role is part of a highly collaborative team focused on advancing next-generation High Bandwidth Memory (HBM) solutions through deep characterization, modeling, and root-cause analysis. The team partners closely with Design Technology Co-Optimization (DTPCO), Product Engineering, Packaging, Test, Reliability, and Technology Development organizations to drive product innovation and quality. This role is critical to achieving DTPCO objectives by developing a first-principles understanding of HBM cube limitations and validating hypotheses through silicon data and supporting models. The position focuses on custom bench-level characterization of HBM devices under thermal, mechanical, and electrical stress conditions to improve product performance, yield, reliability, and adaptability across future HBM generations. Responsibilities Design, build, debug, and complete custom bench-level test setups, fixtures, and measurement flows using laboratory equipment including power supplies, SMUs, oscilloscopes, thermal systems, handlers, sockets, and probe cards. Perform thermal, mechanical, and electrical characterization of HBM cubes under hot/cold, transient, and forced-temperature conditions, including power-temperature correlation, warpage analysis, stress characterization, tim
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) sits within the Technology and Products Group (TPG) and develops industry-leading High Bandwidth Memory (HBM) solutions for next-generation AI and high-performance computing systems. Micron is seeking an experienced MTS - HBM Thermal Integration Engineer to drive thermal performance optimization for next-generation High Bandwidth Memory products. This role sits at the intersection of thermal simulation, silicon characterization, process technology, package development, manufacturing, test engineering, and product integration. Key Responsibilities Drive thermal performance optimization across HBM products through design, process, packaging, assembly, and test improvements Develop and implement thermal learning plans, characterization strategies, and design-of-experiments (DOE) to accelerate technology understanding Analyze silicon characterization, inline metrology, manufacturing, and test data to identify key drivers of thermal behavior and variation Partner with thermal simulation teams to improve understanding and correlation between predictive models and measured silicon performance. Work closely with wafer fabrication, package development, assembly, product engineering, and reliability teams to resolve thermal challenges and enable product improvements. Identify and implement opportunities to reduce thermal resistance, improve thermal consistency, and enhance product performance. Drive cross-functional technical investigations and
Abbott is a global healthcare leader that helps people live more fully at all stages of life. Our portfolio of life-changing technologies spans the spectrum of healthcare, with leading businesses and products in diagnostics, medical devices, nutritionals and branded generic medicines. Our 122,000 colleagues serve people in more than 160 countries. JOB DESCRIPTION: Position Overview The AI Platform Engineer builds and operates the machine learning and generative AI platform used by teams across Abbott Cancer Diagnostics. You'll own the full model lifecycle in production — data and feature pipelines, training and experimentation, evaluation and promotion, serving, and monitoring — along with the platform services, compute and tooling underneath it. This is hands-on infrastructure work backed by solid platform engineering practice: making inference fast and cheap, making the path from experiment to production repeatable and auditable, and shipping interfaces other engineers can build on — in support of software that ultimately reaches patients. Essential Duties Include, but are not limited to, the following: Build and maintain data, feature, and training pipelines for ML and LLM workloads — ingestion, transformation, fine-tuning, distributed training, and reproducible experiment execution with lineage tracked from dataset and code to resulting model. Implement automated evaluation and promotion gates — performance benchmarks, regression checks, and validation criteria that determine whether a model advances toward production. Automate the model lifecycle end to end through CI/CD and GitOps: packaging, promotion across environments, progressive rollout, and rollback. Build and operate production model-serving infrastructure for LLMs and predictive models, including inference optimization, autoscaling,
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Engineering Operations Support Create, release, and track engineering lots within manufacturing systems. Monitor hold lots and support timely issue resolution. Execute authorized MES transactions, including lot creation, issue lot, undo process, and lot recovery activities. Support CQ lot start requests and engineering build execution. Support engineering and manufacturing operational meetings and follow-up actions. Material & Logistics Management Receive FOUPs from warehouse and verify material readiness. Perform FOUP/FOSB transfers to support engineering and qualification activities. Execute FOSB packaging and shipment preparation. Prepare shipment documentation and logistics records. Coordinate wafer and sample delivery for laboratory analysis activities. Support kit and re-kit activities for engineering lots. Inspection & Process Support Configure inspection-related recipes and operational setup activities. Modify and maintain Atlas maps to support engineering execution. Support transaction recovery activities, including system troubleshooting and data verification. Perform routine operational checks to ensure lot readiness and processing continuity. Troubleshooting & Continuous Improvement Investigate hold lot issues and support recovery actions. Escalate manufacturing
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The High-Performance Integrated Group (HIG) develops next-generation High Bandwidth Memory (HBM) solutions for AI, machine learning, and high-performance computing applications. We are seeking an experienced HBM Architecture Engineer to define and drive the architecture of high-speed analog and mixed-signal IO subsystems for HBM products. This role focuses on PHY IO architecture, timing methodology, analog calibration schemes, and silicon learning frameworks that enable industry-leading bandwidth, power efficiency, and robustness. The successful candidate will collaborate across Design, Product Engineering, Modeling, Verification, Packaging, and System Architecture teams to define architectural requirements, drive technology innovation, and ensure successful translation from concept to silicon. As a technical leader, you will influence future HBM roadmap decisions, develop engineering methodologies, and mentor design teams on architectural principles, calibration strategies, and best practices for high-speed IO design. Key Responsibilities Define and drive next-generation HBM PHY and IO architecture , balancing performance, power, area, reliability, and manufacturability requirements. Architect high-performance transmit and receive paths , including clocking, signaling, equalization, timing alignment, and interface optimization. Define and optimize analog calibration architectures , including impedance calibration, reference v
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Staff DFT Design Engineer, you will work on design, simulation, and validation of next generation High Bandwidth Memory (HBM) architectures and circuit blocks. The HBM DFT Design Engineer is responsible for defining, designing, and integrating Design for Test (DFT) architectures for next generation High Bandwidth Memory (HBM) products. This role ensures robust test coverage across wafer, die, stack, and system in package (SiP) test stages while balancing performance, power, area, and manufacturing cost. The engineer works in a multi-functional manner with HBM build, verification, product engineering, test enablement, packaging, and external partners to deliver manufacturable, high quality HBM solutions. Responsibilities will include, but are not limited to: Define and implement HBM DFT architectures, including scan, MBIST, JTAG, boundary scan, TSV test, redundancy test, and at‑speed test structures. Develop DFT solutions for both base die and DRAM die, considering stacked‑die and cube‑level test requirements. Design and integrate test access mechanisms to support wafer probe, cube test, and SiP/system test flows. Collaborate with Product Engineering and Test Enablement teams to align DFT features with manufacturing test flows and cost targets. Support yield learning, failure analysis, and debug by enabling observability and controllability in silicon. Work closely with logic, analog, layout, verification, and physical design teams to ensure DFT is
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description : Design, build, and operate large‑scale, mission‑critical facility digital systems that directly impact fab uptime, safety, and utilities reliability. Develop and run production‑grade software systems (applications, services, automation) that support 24/7 facility operations across fabs. Transform alarms, equipment telemetry, utilities, and energy data into actionable operational intelligence for faster response and better decision‑making. Design and implement alarm and event consumption mechanisms (views, metrics, prioritization logic) to improve signal‑to‑noise and reduce operational distraction. Build operational dashboards and data services that are actively used by facility operations and maintenance teams in daily work. Integrate data from multiple facility sources (e.g., FMCS/SCADA‑like systems, meters, equipment signals) with a focus on reliability, consistency, and traceability. Work closely with Facility Operations, Maintenance, Engineering, and IT to translate real production issues into practical digital solutions. Support cross‑fab deployment and reuse of digital solutions by packaging, documenting, and assisting with site adoption. Operate and sustain live systems by troubleshooting issues, restoring services during abnormal events, and continuously improving performance and maintainability. Requirement 3&
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an HBM Power Delivery Network (PDN) Engineer , you will be part of the Heterogeneous Integration Group (HIG), responsible for the design, analysis, and optimization of power delivery networks for next-generation HBM products. You will work closely with architecture, design, physical design, packaging, and product engineering teams to ensure robust, efficient, and manufacturable power delivery solutions that meet aggressive performance, power integrity, and reliability targets. This is a hands-on technical role focused on PDN design, EM/IR analysis, and cross-domain optimization across technology, design, and layout. Key Responsibilities Design and develop SoC-level and HBM-cube-level power delivery networks for HBM designs, including power grid architecture, routing strategies, and decoupling schemes. Perform EM/IR analysis and optimization using industry-standard tools (e.g., Cadence RedHawk, Ansys Totem) to ensure power integrity across dynamic workloads. Collaborate with physical design teams on floorplanning, placement, and routing strategies to enable efficient PDN implementation. Drive power integrity closure across multi-mode/multi-corner scenarios, identifying and mitigating droop, noise, and electromigration risks. Work with package and system teams to co-optimize die-package-system PDN interactions, including bump/pad assignment and current distribution. Develop and validate power models, including activity-based current profiles and transient analysis for realistic
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Material Characterization & Analysis Perform material characterization using DSC, TGA, DMA, TMA, Rheometer, Contact Angle, Density, and other analytical techniques. Evaluate critical material properties including Tg, CTE, viscosity, modulus, cure behavior, filler content, thermal stability, and wettability. Analyze material behavior and establish correlations between material properties and manufacturing performance. Support incoming material evaluation, qualification, and supplier material assessments. Testing Method Development Develop, optimize, and standardize material characterization methods and testing procedures. Establish SOPs, OCAPs, SPC baselines, and MSA plans for laboratory operations. Develop new characterization capabilities for molding compounds, NCF, dicing tapes, liquid EMC, adhesives, and other packaging materials. Execute method validation, correlation studies, and cross-site benchmarking activities. Supplier Quality & Material Investigation Lead supplier material investigations for excursions, abnormal trends, and quality concerns. Conduct root cause analysis and drive corrective and preventive actions with suppliers. Support supplier audits, change management reviews, and material control plan optimization. Establish critical-to-quality (CTQ) monitoring strategies and strengthen supplier process control systems. Failure Analysis &
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. MTS, Interface Pathfinding Hardware Development Engineer About the Role At Micron, our vision is to transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next generation of high-speed interfaces. Micron’s Interface Pathfinding team drives performance-scaling innovation across circuits, signaling, packaging, and interconnects with a 3–5 year technology horizon. As the Interface Pathfinding Hardware Development Engineer , you will own characterization for a high-speed interface test-chip program: the characterization plan and its success criteria, development of the characterization bench hardware and its automation, the measurement-uncertainty budget, and the correlation report proving the silicon matches the models. You will join a small, senior team spanning analog design, layout, digital design, and verification, working closely with the Chip Lead and the Signal Integrity and Physical Design engineers — driving decisions independently while consulting heavily with other experts across Micron. This is a foundational hire for a growing program. Strong execution early is expected to lead to follow-on projects of increasing scope, team size, and characterization complexity — including an expanding mandate for AI-enabled engineering leadership across the organization. What You’ll Own Characterization Planning • Derive the electr
Job Details: Job Description: Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision. Life at Intel: https://jobs.intel.com/en/life-at-intel As a Yield Development Engineer, you will be at the forefront of advancing Intel's cutting-edge process technologies within our Logic Technology Development (LTD) organization. This pivotal role involves identifying root cause yield limiters and driving solutions that enhance manufacturability and yield across technology nodes. You will work within a dynamic, fast-paced environment to ensure the successful introduction of new products, process improvements, and robust methodologies to meet manufacturing goals. Your expertise will directly contribute to Intel's ability to deliver world-class semiconductor solutions and advance the future of computing. About Intel Foundry At Intel, the Foundry Technology Development (TD) unit is the driving force behind Moore's Law, enabling us to create groundbreaking technology that enriches lives globally. With over 15,000 dedicated employees, Foundry TD spearheads innovative research, develops next-generation processes and packaging technologies, and manages high-volume manufacturing in state-of-the-art facilities. Within Intel Foundry TD, our Logic Technology Development (LTD) organization is at the forefront of creating and refining each process technology node, paving the way for tomorrow's computing solutions. Your responsibilities as a Product Yield Development Eng
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