Assembly Equipment Engineer Jobs

What you’ll do Act as the in-house electrical lead for Midjourney Medical: own the electrical architecture of the scanner and the technical direction for all board-level design. Own complex board design end-to-end: architecture, schematic capture, layout (high-speed digital, analog/mixed-signal, power), DFM/DFT, fabrication and assembly vendor management, bring-up, and revision control. Write firmware for embedded targets (MCU/SoC): drivers, real-time control loops, safety-relevant logic, bootloaders, and field update paths. Audit and update HDL (FPGA) code for high-throughput data acquisition, timing/synchronization, triggering, and pre-processing of ultrasound and sensor data streams. Define electrical interfaces and data contracts with software, recon/ML and mechanical teams: timing budgets, clocking/sync, signal integrity, connectors/harnessing, and failure modes. Establish electrical engineering rigor: design reviews, schematic/layout review checklists, bring-up procedures, test fixtures, and documentation suitable for a regulated medical device program (DHF, traceability, change control). Mentor and grow the electrical function; select and manage external design partners where leverage is high. What we’re looking for Deep experience designing complex boards from blank page to stable revision, including high-speed digital and analog/mixed-signal domains. Strong schematic and layout skills (Altium/KiCad or equivalent) with real signal integrity, power integrity, grounding, and EMI/EMC instincts. Solid embedded firmware background in C/C++ (and Python for tooling): peripherals, DMA, interrupts, real-time constraints, and debugging on hardware. Practical HDL experience (VHDL/Verilog/SystemVerilog) for data acquisition, timing, and streaming interfaces. Track record of owning bring-up and debug on real hardware: scopes, logic analyzers, and disciplined root-cause analysis. Technical leadership: clear trade-offs, strong written documentation, and the ability to set

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for a Product Manufacturing Engineer to drive manufacturing strategy and execution for next-generation AI hardware within the Silicon & Systems team, with a particular focus on PCBA manufacturing, assembly, process development, and production readiness. You will work closely with design engineering, systems engineering, operations, TPMs, contract manufacturers, suppliers, and other external partners to ensure new hardware products successfully transition from concept and prototype builds through NPI and high-volume production. You’ll own critical manufacturing initiatives, identify and resolve production risks, and help establish the processes and controls required to deliver complex hardware at scale. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Drive manufacturing and quality initiatives to ensure product success from concept and early development through NPI, production launch, and scale. Lead manufacturing process development for next-generation AI hardware systems, partnering closely with design engineering, systems engineering, operations, TPMs, suppliers, and manufacturing partners. Own PCBA manufacturing development and production readiness, including assembly processes, process validation, manufacturing test, rework, yield improvement, and successful transition into volume production. Establish NPI manufact

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. The Role We are seeking a thorough SOC Physical Verification & Integration Specialist to drive the physical assembly and signoff of our next-generation SOCs. In this role, you will own the physical integration strategy from the floorplan stage through to tapeout, ensuring seamless assembly of massive multi-hierarchical blocks. You will act as the critical bridge between block-level implementation, top-level integration, and final foundry signoff, ensuring that complex physical bottlenecks are resolved without compromising power, performance, or area (PPA). Key Responsibilities Top-Level Physical Integration: Drive the full-chip physical assembly of very large-scale SOCs (e.g., multi-billion transistor designs). Manage top-level floorplanning, bump planning, global power grid (PG) integration, and top-level clock/routing integration. Hierarchical Verification Methodology: Architect and deploy highly efficient, hierarchical physical verification (PV) flows. Define the boundary conditions, abstraction models, and interface rules required to assemble heavily partitioned, massive-scale designs. Signoff Execution & Debugging: Own full-chip DRC, LVS, ERC, Antenna, ESD, and Latch-up signoff using industry-standard tools (e.g., Siemens Calibre) at advanced process nodes (5nm, 3nm, or below). Cross-Functional Collaboration: Partner tightly with the Physical Design (PD

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Design and analyze digital and analog circuits used in the development of memory products. Collaborate with company’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. Contribute to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits. Parasitic modeling and assist in design validation, reticle experiments and required tape-out revisions. Oversee and manage the layout process including floor-planning, placement, and routing. Perform verification processes with modeling and simulation using industry standard simulators. Contribute to cross group communication to work towards standardization and group success. Work with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product. Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality. Drive innovation into the future Memory generations within a dynamic work environment. Employer will accept a Master's degree in Electrical Engineering or related field. Position requires: 1. System Verilog/Verilog/VHDL, 2. C/C++ Programming and Debugging, 3. TCL/Python/Perl, 4. Dig

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. ​The Staff/Principal Business Analyst drives digital transformation initiatives across Assembly & Test (A&T) Operations, with a primary focus on Space & Utilities Planning and Automation, Digitalization, and AI solutions supporting Max-Out activities. This role partners with Capacity Planning, Facilities, Engineering, Operations, Supply Chain, SMAI teams to identify business opportunities, develop digital strategies, and implement scalable solutions that improve capacity/space planning, productivity, operational efficiency, and decision-making across the global A&T network. Key Responsibilities Digital Transformation Leadership Space & Utilities Planning Transformation Max-Out Automation & AI Initiatives Program & Stakeholder Management Key Responsibilities: Develop and execute digital transformation strategies aligned with A&T operational and business objectives. Identify opportunities to simplify, automate, and enhance business processes through AI, advanced analytics, and workflow automation. Build business cases, value realization frameworks, and transformation roadmaps. Lead the digitalization and systemization of Space & Utilities Planni

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Summary The Senior Director, Procurement, Assembly Test Materials & Outsourced Manufacturing leads the global strategy, sourcing, and supplier ecosystem for assembly, test materials, and outsourced manufacturing. This role is accountable for delivering cost competitiveness, supply assurance, and long-term resilience across a complex semiconductor value chain. Partnering closely with engineering, manufacturing, and business leaders, the role drives category strategies, supplier performance, and risk mitigation while enabling Micron’s growth and innovation priorities. Success in this role requires deep semiconductor domain expertise, strong commercial acumen, and the ability to lead large, global teams to deliver enterprise-level outcomes. Main Responsibilities Define and execute global procurement strategies for assembly, test materials, components, and outsourced manufacturing services to support business growth and operational excellence Lead category management, ensuring cost competitiveness, supply continuity, and alignment with Micron’s strategic and financial objectives Build and manage strategic supplier partnerships, driving collaboration, performance accountability, and continuous improvement across the supplie

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Lead Principal Engineer, Layout Design at Micron, you will be at the forefront of developing groundbreaking memory solutions! This role is an outstanding opportunity to lead the physical implementation of modern DRAM and mixed-signal circuits, turning schematics and specifications into flawless, manufacturable layouts. You will collaborate with a world-class team of Circuit Designers, Verification Engineers, CAD/Methodology experts, Process Integrators, Product Engineers, Test/Probe specialists, Assembly professionals, and Marketing strategists. Together, we will drive cost, quality, reliability, time-to-market, and customer happiness through outstanding layout and build. Key Responsibilities Lead the layout build and physical realization of new memory products. Interpret device and circuit specifications to implement custom layout solutions meeting PPA (power, performance, area) and reliability targets. Develop hierarchical layouts for analog, digital, and memory-array-related circuitry using industry-standard EDA tools. Build block and top-level floorplans optimizing placement, routing resources, signal integrity, power delivery, and manufacturability. Optimize layout for critical metrics such as die size/area efficiency, matching, coupling/noise, and timing. Produce layout collateral and documentation for cross-team integration. Physical Verification and Tapeout Signoff Run and debug physical verification flows and ensure closure using indust

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Design Engineer at Micron Technology, Inc., you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. We are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in premier memory solutions. In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. The Design Engineer is responsible for designing, simulating, and optimizing DRAM circuits while supporting the development of digital and analog circuitry used in advanced memory products. This role collaborates globally across design, verification, product engineering, test, probe, process integration, assembly, and marketing to ensure manufacturable, high‑quality, cost‑optimized solutions. The position drives innovation in future memory generations and supplies to silicon‑to‑system development in a dynamic engineering environment. Responsibilities Design digital, analog, and memory core circuits using CMOS logic and transistors, implementing device specifications from concept to solution. Create optimi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Supply Operations individual contributor, you will develop and execute a holistic strategy and be part of a global team dedicated to this function across all Assembly and Test manufacturing locations. In this role you will participate in the implementation of the global supply and corresponding inventory strategy by establishing key supply readiness strategy, identifying required implementation resources and developing communication channels and tools to introduce the new strategy. You will also be part of the team in the supply strategy development through understanding of current and future needs, analyzing market and company trends, performing the benchmarking of world-class approaches, as well as identifying opportunities to leverage changes in processes, systems and product/services. Then prioritize and drive the implementation based upon estimating timing and level of efficiency captured. Other responsibilities include ensuring department compliance to company policies and departmental procedures. You will be responsible for providing input back to leadership on the building and implementing department strategies, processes, and policy through active participation on teams and projects. AI Specifics • Leverage AI-

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. SUMMARY: As a Design Engineer at Micron Technology, Inc., you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. We are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions. In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. Responsibilities: Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits. Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions. Overseeing and managing the layout process including floor-planning, placement, and routing. Performing verification processes with modeling and simulation using industry standard simulators. Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Pro

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DRAM Architecture team is responsible for defining the system‑level and silicon‑level architectures that enable Micron’s memory products. The team works across technology generations and product lines, collaborating with design, product, systems, and ecosystem partners to deliver scalable, reliable, and high‑performance memory solutions aligned with customer and market needs. This role provides senior‑level architectural leadership to help shape Micron’s next‑generation DRAM products. As a Distinguished Member of Technical Staff, you will influence memory architecture decisions across semiconductor chips, assembly methods, component units, and system interfaces, contributing to both near‑term product execution and long‑term technology direction. This role requires AI proficiency or AI‑enabled ways of working. Responsibilities: • Define and evolve DRAM system architectures that address performance, capacity scaling, reliability (RAS), and observability requirements. • Collaborate across functions to evaluate architectural trade‑offs spanning DRAM silicon, packaging, modules, boards, and system platforms. • Influence host memory controller and platform architecture through technical engagement with CPU, GPU, and SoC partners. • Contribute to RAS and telemetry feature definition, translating system‑level needs into implementable architectural concepts. • Support exploration of emerging memory technologies and assess their impact on future product roadmaps. • Engage with cus

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Project Title Selective Solder Tooling Enhancement and BOL Conversion Readiness Enhancement Description Enhance selective solder process robustness by introducing tooling improvements while strengthening BOL conversion readiness by introducing a standardized tooling selection system covering Cornerfill (CF), Selective Solder (SS) and Enclosure Assembly (EA). The project aims to reduce conversion ambiguity, setup errors and process variability across BOL operations. Scope 1. Selective Solder Tooling Enhancement (SS) - Qualify and release selective solder process enhancement toolings to improve setup stability, consistency and repeatability - Address tooling‑related contributors to process variation during selective solder operations 2. BOL Conversion Readiness Enhancement (CF, SS, EA) - Develop and implement a tooling selection system defining required toolings for each product conversion across BOL - Standardize tooling requirements to eliminate ambiguity during CF, SS and EA conversions - Improve conversion clarity, reduce human dependency and minimize conversion‑related errors Deliverables 1. Qualify and release selective solder tooling enhancements, including: - Uflex quick‑change gripper - Fixed preheater jig positioning standardization - Hold‑down unit design improvements<

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As the Assembly and Test (AT) IP Security Engineer, you will be part of the AT BISO (Business Information Security Officer) Organization. You will partner with Micron’s Enterprise Infrastructure and Security (EIS) and your business area (Assembly and Test) to implement security controls, reduce risk, and maintain business continuity. You will work within Assembly and Test organizations (and sites) to identify risks, help classify data and establish processes which are aligned to Micron’s security disciplines. You will serve as an ambassador for Assembly and Test Organization to protect Micron’s most sensitive data (Intellectual Property). You will institutionalize a security-first culture across AT operations and ensure compliance with micron’s security standards, whilst ensuring AT Business continuity Key Responsibilities Act as a Liaison with EIS team and AT business are to support roadmaps, strategies, and requirements to improve Micron’s security policies. Bridge security goals and commitments with articulated business needs driving towards a common set of goals and objectives Participate in defining clear goals and strategic initiatives to improve our security posture in line with Micron’s 7 Security Disciplines. Secure Data Handling: Help secure micron’s most Sensitive Data (Sensitive Data Protection Program), through Data Classification and Inventorization. Help define and implement Entitlement Policy Management System (EPMS) fo

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron Technology, Inc., you will join a team responsible for bringing next-generation High Bandwidth Memory (HBM) products from design through high-volume manufacturing. This role plays a critical part in improving product reliability, accelerating production ramp, and enabling early time-to-market through advanced failure analysis. You will focus on analyzing failures from production test, internal qualification, and customer returns (RMA), using a combination of electrical, physical, and data-driven techniques to identify root causes related to fabrication or assembly processes. Key Responsibilities Perform electrical failure analysis and fault isolation using techniques such as emission microscopy, laser-based methods, and EOTPR. Analyze and model failure signatures from backend testing, qualification, and RMA data. Apply physical failure analysis (PFA) and de-processing techniques to isolate defects. Develop and maintain deep technical knowledge of CMOS/FinFET fabrication processes, device structures, and process integration. Generate clear, organized, and timely failure analysis reports, including root cause and corrective action insights. Collaborate multi-functionally with Product, Process, Assembly, Quality, and Management teams to communicate findings and drive resolution. Apply AI-assisted tools and workflows to analyze large datasets, identify failure patterns, and accelerate root-cause determination. Support flexible work sch

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tape-out. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. Key Responsibilities Own physical implementation for SoC blocks and/or top-level, including floor-planning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust physical integration and timing/power integrity. Perform and/or coordinate physical signoff, including DRC/LVS, IR drop/EM, and timing signoff, addressing violations efficiently. Partner with DFT teams to ensure scan/MBIST requirements are physically realizable and do not compromise PPA or schedule. Work with packaging, assembly, test, probe, and manufacturing collaborators to ensure builds meet manufacturability and quality requirements. Support tape-out execution (checklists, ECO flows, signoff r