Design Layout Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a build Engineer at Micron Technology, Inc., you will be responsible for crafting and analyzing digital and analog circuits used in the development of memory products. We are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions. In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. You will contribute to the design and delivery of next‑generation memory products by working across circuit design, layout, and validation. You will apply simulation, modeling, and verification skills to improve design quality and manufacturability. You will coordinate with multi-functional partners to support tape‑out readiness and future technology scaling. This role offers hands‑on impact across the full semiconductor design flow. Responsibilities Contribute to new product opportunities by supporting overall circuit design, layout, and optimization for memory and logic or analog circuits. Perform parasitic modeling and support design validation, including reticle experim

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a E5/MTS/SMTS NAND Design Rule / Process Integration engineer, your role is to support the development and high-volume manufacturing of advanced 3D NAND technologies. This role drives design-rule and PDK deliverables, partners closely across process integration and design organizations, and ensures quality, documentation, and timely execution across R&D and production programs. Lead the release of design rules and PDK deliverables; manage DRC waivers, mask definitions, and mask reviews for both R&D and production designs. Own program execution and milestones from kickoff through end-of-life. Partner with stakeholders across Array & CMOS Process Integration, Devices, Layout & Design, Modeling, Scribe & Frame, unit process areas (e.g., PHOTO/OPC/CMP), and Quality & Reliability to guide new 3D NAND generations. Ensure high quality and documentation for Design Rule Checks (DRCs) and drive timely disposition of deviations and exceptions. Collaborate with Yield Enhancement, Product Engineering, Defect Analysis, and Quality Assurance to identify layout- or database-related process issues and prioritize corrective actions. Design and evaluate test structures to generate data for next-generation devices and to assess process margin on

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology’s vision is to transform how the world uses information to enrich life and our commitment to people, innovation, tenacity, collaboration, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community. Role: The team member will typically work on processors, controller architectures or ASICs for Enterprise SSD Group. Should be proficient in block level low power aware floorplanning, placement, clock tree synthesis, routing, RC extraction, STA timing closure, IR/EM analysis, DRC/LVS/ERC and tape out activities. Requirements Minimum of 15 years of hands-on physical design implementation/IR/EM experience along with APR flow development and PPA analysis STA closure at block & Full Chip Experience in Advanced process technology nodes (5nm/3nm preferred) Experience with Ansys Redhawk-SC tool Experience with Cadence layout tools ( In

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The HBM Design Technology Package Co-Optimization (DTPCO) organization is seeking a Staff Engineer! Lead the design and development of test vehicles that enable technology learning and risk reduction for future HBM products! This role serves as a key technical contributor within DTPCO, partnering closely with Architecture, Design, Layout, Product Engineering, Reliability, and Advanced Packaging teams to translate emerging product requirements and technology challenges into actionable test vehicle solutions. You will apply expertise in semiconductor design, physical implementation, silicon characterization, and advanced packaging technologies to define test structures, develop validation strategies, and generate data that drives product decisions across future HBM generations. Unlike a traditional product role centered on ownership of product blocks, this position emphasizes enabling learning in development and engineering. It does so by developing representative test vehicles and characterization structures. Key Responsibilities Serve as a technical lead for HBM test vehicle design and structure development within DTPCO. Partner with HBM product, technology and reliability team. Define and implement test structures targeting key learning areas such as package interaction and reliability Drive test vehicle content definition, structure specifications, measurement requirements, and validation objectives. Analyze silicon characterization and qualification results to identify optimization opportunit

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Design/Senior Design Engineer – Auto Place & Route / Digital Implementation (NVE Engineering) Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Introduction The Non-Volatile NAND Design Engineering group is responsible for the design and optimization of analog, digital, and mixed-signal circuits enabling advanced NAND Flash memory products. Close collaboration with multi-functional teams ensures scalable, manufacturable, and reliable solutions across technology nodes. Position Overview As a Digital Implementation / Auto Place & Route Engineer in the NVEG organization at Micron Semiconductor Italia, you will drive the physical implementation of advanced NAND Flash digital designs from synthesized netlist through tape-out. In this role, you will own block- and subsystem-level implementation, including floorplanning, power planning, placement, clock tree synthesis, routing, optimization, and physical sign-off. You will partner with RTL, verification, DFT, analog, custom layout, CAD, and product teams to achieve performance, power, area, reliability, and schedule targets. Responsibilities Responsibilities include, but are not limited to: • Own end-to-end RTL-to-GDSII physical implementation for complex digital blocks and subsystems using automated

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Electrical Design Engineer in the Systems Integration Group (SIG) of Micron Technology, Inc, you will design load boards that support semiconductor memory manufacturing, as well as resolve issues with and develop improvements to deployed automated test equipment (ATE) products. Load boards, used for testing memory devices after they are manufactured & packaged, are the contact interface between ATE and pins of the device under test (DUT). Load boards contain the necessary components to: setup the DUT for correct testing by the ATE; route power, test, and response signals between the DUT and the ATE; provide additional test capabilities that the ATE may not be able to provide; and, alternately, testing or calibrate the ATE itself. Load board design considerations, like other PCB assemblies, include DC power supply distribution, clock & digital routing, and high-speed signal integrity. You will apply circuit theory to design load board solutions working closely with other team members located around the world that include other engineering disciplines, technicians, procurement, planning, and external contract manufacturers. Responsibilities and Tasks Develop requirements specifications Analog and digital circuit design and simulation Schematic capture Work closely with layout designers to develop PCBs Author test plans and lab repo

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s High Bandwidth Memory (HBM) Design Architecture organization, where we push the limits of memory technology every day. Our team works across global, multicultural engineering groups to build next-generation HBM solutions that power AI and machine learning. We believe the best ideas come from collaboration, curiosity, and a shared drive to innovate! This role plays a critical part in ensuring the reliability of Micron’s most advanced DRAM and HBM products. As an ESD & Latch Up Engineer, you will shape protection strategies from early design through high-volume manufacturing, working hands-on with silicon, layout, and foundry partners. If you enjoy solving deep technical problems and influencing product robustness at scale, this role offers both impact and growth. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Define and own chip-level and IP-level ESD and latch up strategies for HBM DRAM, base die, I/O, TSVs, and die-to-die interfaces Establish ESD and latch up requirements, targets, and sign-off criteria aligned with JEDEC/ESDA standards Enable ESD protection circuits and latch up safe layout practices across designs and technologies Lead silicon validation, failure analysis, and correlation of pre-silicon assumptions to silicon results Act as the technical interface to foundries and partner closely with design, packaging, reliability, and product teams<

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s DRAM Design Engineering Group (DDEG) is where bold ideas become real technology. We push the limits of memory and storage innovation, and we thrive in a collaborative environment where engineers learn, build, and solve challenges together. We are driven by curiosity, creativity, and the pursuit of better solutions every day! We are seeking a Principal or Member of Technical Staff (MTS) in Analog Design to join our DRAM IP Design team. As a Principal/ MTS, you will help shape the next generation of Micron's memory products, while working closely with global design, verification, and product teams to bring innovative circuit designs from concept to silicon. Your work will directly influence product performance, quality, and reliability—and contribute to advancements that define the semiconductor industry. Responsibilities: Design, optimize, and verify block‑level analog and mixed-signal circuits for DRAM projects. Work with the internal data science team and EDA vendors to leverage and improve AI-assisted design flow and circuits optimization. Propose, evaluate and implement new or improved circuit topology to further enhance PPAC of the circuit block. Improve design verification scope and coverage to increase circuit robustness to enhance mass production yield. Partner with global design groups and provide layout guidance through post‑layout simulation. Compare silicon

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s DRAM Design Engineering Group (DDEG) is where bold ideas become real technology. We push the limits of memory and storage innovation, and we thrive in a collaborative environment where engineers learn, build, and solve challenges together. We are driven by curiosity, creativity, and the pursuit of better solutions every day! We are seeking a Principal or Member of Technical Staff (MTS) in Analog Design to join our DRAM IP Design team. As a Principal/ MTS, you will help shape the next generation of Micron's memory products, while working closely with global design, verification, and product teams to bring innovative circuit designs from concept to silicon. Your work will directly influence product performance, quality, and reliability—and contribute to advancements that define the semiconductor industry. Responsibilities: Design, optimize, and verify block‑level analog and mixed-signal circuits for DRAM projects. Work with the internal data science team and EDA vendors to leverage Agentic- AI and improve AI-assisted design flow and circuits optimization. Propose, evaluate and implement new or improved circuit topology to further enhance PPAC of the circuit block. Improve design verification scope and coverage to increase circuit robustness to enhance mass production yield. Partner with global design groups and provide layout guidance through post‑layout simulation. Com

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Interested in changing the landscape of artificial intelligence workloads? Join our team where we are building next-generation, high-bandwidth memory products. In Micron's High Bandwidth Memory Architecture organization, we partner closely with customers to deliver memory solutions purpose-built for emerging AI systems and applications. As a Senior Member of Technical Staff or Member of Technical Staff, DRAM Design Engineer in the next-generation HBM Architecture team, you will drive the architecture and optimization 3D-stacked, high-performance memories. Apply your knowledge to optimize DRAM designs and architectures for maximum performance, power, and area (PPA). This role is ideal for experienced DRAM designers who will identify, architect, design, and simulate next-generation architectures and memory features in collaboration with experts in stack architecture, memory systems architecture, and SoC microarchitecture. Responsibilities: Identify and develop novel DRAM circuit architectures that anticipate next-generation AI workload requirements, to unlock improvements in bandwidth and energy efficiency. Collaborate with peers to identify the highest-leverage DRAM circuit bottlenecks and define architectural hypotheses. Validate architectural hypotheses through schematic-level circuit design, SPICE simulation, and tradeoff analysis, establishing PPA feasibility. Partner with layout designers to conduct floorplanning studies. Colla

About the job Build the hardware that turns new AI processors into working systems. As a Hardware Development Engineer, you will design circuit solutions for Graphcore processor systems and validation platforms. You will turn system requirements into schematics, layout constraints, and testable hardware. Your work will shape production systems and test boards used across development, validation, and customer enablement. You will help prove performance, margin, and reliability before designs move into volume production. Alongside silicon, architecture, software and PCB CAD specialists, you will make design decisions grounded in evidence. You will define validation plans, run lab campaigns, debug prototypes, and interpret results with firmware and architecture teams. This role suits someone who likes owning problems from first schematic to mass production readiness. Few roles connect board design, bring-up, validation, and production so directly. The team and culture Hardware Engineering builds production systems and test hardware around Graphcore processors. The team works close to silicon, architecture, firmware, software, and PCB CAD from the first requirement onwards. Engineers own designs through definition, schematic capture, layout support, bring-up, validation, and production transfer. Work moves quickly because problems are handled close to the lab, not passed between silos. The team makes decisions through evidence: measurements, design reviews, margin data, and open technical challenge. You will speak up, take responsibility, and help the team move with confidence. What we're looking for · Strong digital circuit design and validation skills, including DCDC regulators, power delivery, resets, clocks, and control interfaces. · Experience developing processor-based systems and working with interfaces such as Ethernet, PCIe, DDR, USB, QSPI and JTAG. · Practical lab depth in bring-up, debug, margin testing, and validation using oscilloscopes, logic analysers and

About the job Shape the power delivery that will make Graphcore’s next-generation AI compute systems reliable. As a Power Integrity Engineer, you will analyse power-delivery networks across silicon, package and PCB, turning complex behaviour into practical design recommendations. You will build PDN models, investigate parasitics, and use frequency-domain and time-domain analysis to understand stability, droop, resonances and transient response. Your work will directly inform decoupling, layout, and power and ground distribution choices. You will use electromagnetic simulation to understand resistance, inductance, coupling and impedance. You will also validate assumptions, identify technical risks, and connect simulation results with hardware measurements. You will start with clearly scoped PI problems, supported by experienced engineers when wider decisions are involved. As your capability grows, you will own larger parts of the PDN. The team and culture You will work alongside experienced PI engineers and colleagues across hardware disciplines, connecting analysis with real design decisions and measurements. You will own defined technical problems and move quickly from modelling to recommendations. Decisions are grounded in evidence, physical understanding and clear communication of uncertainty. You will contribute to design reviews, speak up when results expose risk, and take responsibility for the quality of your analysis. What we’re looking for Build, integrate and analyse PDN models for defined power rails, package structures, PCB designs or subsystems. Use frequency-domain impedance analysis and time-domain simulation to investigate voltage stability, droop, resonances and transient response. Evaluate decoupling choices and placement, considering capacitance, parasitics and the interaction between silicon, package and PCB. Use electromagnetic simulation to extract and understand resistance, inductance, coupling and impedance in power and ground structures. Che

About the job Build the hardware that turns new AI processors into working systems. As a Hardware Development Engineer, you will design circuit solutions for Graphcore processor systems and validation platforms. You will turn system requirements into schematics, layout constraints, and testable hardware. Your work will shape production systems and test boards used across development, validation, and customer enablement. You will help prove performance, margin, and reliability before designs move into volume production. Alongside silicon, architecture, software and PCB CAD specialists, you will make design decisions grounded in evidence. You will define validation plans, run lab campaigns, debug prototypes, and interpret results with firmware and architecture teams. This role suits someone who likes owning problems from first schematic to mass production readiness. Few roles connect board design, bring-up, validation, and production so directly. The team and culture Hardware Engineering builds production systems and test hardware around Graphcore processors. The team works close to silicon, architecture, firmware, software, and PCB CAD from the first requirement onwards. Engineers own designs through definition, schematic capture, layout support, bring-up, validation, and production transfer. Work moves quickly because problems are handled close to the lab, not passed between silos. The team makes decisions through evidence: measurements, design reviews, margin data, and open technical challenge. You will speak up, take responsibility, and help the team move with confidence. What we're looking for · Strong digital circuit design and validation skills, including DCDC regulators, power delivery, resets, clocks, and control interfaces. · Experience developing processor-based systems and working with interfaces such as Ethernet, PCIe, DDR, USB, QSPI and JTAG. · Practical lab depth in bring-up, debug, margin testing, and validation using oscilloscopes, logic analysers and

About Vercel: Vercel is the agentic infrastructure company, freeing people and agents to ship what's next. For more than a decade we've helped builders move from idea to production with speed, security, and exceptional developer experience. Now we're scaling our products for both agents and people to ship and run software, built in the open and trusted by OpenAI, PayPal, Ramp, Supreme, and millions of developers worldwide. About the Role: As a growth-focused Fullstack Engineer on our team, you will play a central role in driving user acquisition, conversion, and retention through highly performant and visually stunning web experiences. You will collaborate with cross-functional teams—from marketing to sales to product design—to build dynamic pages, run A/B tests, and optimize conversion funnels. In this role, you’ll design and develop scalable features that enhance the user journey, integrate feedback loops, monitor key metrics, and ensure the reliability of our acquisition funnel. By staying updated on industry trends and focusing on delightful UX, you’ll continuously refine our web properties—ultimately delivering an exceptional experience from first touch through ongoing engagement. If you’re based within a pre-determined commuting distance of one of our offices (SF, NY, London, or Berlin), the role includes in-office anchor days on Monday, Tuesday, and Friday. If you're located beyond that distance, the role is fully remote. For location-specific details, please connect with our recruiting team. What You Will Do: Lead complex frontend projects that establish Vercel as a gold standard for brand and product marketing. Collaborate with growth and marketing teams to A/B test landing pages for lead generation across multiple channels. Design and implement scalable applications, web services, and APIs with a focus on user experience and performance. Contribute to our design system and uphold industry-leading UX standards (e.g., interactions, micro-animations, layout c

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a highly motivated Design Lead to lead the architecture, design, integration, and execution of next-generation HBM and advanced memory products. The successful candidate will drive cross-functional collaboration across Design, Verification, Layout, CAD, Product Engineering, and Technology Development teams to deliver high-quality silicon on aggressive schedules. Key Responsibilities Lead the design and execution of complex memory subsystems and top-level integration activities. Own design planning, technical decision-making, risk assessment, and schedule execution. Coordinate with architecture, verification, layout, DFT, and product engineering teams to ensure design quality and manufacturability. Review design specifications, microarchitecture documents, and implementation plans. Drive RTL, mixed-signal, memory controller, PHY, or custom circuit design activities depending on project needs. Lead design reviews and drive issue resolution across organizations. Mentor junior engineers and provide technical leadership to project teams. Define and improve design methodologies utilizing AI-enabled tools, automation, and best practices. Support silicon bring-up, debug, characterization, and yield improvement activities. Communicate project status, risks, and mitigation plans to management and stakeholders. Required Qualifications BS/MS/PhD in Electrical Engineering, Computer Engineering, or related field. 8&#43;