Design Layout Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality Driving innovation into the future Memory generations within a dynamic work environment About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Lead full-chip floor planning, integration, physical implementation, signoff, and tape-out execution. Drive layout implementation of complex analog, mixed-signal, memory, and high-speed interface designs. Own DRC, LVS, ERC, EMIR, reliability, and manufacturability closure. Define and scale layout methodologies, best practices, and execution frameworks. Leverage Artificial Intelligence, Machine Learning, and Agentic AI to improve layout productivity, design quality, automation, and faster decision-making. Drive automation initiatives using AI-assisted design, verification, debugging, and knowledge management solutions. Lead cross-functional and global teams, mentor engineers, and drive technical excellence. Qualifications B. Tech /M. Tech in Electrical Engineering, Electronics, VLSI, or related field. 15&#43; years of hands-on custom layout experience. Proven success leading full-chip programs from concept through silicon tape-out. Deep expertise in: Analog & Mixed-Signal Layout Memory & High-Speed Interface Layout Full-Chip Floor planning & Integration Signal Integrity, Power Integrity, EM/IR Physical Verification & Signoff Advanced Node Technologies (FinFET/GAA) Strong proficiency with Cadence Virtuoso, Calibre, StarRC, Totem, and related EDA tools. Proven experience leveraging <

About the Team DoorDash Labs is DoorDash's autonomous delivery group, building the robots and hardware that move goods without a driver. The Hardware team designs the electronics at the core of these systems — digital and mixed-signal control boards, power and motor-control electronics, embedded firmware, and the test and integration benches that prove the whole system works. We're building out an experienced and diverse set of electrical engineers to increase our velocity, bandwidth, and operations. About the Role You'll bring PCB layout in-house — a core quality goal — owning floorplanning, stackups, and layout while coordinating closely with mechanical, thermal, and SI/PI engineering to land complete, manufacturable boards. You will report into the Director, Electrical Engineering on our Hardware team in our DoorDash Labs organization. Our offices are open, and depending on the role this position is hybrid or fully onsite — expect to be fully onsite when needed. You're excited about this opportunity because you will… Perform floorplan analysis and create stackups, layout, and footprints Work with mechanical engineering to ensure fit and form compatibility with mechanical systems Work with thermal engineering to ensure a thermally sound layout Work with SI/PI engineering to ensure the board design is complete and robust Drive toward consistently high-quality layout We're excited about you because… Strong PCB layout experience across digital and mixed-signal boards Familiar with stackup technologies, their limitations and considerations, and cost/lead-time impacts Controlled-impedance and high-speed routing know-how; PI/PDN fundamentals Proficient in a professional layout tool (Altium, Cadence, or similar) Comfortable coordinating with mechanical, thermal, and SI/PI engineering Compensation The successful candidate’s starting pay will fall within the pay range listed below and is determined based on job-related factors including, but not limited to, skills, experie

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Role and Responsibilities Responsible for layout design and development of critical analog, mixed-signal, custom digital block, standard cells and full chip level. Perform layout verification like LVS, DRC, Antenna, Shield, Matching, Latch up, EM IR Totem checks, quality check and documentation. Responsible for development of digital block layouts using auto placement and route tools Responsible for basic understanding of skill coding and automation Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/achievements in multiple project environment. Guide developing team members in their execution of Sub block-level layouts & review their work Contribute to effective project-management. Effectively communicating with Global engineering teams to assure the success of layout project. Responsible for the reducing the layout effort by using AI tools Qualification/Requirements 5 to 8-year experience in analog/custom layout design in advanced CMOS process. Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must. Should have hands on experience in creating layout of cr

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Role and Responsibilities Responsible for layout design and development of critical analog, mixed-signal, custom digital block, standard cells and full chip level. Perform layout verification like LVS, DRC, Antenna, Shield, Matching, Latch up, EM IR Totem checks, quality check and documentation. Responsible for development of digital block layouts using auto placement and route tools Responsible for basic understanding of skill coding and automation Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/achievements in multiple project environment. Guide developing team members in their execution of Sub block-level layouts & review their work Contribute to effective project-management. Effectively communicating with Global engineering teams to assure the success of layout project. Responsible for the reducing the layout effort by using AI tools Qualification/Requirements 5 to 8-year experience in analog/custom layout design in advanced CMOS process. Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must. Should have hands on experience in creating layout of cr

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Sr. or Staff Design Engineer in the NVE Design Engineering Analog group at Micron Technology, Inc., you will contribute to the development of memory products that are best-in-class, using your specialized knowledge and Micron proprietary methods of designing and analyzing analog and mixed circuits used in the development of memory products. Designing, simulating, optimizing, and floor planning NAND circuits. Evaluating design feasibility and analyze circuit functionalities. Implementing analog and mixed signal circuit design to meet specifications. Validating design performance and functionalities by running block and chip level simulations using standard industry simulators. Working closely with other functional teams to evaluate, analyze, and improve NAND power consumptions. Collaborate productively with other team members in your team. Review existing and generate new technical documentation. Build and maintain Python-based AI utilities that interfaces with EDA environments to accelerate design tasks such as environment setup, corner execution, regression runs, automated documentation and intelligent/predictive design/layout techniques. Working with and supporting the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products to optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction.

We are seeking a detail-oriented PCB Layout Engineer to maintain electronic component libraries and develop printed circuit board layouts. This role works closely with electrical engineering, mechanical engineering, procurement, and NPI to ensure component data and PCB designs are accurate, consistent, and ready for production. This position is in Austin, Texas. Key Responsibilities Create, verify, and maintain schematic symbols, PCB footprints, and associated 3D models. Validate component pin assignments, dimensions, land patterns, and library attributes against manufacturer documentation. Maintain library naming conventions, revision control, and component approval processes. Develop PCB layouts from approved schematics, including component placement, routing, stackup coordination, and design rule setup. Collaborate with engineers to address electrical, mechanical, thermal, and manufacturing requirements. Run design rule checks, resolve layout issues, and participate in design reviews. Prepare fabrication and assembly deliverables, including Gerber or ODB++ files, drill files, drawings, and pick-and-place data. Coordinate with PCB fabricators and assembly suppliers to resolve manufacturing questions. Support engineering changes and maintain accurate release documentation. Work with procurement and engineering to identify obsolete components and evaluate suitable alternatives. Required Qualifications Experience with setting up PCB design and electronic component library management. Proficiency in Cadence Allegro/OrCAD. Ability to interpret schematics, component datasheets, and mechanical drawings. Working knowledge of PCB fabrication, assembly processes, and design for manufacturability. Familiarity with relevant IPC standards for PCB design and component land patterns. Strong attention to detail, documentation skills, and ability to manage competing priorities. Experience with multilayer, high-density, mixed-signal, and high-speed PCB designs. Familiarity w

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Role and Responsibilities Responsible for layout design and development of critical analog, mixed-signal, custom digital block, standard cells and full chip level. Perform layout verification like LVS, DRC, Antenna, Shield, Matching, Latch up, EM IR Totem checks, quality check and documentation. Responsible for development of digital block layouts using auto placement and route tools Responsible for basic understanding of skill coding and automation Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/breakthroughs in multiple project environment. Guide team members in their execution of Sub block-level layouts & review their work Effectively communicating with Global engineering teams to assure the success of layout project. Responsible for the reducing the layout effort by using AI About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performa

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Role and Responsibilities Responsible for layout design and development of critical analog, mixed-signal, custom digital block, standard cells and full chip level. Perform layout verification like LVS, DRC, Antenna, Shield, Matching, Latch up, EM IR Totem checks, quality check and documentation. Responsible for development of digital block layouts using auto placement and route tools Responsible for basic understanding of skill coding and automation Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/breakthroughs in multiple project environment. Guide team members in their execution of Sub block-level layouts & review their work Effectively communicating with Global engineering teams to assure the success of layout project. Responsible for the reducing the layout effort by using AI About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performa

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. As a Principal/MTS Engineer, you will be an integral part of our HIG HBM Team in Hyderabad, India, responsible for designing and developing complex Application-Specific Integrated Circuits to meet our product's specifications and requirements for High Bandwidth Memories, working for intensive applications such as artificial intelligence and high performance computing solution. Your expertise will contribute to the successful realization of pioneering semiconductor products, enabling our company to maintain its competitive edge in the industry. Role and Responsibilities Must have a solid understanding of die design . This includes knowledge of various die components, their functions, and how they interact within the overall tool. Familiarity with the principles of die design is essential to create effective and efficient layouts. Industry Involvement : You actively participate in standards committees, representing Micron and staying informed about industry developments. Leading Project Layout Team : You lead the establishment and growth of a layout team to meet Micron’s global HBM layout requirements. Technical Expertis

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities: Take responsibility for designing digital IP blocks from initial microarchitecture to RTL creation, integration, and supporting physical hardware development. Define and review module interfaces and system-level architecture. Actively leverage AI‑based tools, agentic workflows, and automation frameworks to: Accelerate RTL design optimization and design‑space exploration Assist in testbench generation and corner coverage Improve debug efficiency across simulation and silicon learning loops Define semicustom methodology for memory design Drive full-chip integration including CDC, Lint, synthesis, STA and power analysis. Collaborate with CAD, EDA, and software teams to integrate AI‑driven flows into simulation, verification, and design sign‑off environments. Collaborate closely with architecture, design, verification, and physical design / layout teams. Oversee and manage the layout process including floor-planning, placement, and routing. Perform block-level and full-chip verification including functional, timing, power and reliability analysis using industry standard and Micron-specific simulators and tools. Contribute to cross-group communication to work towards standardization and group success Provide technical mentorship and participate in design and methodology reviews. Drive innovation into the future memory generations and design methodology within a dynamic w

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are hiring a Layout Engineer for Micron Technology’s HBM Team in Hyderabad, India. In this role, you will contribute to advanced applications including artificial intelligence and high-performance computing solutions with High Bandwidth Memory. You will coordinate with peer groups across Micron's worldwide locations on multiple projects, providing an exceptional chance for career development! Role and Responsibilities • Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. • Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Demonstrate leadership qualities in area/time estimation, scheduling, and execution to meet project schedule/milestones in multiple project environments. • Ability to guide Peer team-members in their execution of Sub block-level layouts & review critical items. • Effectively communicating with Local engineering teams to assure the success of layout project

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Develops and prepares multi-dimensional layouts and detailed drawings of the semiconductor devices from schematics and related geometry provided by design engineering. Work may be completed through use of CAD or other computerized equipment. Checks dimensions, writes specifications, and verifies completed drawings, artwork or digitized plots. May check design layouts and detailed drawings. Position overview: As a Staff Layout Designer, you will develop and prepare multi-dimensional layouts. You will provide detailed drawings of semiconductor devices from schematics and related geometry provided by design engineers, verify data integrity, and take the lead in major block developments. You’ll be expected to communicate effectively with other functional groups across global sites, e.g. TD, design, verification, and CAD. We’re seeking a self-starter who can learn rapidly and adapt quickly to changing priorities. Responsibilities: Organize and prioritize logistics and resource allocations to meet scheduled deadlines and proactively develop methodologies for issue resolution Contribute to group management and technical innovation Assign resources, schedule tasks, provide direction, and deliver quality-controlled results Contribute to projects in a globally distributed design/layout environment</span

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Layout Designer, you will develop and prepare multi-dimensional layouts. You will provide detailed drawings of semiconductor devices from schematics and related geometry provided by design engineers, verify data integrity, and take the lead in major block developments. You’ll be encouraged to communicate optimally with other functional groups across global sites, e.g. TD, design, verification, and CAD. We’re seeking a self-starter who can learn rapidly and adapt quickly to changing priorities. What’s Encouraged Daily: Coordinate and prioritize logistics and resource allocations to meet scheduled deadlines and proactively develop methodologies for issue resolution Contribute to group management and technical innovation Time management skills and prioritizing tasks and deliver quality-controlled results. Contribute to projects in a globally distributed design/layout environment Contribute to the improvement of layout efficiency through the development of automation and new methodologies; plan, and deliver major blocks and product revisions. Minimum qualifications: AS in Electronics, Electrical Engineering, or a related field plus 5&#43; years of direct experience in semiconductor layout design Deep solid understanding of EDA tools (i.e. Cadence Virtuoso, Synopsys, Calibre) Demonstrate a strong ability to debug problems through root-cause analysis, find effective and efficient solutions, and collaborate wit

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Responsibilities: - Mainly focus for system schematic review and mechanical stacking review with mechanical engineers and PCB layout review with layout engineers. - Work with RF engineers to figure out performance issues of radios. - Review design derating and suggest design update due to DFM (design for manufacturing), DFA(design for assembly) and DFC (Design For Cost.) - Schematic and BOM maintain and review. - Write test plans for testing coverage, executes tests, and documents test results for projects. - Report projects’ status and issue tracking to internal. - Teardown and review new products in the market. Qualifications: - BS or MS in EE engineering. - Junior/New grads are welcome. - Leadership in a project. - Good working knowledge of system level architecture and RF fundamentals. - Basic knowledge of EE lab equipment including: oscilloscopes, multimeters, power supplies, etc. - Good understanding of RF metrics. - Proficiency on PCB and Schematic tools such as pads, allegro, orcad etc..