By submitting your resume, you’re expressing interest in our 2027 RDSS (Research and Development Substitute Services) program. Please confirm your eligibility with the local district office before applying the role. NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. With the continuous improvement of chip technology, design scale and performance/power ratio, the physical design of digital chips is facing outstanding challenges in high frequency, low power consumption and multiple applications. High efficiency, high quality of the implementation of the construction chip is the guarantee of the company's competitiveness. As an ASIC-PD engineer at NVIDIA, you'll be responsible for the stage from RTL frozen to tape out, include synthesis, formal verification, constraints definition, timing closure/sign off, study on the timing impact of process and related methodology work. You will face the biggest challenge based on the most advanced process on building chips in the world. What you'll be doing: Chip integration and netlist generation Synthesis RTL/netlist quality check </li
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This role is responsible for assisting the development and implementation of innovative landscape design projects, ensuring sustainability and environmental sensitivity. This role involves collaborating with multidisciplinary teams, conducting thorough research and analysis, and managing project timelines and budgets. Source: Adani Group | Job ID: 54490
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron Technology, we transform how the world uses information to enrich life for all. The DRAM IP Development (IPDEV) team develops critical digital IP solutions that enable next-generation AI, mobile, client, data center, and graphics memory products. Our team is responsible for delivering high-quality DRAM IPs that drive innovation, product performance, and development efficiency across Micron's memory portfolio. As a Senior or Graduate Engineering Intern in DRAM Circuit Design, you will work alongside experienced engineers to develop and validate digital IP circuits used in future DRAM products. This internship provides hands-on experience with RTL-to-GDS design methodologies, custom design and verification flows, silicon learning, and advanced semiconductor development processes. You will contribute to impactful engineering projects while gaining exposure to industry-standard EDA tools, multi-functional collaboration, and AI-enabled engineering workflows. Responsibilities Support the design, development, and verification of digital IP circuits for next-generation DRAM products using RTL-to-GDS methodologies. Perform circuit analysis across process, voltage, and temperature (PVT) corners to evaluate performance, quality, and reliability. Develop automation scripts and leverage Agentic AI, AI-Assisted tools, or Code Assist solutions to improve engineering productivity and design quality. Collaborate with multi-functional engineering teams on design implementation, verification,
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron’s Design Engineering team and help drive the future of memory innovation. This team develops groundbreaking digital, analog, and mixed-signal circuitry that powers advanced memory solutions. You will collaborate with global teams across design, verification, process, and product engineering to deliver high-quality, scalable technologies that transform how the world uses information. As a Memory Design Engineer specializing in HBM, you will contribute to the design, optimization, and validation of memory, logic, and analog circuits. You will partner closely with multi-functional engineering and manufacturing teams to support product development and ensure robust, efficient, and manufacturable solutions. Key Responsibilities Design, layout, and optimize memory, logic, and analog circuits for HBM products Perform parasitic modeling, validation, reticle experiments, and support tape-out revisions Complete layout processes including floor planning, placement, and routing Conduct circuit verification using industry-standard modeling and simulation tools Collaborate with multi-functional teams (design, verification, process, product engineering) to ensure manufacturability and product success Use AI supported design and simulation tools to enhance circuit modeling accuracy, improve design efficiency, and accelerate development cycles Minimum Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineerin
We are now looking for a Senior Chip Design RTL Design Engineer for the Switch Silicon group. As a Chip Design Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! What you'll be doing: Work in a combined design and verification team which develops some of the switch silicon core units. Plan and Design RTL units / blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance. Build reference models, verify and simulate chip blocks/entities according to specifications. Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. What we need to see: B.Sc. in Electrical Engineering or Computer Engineering. 4+ years of experience in RTL design or RTL verification. Previous experience in networking - an advantage. A team player with good communication and interpersonal skills. NVIDIA has some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear from you. Come, join our Switch Silicon design team and help us build the next chip in this exciting and quickly growing field. #LI-Hybrid <
F-15 Avionics Lab Design and Analysis Engineer (Entry-Level or Associate) — USA - Eglin AFB, FL. Apply via Workday.
CPU Physical Design Engineer — India, Bangalore. Apply via Workday.
Silicon Packaging Design Engineer — Arizona, Phoenix. Apply via Workday.
The Head – Projects will lead and coordinate the end‑to‑end design and development process for all hospitality assets under the Adani Group’s hospitality portfolio. This role acts as the central interface between the operator, designers, and AOC’s project execution teams, ensuring that each development meets brand standards, operator specifications, and Adani’s internal guidelines. Source: Adani Group | Job ID: 51408
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities: Develop, integrate, and optimize custom test circuit architectures for NAND flash memory designs, including transistor-level digital, analog, mixed-signal, monitoring, control, and memory-array interface circuits. Interpret product specifications and test requirements; define circuit functionality, interfaces, operating limits, controllability , observability , and validation criteria. Create, review, and optimize schematics , device sizing , bias structures, sensing and monitoring paths, multiplexer s relevant to test circuits. Analyze circuit testability and robustness to ensure compliance with quality , coverage , manufacturability , power, area, and reliability requirements. <span
Principal Experience Design Engineer, AI Frameworks — 2 Locations. Apply via Workday.
Silicon Photonics Component Design Engineer — New Mexico, Albuquerque. Apply via Workday.
Senior SoC Design Engineer — India, Bengaluru. Apply via Workday.
Technical Solution Design Specialist, Core Diagnostics — Vietnam - Ho Chi Minh City. Apply via Workday.
Senior Mask Design Engineer – Hardware — Taiwan, Hsinchu. Apply via Workday.
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