Dram Design Validation Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology’s DRAM and Emerging Memory Group (DEG) is a distributed team of engineers and innovators focused on advancing next-generation memory technologies. For more than 43 years, Micron has been a leader in semiconductor innovation, delivering solutions that power applications ranging from artificial intelligence and high-performance computing to immersive digital experiences. The team is committed to innovation, integrity, sustainability, and meaningful community impact while driving the future of memory technology. As an HBM Memory Design Engineer, you will design, analyze, and optimize digital, analog, and memory circuits used in High Bandwidth Memory (HBM) products. You will collaborate with global design, verification, and product teams to develop high-performance DRAM solutions that meet manufacturability, reliability, and performance objectives. This role provides the opportunity to contribute to innovative memory technologies supporting AI, HPC, and data-centric applications. As part of Micron’s AI-Enabled workforce transformation, you will leverage AI-Assisted tools and data-driven methodologies to improve engineering productivity, accelerate design analysis, enhance decision-making, and drive innovation throughout the product development lifecycle. Responsibilities Design, analyze, and optimize memory, logic, and analog circuits for HBM products, including support for layout, validation, and tape-out activities. Perform circuit verification, parasitic modeling, and design simulations

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology’s DRAM and Emerging Memory Group (DEG) is a distributed team of engineers and innovators focused on advancing next-generation memory technologies. For more than 43 years, Micron has been a leader in semiconductor innovation, delivering solutions that power applications ranging from artificial intelligence and high-performance computing to immersive digital experiences. The team is committed to innovation, integrity, sustainability, and meaningful community impact while driving the future of memory technology. As an HBM Memory Design Engineer, you will design, analyze, and optimize digital, analog, and memory circuits used in High Bandwidth Memory (HBM) products. You will collaborate with global design, verification, and product teams to develop high-performance DRAM solutions that meet manufacturability, reliability, and performance objectives. This role provides the opportunity to contribute to innovative memory technologies supporting AI, HPC, and data-centric applications. As part of Micron’s AI-Enabled workforce transformation, you will leverage AI-Assisted tools and data-driven methodologies to improve engineering productivity, accelerate design analysis, enhance decision-making, and drive innovation throughout the product development lifecycle. Responsibilities Design, analyze, and optimize memory, logic, and analog circuits for HBM products, including support for layout, validation, and tape-out activities. Perform circuit verification, parasitic modeling, and design simulations

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a DRAM System Engineer in the DRAM System Validation Group at Micron Technology, Inc., you will be responsible for system-level validation, system characterization, failure analysis and experimentation as requested. We will be running and configuring diagnostic software, designing experiments, analyzing and interpreting data, crafting custom tools, and presenting data to customers both inside and outside Micron. Apply AI-enabled tools (e.g., data analytics, automation, or Copilot-based solutions) to improve system-level validation, failure analysis, and engineering productivity. On occasion, you may need to carry out these responsibilities at the customer site. We will work with colleagues in the Systems Compatibility Group, in Application Engineering Groups, Product Engineering, Return Material Authorization (RMA), and throughout Micron! Education: Bachelor’s Degree in Electrical Engineering, related field of study, or equivalent experience Successful candidates for this position will have: Familiarity with DRAM and System operations Good understanding system level debug Good multi-tasking, teamwork and problem solving skills Strong verbal and written communication skills in English Preferred Skills and Experience with: Application engineering or design experience related to memory testing and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the Compute and Memory Business Unit (CMBU), driving the innovation behind Micron's next generation DRAM solutions for AI, data center, and client computing platforms. Our team collaborates across product architecture, design, validation, and system engineering to solve complex challenges in bandwidth, power, reliability, and scalability. Together, we help shape the future of memory technology for the world's most demanding compute environments. As a Product Architecture Engineer focused on Signal Integrity (SI) and Power Integrity (PI), you will define the electrical architecture that enables next-generation DRAM products. This highly visible role combines deep technical expertise with system-level thinking to influence product roadmaps, guide design decisions, and partner with industry-leading ecosystem stakeholders. Your work will help deliver memory solutions that power tomorrow's AI and high-performance computing platforms. Responsibilities: Lead SI/PI architecture pathfinding for next-generation DRAM products across AI, data center, and client platforms Define channel, package, board, and module-level SI/PI requirements and design targets for product development Evaluate DDR and LPDDR electrical performance, including timing, jitter, signal margin, crosstalk, impedance, reflections, and power delivery behavior Develop and apply modeling, simulation, and correlation methodologies using industry-standard EDA tools and validation data Partner across design, validation, package,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Staff DFT Design Engineer, you will work on design, simulation, and validation of next generation High Bandwidth Memory (HBM) architectures and circuit blocks. The HBM DFT Design Engineer is responsible for defining, designing, and integrating Design for Test (DFT) architectures for next generation High Bandwidth Memory (HBM) products. This role ensures robust test coverage across wafer, die, stack, and system in package (SiP) test stages while balancing performance, power, area, and manufacturing cost. The engineer works in a multi-functional manner with HBM build, verification, product engineering, test enablement, packaging, and external partners to deliver manufacturable, high quality HBM solutions. Responsibilities will include, but are not limited to: Define and implement HBM DFT architectures, including scan, MBIST, JTAG, boundary scan, TSV test, redundancy test, and at‑speed test structures. Develop DFT solutions for both base die and DRAM die, considering stacked‑die and cube‑level test requirements. Design and integrate test access mechanisms to support wafer probe, cube test, and SiP/system test flows. Collaborate with Product Engineering and Test Enablement teams to align DFT features with manufacturing test flows and cost targets. Support yield learning, failure analysis, and debug by enabling observability and controllability in silicon. Work closely with logic, analog, layout, verification, and physical design teams to ensure DFT is

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) within Micron's Technology and Products Group (TPG) leads the development of High Bandwidth Memory (HBM) solutions for AI and ML applications. Our modern builds use Through Silicon Via (TSV) technology. We stack multiple DRAM chips on a high-speed memory controller with a coordinated logic chip in one package. This new way improves memory density and bandwidth through parallelization. It aims to deliver the lowest power per bit solutions in the industry. Micron is seeking a Design Infrastructure Engineer to build, enable, and scale characterization infrastructure and deliver generated IP to multiple advanced memory and logic developments. This position includes characterizing both standard and custom cells across various process technologies. These encompass Micron internal nodes as well as external foundries, such as TSMC. The position supports multiple HBM product lines, including HBM DRAM dies, Logic dies (JEDEC and custom variants), and advanced 3D HBM architectures. You will work where circuit build, EDA infrastructure, and silicon validation readiness meet. You will develop robust, scalable, and high-quality characterization flows. These flows directly affect timing closure, power modeling, and product quality for next-generation HBM programs. Responsibilities: Develop and sustain scalable infrastructure for standard cell and custom cell characterization, encompassing timing, power, noise, and signal integrity modeling. Build reusable, a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the Customer Engineering team at Micron, where we partner directly with leading datacenter customers to solve complex challenges and bring cutting-edge memory solutions to life. Our work sits at the intersection of innovation and real-world impact—enabling faster computing, smarter systems, and breakthroughs across industries. This role is a key bridge between Micron and our customers. As a Datacenter DRAM Customer Engineer, you’ll act as a primary technical advisor, helping customers design, qualify, and deploy memory solutions that power next-generation compute platforms. You’ll collaborate across engineering, sales, and product teams while influencing both customer success and Micron’s product direction. Responsibilities: Drive design wins and product qualifications for DRAM, HBM, SSD, and compute-focused solutions Partner with sales and cross-functional teams to execute strategic customer plans and track progress Resolve system configuration, setup, and performance issues in customer environments Guide customers on memory architecture, system configuration, and optimization for cloud/datacenter workloads Support validation and deployment through lab activities, design reviews, and system-level testing utilize AI proficiency or AI‑enabled ways of working where applicable Minimum Qualifications: <s

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Own and execute functional verification for block‑level and full‑chip designs from specification through tape‑out Develop, execute, and maintain verification plans , test strategies, and coverage models based on design specifications Architect, develop, and maintain SystemVerilog / UVM‑based testbenches , test vectors, and assertions Run directed and constrained‑random simulations and debug functional failures to root cause Drive coverage closure (functional, code, and assertion coverage) and identify verification gaps Work closely with design engineers to understand RTL, review specifications, and resolve design issues Provide verification status updates , summaries, and risk assessments to project stakeholders Collaborate with cross‑functional teams including design, validation, product engineering, and methodology teams across global sites Contribute to the development and improvement of verification tools, flows, and methodologies Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products. Co-w

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, our vision is to transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, Micron develops technologies that accelerate the transformation of information into intelligence. The DRAM Engineering Group (DEG) creates advanced memory solutions that enable modern applications, including artificial intelligence, high-performance computing, and immersive user experiences. Our team fosters innovation, collaboration, integrity, and continuous learning while solving some of the industry’s most complex engineering challenges. The Semiconductor Design Engineer will contribute to the design, simulation, optimization, and validation of digital and analog CMOS circuits for advanced DRAM and emerging memory technologies. This role provides opportunities to work across the full product lifecycle, from early technology development through product qualification, while collaborating with global design, verification, and manufacturing teams. The successful candidate will develop technical expertise in memory design, circuit analysis, and design automation while supporting the delivery of high-quality products. Responsibilities Design, simulate, analyze, and optimize CMOS memory circuits and functional blocks, including memory arrays, control logic, datapaths, address decoding, and input/output interfaces. Support physical design activities such as floor planning, placement, routing optimization, layout verification, and manufacturability improvements.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Develop, debug, and maintain code that enables the parallel testing of advanced memory devices. Support R&D, interacting closely with global teams, as well as taking part in the designing and debugging of test hardware. Develop efficient and innovative solutions of production test flows through test algo optimization. Design test plans for new tests and test algorithms for DRAM, which cover test software and hardware requirements, defect coverage, characterization, trending, process flow, and test times. Develop test programs for products using primarily C&#43;&#43; coding and Python on Automated Test Equipment (ATE) in the given area followed by test program release to manufacturing areas. Drive innovation and improvement through optimizing test programs by applying more efficient testing methods to reduce product test times and manufacturing costs. Demonstrate a thorough understanding of the device/part as it applies to device/part testing. Automate test processes by writing software to improve work efficiency. Develop tools to help provide better analysis and insight of the terabytes of probe data. Develop new Design for Test (DFT), Design For Manufacturability (DFM), and Design For Reliability (DFR) capabilities. Independently debug and identify root causes of test issues and provide solutions across internal/external groups. Provide meaningful statistical data analysis, analytics and justification of program validation and its release to ensure program quality and data integrity. Evaluate and verify yields/quality with global teams to ensure shipping

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s High Bandwidth Memory (HBM) Design Architecture organization, where we push the limits of memory technology every day. Our team works across global, multicultural engineering groups to build next-generation HBM solutions that power AI and machine learning. We believe the best ideas come from collaboration, curiosity, and a shared drive to innovate! This role plays a critical part in ensuring the reliability of Micron’s most advanced DRAM and HBM products. As an ESD & Latch Up Engineer, you will shape protection strategies from early design through high-volume manufacturing, working hands-on with silicon, layout, and foundry partners. If you enjoy solving deep technical problems and influencing product robustness at scale, this role offers both impact and growth. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Define and own chip-level and IP-level ESD and latch up strategies for HBM DRAM, base die, I/O, TSVs, and die-to-die interfaces Establish ESD and latch up requirements, targets, and sign-off criteria aligned with JEDEC/ESDA standards Enable ESD protection circuits and latch up safe layout practices across designs and technologies Lead silicon validation, failure analysis, and correlation of pre-silicon assumptions to silicon results Act as the technical interface to foundries and partner closely with design, packaging, reliability, and product teams<

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 43 years, Micron Technology has delivered world‑leading memory and semiconductor solutions. As an HBM Memory Design Engineer on the HBM Architecture Team, you will design, simulate, optimize, and floorplan advanced DRAM circuits for next‑generation High Bandwidth Memory products. You will work across digital, analog, and mixed-signal domains to ensure functional correctness, performance, and power efficiency. Your role includes collaborating with globally distributed teams developing modern HBM solutions for AI and ML applications. Responsibilities • Design, simulate, and optimize DRAM memory arrays, data paths, ECC, command/control logic, and high‑speed interface circuits • Evaluate block‑level and full‑chip functionality and propose solutions to ensure functional correctness • Analyze timing, area, power, and complexity trade‑offs in high‑speed DRAM and mixed‑signal designs • Perform pathfinding and feasibility studies for new architectures and future HBM products • Contribute to the design, layout, and optimization of memory, logic, and analog circuits • Support large‑scale verification, debug, and silicon validation activities • Collaborate across multi-functional teams involved in TSV‑based 3D stacking and vertical integration • Participate in design reviews and drive continuous improvement of design methodologies Minimum Qualifications • BSEE with 7&#43; years or MSEE with 5&#43; years of relevant engineering experience • Strong knowledge of

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. About the Role We are looking for a passionate and innovative ATE Test Engineer to design and deliver cutting-edge test solutions for HBM-DRAM devices using modern advanced ATE platforms. In this role, you will lead the development and implementation of test plans, ATE test programs, silicon validation, and test methodologies, while driving multi-site hardware design and development, product characterization, and high-volume production support. Success in this position requires a forward-thinking mindset and the ability to apply the right technologies to meet evolving challenges. Key Responsibilities Develop and implement robust test strategies, plans, and ATE programs for HBM-DRAM devices. Drive silicon validation, characterization, and yield improvement initiatives. Design and debug test hardware, including schematic capture and PCB layout. Collaborate cross-functionally to ensure seamless integration of test solutions into production. Support high-volume manufacturing and troubleshoot complex test issues. Qualifications & Skills Education: Bachelor’s or Master’s degree in Electrical, Electronics or Computer Engineering. Experience: A

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s HBM Design Architecture organization, where we push the limits of memory technology every day. Our team works across global, multicultural engineering groups to build next-generation HBM solutions that power AI and machine learning. We believe the best ideas come from collaboration, curiosity, and a shared drive to innovate! This role plays a critical part in ensuring the reliability of Micron’s most advanced DRAM and HBM products. As an ESD & Latch Up Engineer, you will shape protection strategies from early design through high-volume manufacturing, working hands-on with silicon, layout, and foundry partners. If you enjoy solving deep technical problems and influencing product robustness at scale, this role offers both impact and growth. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Define and own chip-level and IP-level ESD and latch up strategies for HBM DRAM, base die, I/O, TSVs, and die-to-die interfaces Establish ESD and latch up requirements, targets, and sign-off criteria aligned with JEDEC/ESDA standards Enable ESD protection circuits and latch up safe layout practices across designs and technologies Lead silicon validation, failure analysis, and correlation of pre-silicon assumptions to silicon results Act as the technical interface to

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key technical contributor within the High Bandwidth Memory (HBM) Product Engineering – Media Health team, you will play a critical role in driving Media Health manufacturing execution for Micron’s latest next‑generation HBM products, including DRAM die, interface die, and stacked HBM solutions. You will be responsible for Best‑in‑Class HBM product enablement, with direct technical ownership across the core manufacturing KPIs of Quality, Cost, Cycle Time, and Scale. Your contributions will include manufacturing test flow development and validation, device‑ and stack‑level yield improvement, and delivery of optimized extrinsic and intrinsic reliability through deep circuit debug, test coverage optimization, and innovative test strategies. In this role, you will drive manufacturing test time reduction, enhance overall manufacturing efficiency, and contribute to Design‑For‑Test (DFT) strategy development, introducing new ideas that improve cost competitiveness, cycle time, and product quality. You will work closely with cross‑functional partners—including Fab, Product Leads, Design Engineering, Technology Development, and Test Solutions Engineering—to execute both strategic initiatives and tactical deliverables, ensuring continued technology and product leadership. The future of HBM is fast‑moving and