Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron's Boise R&D site, the DRAM Technology Development organization drives innovation in next-generation memory solutions. The team develops advanced DRAM cell architectures, access devices, materials systems, and integration technologies that enable future scaling, improved performance, enhanced reliability, and manufacturing readiness. Engineers work across device, materials, process integration, modeling, design, and product engineering teams to bring groundbreaking memory technologies from concept to production. As an intern in the Advanced DRAM Device & Cell Technology team, you will contribute to the development and characterization of future DRAM cell and access device technologies through experimental studies, data analysis, and collaboration with multidisciplinary engineering teams. This position combines semiconductor device physics, materials engineering, silicon experimentation, electrical characterization, and data-driven decision making to improve cell performance, density, retention, reliability, and manufacturability. The successful candidate will collaborate with multi-functional teams to evaluate novel materials, device architectures, and integration schemes supporting future memory technology development. Responsibilities Support the evaluation of DRAM access devices, capacitors, and cell stack elements through characterization, data analysis, and assessment of new device architectures, materials systems, and integration schemes. Design and implement
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities of your team will include, but are not limited to: 1. Contributing to the development of new DRAM, emerging memory products and IP’s by enabling the overall design, layout, and optimization of Memory/Logic/Analog circuits 2. Supporting design validation & verification, reticle experiments and required tape-out revisions 3. Performing verification processes with modeling and simulation using industry standard simulators 4. Contributing to cross group communication to work towards standardization and group success 5. Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure proper manufacturability of product 6. Proactively solicit inputs from Standards, CAD, modeling, Technology Development groups to ensure the design quality and reliability 7. Driving innovation into the future Memory generations within a dynamic work environ
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron research and development has an opening for Yield Analysis (DA) engineer to develop our next generation memory solution and to support production transfer for the next generation Micron products. As a DA engineer you will be responsible to characterize electrical data to identify and source out extrinsic and intrinsic device issues that are impacting yield. You will work closely with cross functional team from R&D and manufacturing to accelerate product to market timeline by applying device physics knowledge to develop end of line device performance prediction using machine learning. We need engineers who are passionate about detecting problems, making changes for the better, and seek out innovative ways in how predict end of line device performance. Your responsibilities will include, but are not limited to the following: Analyze end of line test, parametric and fab data to identify design, process, and test issues that are impacting yield Develop new tools for yield analysis and implement machine learning technique to improve analysis efficiency and accuracy, leveraging artificial intelligence (AI) to improve proficiency. Identify new creative and innovative ways to use existing tools to identify relevant process issues or device failures Identify interactions between process modules and/or equipment to detect fail mechanisms Use the data collected inline to drive process improvements Improve yield by standardizing methods and
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we're not just designing chips. We're building the physical architecture that powers artificial intelligence, accelerates cloud computing, enables autonomous vehicles, and connects the world through mobile and edge devices. Every breakthrough in AI — from large language models to next-generation data centers — runs on memory. And every bit of that memory lives inside a package that someone like you designs! We're looking for a Senior Package Design Engineer who is passionate about sadvanced semiconductor packaging and ready to lead at the intersection of silicon, system, and scale. This is a high-impact, highly visible role where you'll work across the full product lifecycle — from early-stage co-design with silicon teams all the way to High Volume Manufacturing (HVM). If you thrive where precision meets innovation, where your decisions shape products reaching millions of users worldwide, and where your expertise directly influences how the AI era unfolds — this role is for you! Responsibilites: Lead Co-Design from Silicon to System - Partner with silicon design, Business Units, customers, and package architecture teams to define new product concepts from the earliest stages of chip development - Optimize die floorplans, interconnection schemes, and package architectures — from concept to HVM - Drive trade-off studies and architecture decisions for advanced DRAM products targeting AI/D
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Senior Verification Engineer with 4-8 years of Experience As a Senior RTL Verification Engineer you will work in a highly innovative, motivated, Upbeat, and dynamic design team capable of verifying complete products using innovative memory technologies. You will need to have the ability to drive the team and the overall verification effort to ensure the timely delivery of a functionally accurate design. Unique Opportunities Complete ownership of RTL verification and end to end analysis of sophisticated full chip gate level custom designs with advanced low power and power management technologies spread across multiple categories such as DDR5, LPDDR5,DDR6 and LPDDR6 that can operate at high speeds of up to 9600MT/s. Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design. Work on multi-functional tasks that can widen your skills. Responsibilities: Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Participate in developing verification methodology and verification environments for sophisticated products. Co-work wi
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Unique Opportunities Complete ownership of verification and end to end analysis of sophisticated full chip gate level custom designs with advanced low power and power management technologies spread across multiple categories such as DDR5, LPDDR5,DDR6 and LPDDR6 that can operate at high speeds of up to 9600MT/s. Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design. Work on multi-functional tasks that can widen your skills. Responsibilities: Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Participate in developing verification methodology and verification environments for sophisticated products. Co-work with international colleagues on developing new verification flows to take on the challenges in design. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Ability to identify verification pain points sui
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DRAM Technology Node Development team is responsible for bringing next-generation DRAM products from concept to production by improving yield, validating new features, and driving product quality. The team collaborates across design, process integration, manufacturing, and test engineering to solve complex technical challenges and deliver innovative memory solutions that power the future of computing. As a Product Engineer Intern in the DRAM Technology Node Development group, you will work alongside experienced engineers to support the development of next-generation DRAM products. You will gain hands-on experience in product characterization, test development, yield analysis, and design validation while applying analytical and problem-solving skills to real-world engineering challenges. Responsibilities Support new DRAM product development through electrical characterization, test development, circuit analysis, and design validation activities. Analyze product, test, and yield data to identify performance issues and drive continuous improvement initiatives. Collaborate with process, design, manufacturing, and test engineering teams to investigate and resolve product and process-related issues. Develop and improve test methodologies, automation scripts, and data analysis tools to enhance product quality and testing efficiency. Apply engineering tools, statistical analysis techniques, and AI-enabled technologies to support product c
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Enable rapid learning and effective technology transfer across the organization through deep involvement in defect detection equipment applications and advanced data analysis. Analyze process challenges using defect data and equipment signals to identify root causes and improvement opportunities. Collaborate with cross-functional teams across process integration, process development, data science, and yield analysis to deliver solutions with global impact. Drive defect reduction and yield improvement efforts across multiple projects on Micron’s DRAM roadmap, including High Bandwidth Memory (HBM) and advanced DRAM technologies. Develop a comprehensive understanding of process flows, potential failure and defect modes through FMEA, and associated detection strategies for inline yield characterization. Define die loss paretos upon issue detection and partner with process and integration teams to design, execute, and analyze experiments and DOEs to resolve yield limitations. Monitor baseline inline yield health for owned process modules using SPC techniques to quickly identify excursions, process drift, and emerging risks. Protect line yield by proactively escalating issues and coordinating corrective actions. Apply advanced data science and data interpretation skills to analyze complex datasets, draw actionable conclusions, and communicate results effectively. Present findings and recommendations to internal teams and customers using analytical tools such as JMP and Python. Employer will accept a Master’s degree in Material Engineering, Chemical Engi
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we are transforming how the world uses information to enrich life through innovative memory and storage solutions. The DRAM Thin Films Process Engineering team develops advanced materials and deposition processes that enable future memory scaling, improved device performance, and next-generation semiconductor technology. Our team works at the forefront of process development to support DRAM technologies that power artificial intelligence, cloud computing, and data-intensive applications. As a DRAM Thin Films Process Engineering Intern, you will work alongside experienced engineers on a high-impact summer project focused on semiconductor process development and optimization. This role provides hands-on experience with experimental design, process characterization, data analysis, and multi-functional collaboration. You will contribute to real engineering challenges and present your results to technical and leadership audiences at the conclusion of the internship. Responsibilities Research and develop innovative solutions that support next-generation memory technology and thin film process advancement. Develop, complete, and analyze experiments to improve thin films process performance, manufacturability, and product quality. Apply statistical analysis, data science techniques, and AI-enabled tools to identify process trends, optimize performance, and accelerate engineering decision-making. Partner with process, equipment, and integration engineering teams to solve complex technic
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Lead Principal Engineer, Layout Design at Micron, you will be at the forefront of developing groundbreaking memory solutions! This role is an outstanding opportunity to lead the physical implementation of modern DRAM and mixed-signal circuits, turning schematics and specifications into flawless, manufacturable layouts. You will collaborate with a world-class team of Circuit Designers, Verification Engineers, CAD/Methodology experts, Process Integrators, Product Engineers, Test/Probe specialists, Assembly professionals, and Marketing strategists. Together, we will drive cost, quality, reliability, time-to-market, and customer happiness through outstanding layout and build. Key Responsibilities Lead the layout build and physical realization of new memory products. Interpret device and circuit specifications to implement custom layout solutions meeting PPA (power, performance, area) and reliability targets. Develop hierarchical layouts for analog, digital, and memory-array-related circuitry using industry-standard EDA tools. Build block and top-level floorplans optimizing placement, routing resources, signal integrity, power delivery, and manufacturability. Optimize layout for critical metrics such as die size/area efficiency, matching, coupling/noise, and timing. Produce layout collateral and documentation for cross-team integration. Physical Verification and Tapeout Signoff Run and debug physical verification flows and ensure closure using indust
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 職務内容 次世代DRAM技術開発におけるプロセスインテグレーション業務をご担当いただきます。 【主な業務内容】 次世代DRAMノード向けプロセス技術の開発および統合 キャパシタモジュールの設計、開発、最適化 複数のプロセスモジュールを統合し、性能および整合性を確保 プロセス条件最適化のためのDOE(実験計画法)の設計・実施およびデータ解析 歩留まりおよび品質に関する課題の特定と改善 Process、Design、Device、Qualityチームとの部門横断的な連携 応募資格 必須要件(技術スキル) 半導体プロセスに関する基礎知識 プロセスインテグレーションまたは関連するエンジニアリング分野の知識 半導体業界における5年以上の実務経験 歓迎要件 DRAMデバイスおよび構造に関する知識 語学・コミュニケーションスキル 海外チームとの会議に対応できる英語でのコミュニケーション能力 日常業務を遂行できる日本語力 関係部門との連携・調整を円滑に進めるための高い対人コミュニケーション能力 求める人物像 高い分析力と問題解決能力をお持ちの方 チーム環境において主体的に業務を推進できる方 技術的課題に対して粘り強く取り組み、オーナーシップを持って対応できる方 ------------------------------------------------------------------- ■ Job Responsibilities In this role, you will be responsible for process integration activities for next-generation DRAM technology development. Your key responsibilities will include: Development and integration of process technologies for Future DRAM nodes Design, development, and optimization of capacitor modules Integration across multiple process modules to ensure consistency and performance <
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Senior Verification Engineer with 4-8 years of Experience Unique Opportunities Complete ownership of verification and end to end analysis of sophisticated full chip gate level custom designs with advanced low power and power management technologies spread across multiple categories such as DDR5, LPDDR5,DDR6 and LPDDR6 that can operate at high speeds of up to 9600MT/s. Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design. Work on multi-functional tasks that can widen your skills. Responsibilities: Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Participate in developing verification methodology and verification environments for sophisticated products. Co-work with international colleagues on
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary This position supports Micron’s DRAM Tester Solutions group, focusing on physical design implementation for processors, controller architectures, and ASICs. The role is responsible for full‑chip and block‑level physical design closure, low‑power implementation, timing, power, and signal integrity signoff, and successful tape‑out across advanced technology nodes. Responsibilities: Lead block‑level and full‑chip physical design including floorplanning, placement, CTS, routing, and tape‑out. Drive timing closure across multiple modes and corners using industry‑standard STA tools. Perform power integrity, IR/EM, and power grid closure to meet signoff requirements. Develop and optimize APR flows, scripts, and methodologies for PPA improvements. Own subsystem or full-chip closure work while coordinating with cross-functional teams. Minimum Qualifications: Bachelor’s degree or Master’s degree or equivalent experience in Electrical Engineering, Electronics, or Computer Architecture. Minimum of 15 years of hands‑on ASIC physical design implementation experience. Proven experience with multiple production tape‑outs in advanced process nodes. Strong expertise in low‑power design techniques including UPF/CPF and multi‑voltage systems. Proficiency in scripting languages such as Tcl, Perl, or Python for flow automation. Preferred Qualifications: Experience with Synopsys and Cadence physical design and ti
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary As an MTS Design Verification Engineer, you will serve as a technical leader driving innovation in DRAM verification for advanced memory products. This role focuses on leading design and verification strategy, influencing key technical decisions, and ensuring high-quality, functionally correct, and scalable memory solutions. You will collaborate with global teams, guide methodology improvements, mentor engineers, and act as a domain expert to support next-generation DRAM technologies. Responsibilities Lead DRAM verification innovation, driving key technical decisions, architecture, and strategy during product execution Collaborate with global teams to define and implement best-known methods for verification and product development Drive verification planning, coverage closure, and silicon debugging for advanced DRAM products Evaluate and implement new tools, methodologies, and flows to improve verification efficiency and quality Mentor engineers and provide technical leadership while contributing expert guidance to senior leadership teams Minimum Qualifications Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field 8+ years of experience in DRAM/memory or advanced CMOS verification Strong circuit analysis and debug skills at the transistor level — able to root-cause behavior, not only at the testbench level Experience with simulation tools such as HSPICE, Finesim, Verilog, or SystemVe
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Contribute to the development of new product opportunities by assisting with the overall design, layout, and optimization of DRAM Memory array/Peripheral Logic/Analog circuits Actively leverage AI‑based tools, agentic workflows, and automation frameworks to: Accelerate schematic optimization and design‑space exploration Assist in parasitic analysis, sensitivity studies, and corner coverage Improve debug efficiency across simulation and silicon learning loops Define semicustom methodology for memory design Collaborate with CAD, EDA, and software teams to integrate AI‑driven flows into simulation, verification, and design sign‑off environments. Oversee and manage the layout process including floor-planning, placement, and routing Perform circuit-level verification including functional, timing, power and reliability analysis using industry standard and Micron-specific simulators and tools. Contribute to cross-group communication to work towards standardization and group success Drive innovation into the future memory generations and design methodology within a dynamic work environment Minimum Qualifications Master’s degree in electrical or computer engineering with 15+ years of experience in vlsi design. Strong fundamentals in CMOS circuit design, device physics and memory operation. Proven lea
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