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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks: Drive best-in-class product maturity which includes bits per wafers (yield), product grades (Repair Density and DPM) at the fastest speed and cycle of learning. In depth knowledge of processes across different loops or functions (FEOL, MOL, CELL, BEOL) to identify best optimum process integration solution to achieve the goal, knowledge on product and circuit design will be plus. Collaborate with YE, Device, RDA, Metrology team to resolve top yield issues, develop inline visibility to enable fast yield ramp and minimize excursion. Identify best known method and business process from DRAM/NAND sites and drive for alignment and standardize across network. Travel to Micron sites as necessary for face to face collaboration. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people creat

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Engineer at Micron’s HBM New Product Validation team in Boise, ID you will be a senior technical guide responsible for validation strategy and readiness for future-generation High Bandwidth Memory (HBM) products. You will apply deep expertise in complex RAM and high-bandwidth memory architecture and building to establish architecture validation strategies. You will impact decisions that improve validation observability and debug efficiency . You will lead investigations of complex architecture, building , and silicon issues from pre-silicon simulation through post-silicon characterization. You will partner across Design Engineering, Design Validation, Product Engineering, Systems teams, and will develop and promote AI-enabled validation methodologies that improve efficiency, quality, and scalability. Responsibilities: Define architecture-aware validation strategies and coverage direction for future-generation HBM products. Drive validation readiness for next-generation products by preparing strategies, test environments, and execution plans before first silicon, reducing risk, accelerating issue resolution, and preventing late-stage surprises. Evaluate new DRAM/HBM architectural features and define validation requirements and testability needs before DBR. <span style="color:#

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Central Engineering at Micron Technology, Inc. is a dynamic and integral part of the company, focused on providing essential services and driving innovation across various technical domains. Established nearly five years ago, Central Engineering initially concentrated on creating economies of scale and enhancing efficiency for the Technology Products Group (TPG). Over the past three years, the team has evolved to deliver industry-first products, develop core design process automation, and produce powerful AI and Data Science tools. As a CAD in CE Memory CAD Engineer at Micron, we work in a fast-paced and collaborative environment. We provide production support role by evaluating, developing, enhancing and debugging both in-house and commercial EDA tools and flows for the design, physical layout, and verification of CMOS integrated circuits! The right person will have be developing and applying CAD software engineering methods, theories and research techniques in support of the organization's product development! Assignments include crafting and developing CAD software, assessing architecture and hardware limitations, and defining and implementing CAD software engineering applications. Responsibilities: Innovating to develop tools, flows, and methodologies to increase the design efficiency and quality of our memory designs on NAND/DRAM/HBM Providing training, documentation, and support to end-users o

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Boise site is undergoing a historic $15 billion investment in semiconductor manufacturing, with DRAM production planned for the second half of the decade. As part of Micron’s global $150 billion expansion, our High Volume Manufacturing team drives innovation and operational excellence to deliver world-class memory solutions. As an ID1 High Volume Manufacturing Process Engineer Intern , you will work on process optimization, yield improvement, and cost reduction initiatives. This role involves collaborating with equipment teams, operations leaders, and multi-functional collaborators to ensure area critical metrics are met and wafer output is optimized. Responsibilities Finish the required safety training and adhere to safety policies and laws. Ensure proper tool documentation and update reaction mechanisms as needed. Supervise and resolve issues impacting yield, excursions, defects, or output loss. Apply SPC, FDC, and 8D methodologies to optimize processes and improve tool availability. Analyze data using engineering knowledge and visualization tools to make critical process decisions. Perform project work to optimize wafer processing and increase wafer outs. Update or create procedures to align with area and global practices. Minimum Qualifications Current student in an engineering or related degree program; graduation date not before September 2027. Understanding of SPC and Design of Experiments. Prof

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Unique Opportunities Complete ownership of verification and end to end analysis of sophisticated full chip gate level custom designs with advanced low power and power management technologies spread across multiple categories such as DDR5,LPDDR5,DDR6 and LPDDR6 that can operate at high speeds of up to 9600MT/s. Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design. Work on multi-functional tasks that can widen your skills. Responsibilities: Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Participate in developing verification methodology and verification environments for sophisticated products. Co-work with international colleagues on developing new verification flows to take on the challenges in design. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Ability to identify verification pain poin

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key leader within High Bandwidth Memory (HBM) Product Engineering Media Health team, you will spearhead and develop a high performing team driving Media Health Manufacturing and activities for Micron’s latest HBM products, both on DRAM and Interface die and a stacked product. You will lead a portfolio of Best-In-Class Next Generation HBM Product focused on the critical KPI’s Quality, Cost, Cycle Time and Scale. This include lead the manufacturing test flow development and validation, improve the device/stacked yield with most optimized extrinsic and intrinsic reliability through in depth circuit debug, test coverage optimization and strategy innovation, test time improvement for manufacturing flow and drive the DFT (design for test) strategy to stage new ideas to improve cost, cycle time and quality. You will also collaborate with cross functional team (Fab, Product Leads, Design, Technology Development, Design, Test Solution Engineering etc) with diverse expertise to achieve both strategic and tactical objectives and stay ahead on technology and product leadership. The future of HBM are exciting and dynamics. Micron is seeking experienced individuals that find technical challenges engaging and invigorating. Responsibilities: Optimized Test Coverage: T

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key leader within High Bandwidth Memory (HBM) Product Engineering Media Health team, you will spearhead and develop a high performing team driving Media Health Manufacturing and activities for Micron’s latest HBM products, both on DRAM and Interface die and a stacked product. You will lead a portfolio of Best-In-Class Next Generation HBM Product focused on the critical KPI’s Quality, Cost, Cycle Time and Scale. This include lead the manufacturing test flow development and validation, improve the device/stacked yield with most optimized extrinsic and intrinsic reliability through in depth circuit debug, test coverage optimization and strategy innovation, test time improvement for manufacturing flow and drive the DFT (design for test) strategy to stage new ideas to improve cost, cycle time and quality. You will also collaborate with cross functional team (Fab, Product Leads, Design, Technology Development, Design, Test Solution Engineering etc) with diverse expertise to achieve both strategic and tactical objectives and stay ahead on technology and product leadership. The future of HBM are exciting and dynamics. Micron is seeking experienced individuals that find technical challenges engaging and invigorating. Responsibilities: Optimized Test Coverage

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Engineer, Photo EUV Technology, you will be responsible for EUV process module development for memory devices, in addition to other photolithography and process integration related activities. In this position, you will work with other Micron engineers, technology partners and vendors to develop unit processes that meet device requirements for next-generation semiconductors. Key Responsibilities Develop and optimize EUV process modules to meet the stringent requirements of advanced memory devices. Perform advanced process development tasks, including material evaluations, reticle and layout design, OPC development, process window analysis, and overlay optimization. Lead the successful introduction of new technologies to manufacturing, focusing on yield improvement, cycle time reduction, and tool expansion. Collaborate closely with R&D and high-volume manufacturing (HVM) partners in globally diverse locations to ensure seamless integration and flawless execution. Partner with DRAM Development site leaders to align development strategies, deliverables, and provide on-site support for various technology projects. Work alongside Micron’s Manufacturing and Central teams to implement outstanding methods for manufacturability. Qualifications Proven experience in EUV process development and photolithography. Outstanding problem-solving skills and the ability to successfu

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We define ESD and latch-up architecture for next-generation HBM products across advanced nodes and 3D integration. Our team works across device, circuit, and packaging domains to solve reliability challenges that directly impact product quality. We take on complex problems and turn them into scalable solutions that enable high-performance memory! As an SMTS/DMTS HBM ESD/Latch-Up Architect, you will define protection strategies across base die, DRAM stacks, and interconnects. This role shapes product reliability from early architecture through silicon validation. You will work across teams and influence technical direction while solving system-level ESD challenges. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Define end-to-end ESD and latch-up architecture across base die, DRAM die, and interconnects Develop protection strategies for high-speed I/O, TSV interfaces, and advanced packaging Establish ESD/LUP standards, rule decks, and signoff criteria Drive correlation between d

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Frontend Central Product Integration Engineering team strives to deliver leading edge process capability, best-in-class bits per wafer (Yield) with highest quality and fastest speed through innovation and collaboration with cross functional team. With the diversity of technology in DRAM/NAND and geography (TD development sites – Boise/Japan, 5 manufacturing sites – US (F6, ID1), Taiwan (OMT), Japan (F15) and Singapore (F10)), Frontend Central PIE team will be responsible to identify best-known-method holistically, align best-known-method timely and implement improvement systematically across the network. As FE Central Process Integration Senior Engineer, you will be responsible to develop best optimum process to achieve product maturity. Responsibilities and Tasks: Drive best-in-class product maturity which includes bits per wafers (yield), product grades (Repair Density and DPM) at the fastest speed and cycle of learning. In depth knowledge of processes across different loops or functions (FEOL, MOL, CELL, BEOL) to identify best optimum process integration solution to achieve the goal, knowledge on product and circuit design will be plus. Collaborate with YE, Device, RDA, Metrology team to resolve top yield issues, develop inline visibility to e

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key technical contributor within the High Bandwidth Memory (HBM) Product Engineering – Media Health team, you will play a critical role in driving Media Health manufacturing execution for Micron’s latest next ‑ generation HBM products, including DRAM die, interface die, and stacked HBM solutions. You will be responsible for Best ‑ in ‑ Class HBM product enablement, with direct technical ownership across the core manufacturing KPIs of Quality, Cost, Cycle Time, and Scale. Your contributions will include manufacturing test flow development and validation, device ‑ and stack ‑ level yield improvement, and delivery of optimized extrinsic and intrinsic reliability through deep circuit debug, test coverage optimization, and innovative test strategies. In this role, you will drive manufacturing test time reduction, enhance overall manufacturing efficiency, and contribute to Design ‑ For ‑ Test (DFT) strategy development, introducing new ideas that improve cost competitiveness, cycle time, and product quality. You will work closely with cross ‑ functional partners—including Fab, Product Leads, Design Engineeri

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks: Drive best-in-class product maturity which includes bits per wafers (yield), product grades (Repair Density and DPM) at the fastest speed and cycle of learning. In depth knowledge of processes across different loops or functions (FEOL, MOL, CELL, BEOL) to identify best optimum process integration solution to achieve the goal, knowledge on product and circuit design will be plus. Collaborate with YE, Device, RDA, Metrology team to resolve top yield issues, develop inline visibility to enable fast yield ramp and minimize excursion. Identify best known method and business process from DRAM/NAND sites and drive for alignment and standardize across network. Travel to Micron sites as necessary for face to face collaboration. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations tha

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality Driving innovation into the future Memory generations within a dynamic work environment About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Understand the LPDRAM state machine and develop the hardware models for DRAM features and the related validation test bench. Develop memory controller models, including request scheduling and address mapping to enable new DRAM features. Develop the automation test scripts using Python to improve the overall simulation methodologies. Develop new DRAM technology changes per the spec and the state machine and the validation test bench. Develop system engineering, software engineering, system integration, or distributed system architectures. Identify system data, hardware, or software components required to meet user needs. Communicate with staff or clients to understand specific system requirements. Research, test, or verify proper functioning of software patches and fixes. Provide advice on project costs, design concepts, or design changes. Communicate project information through presentations, technical reports, or white papers. Design and conduct hardware or software tests. Establish functional or system standards to address operational requirements, quality requirements, and design constraints. Evaluate existing systems to determine effectiveness, and suggest changes to meet organizational requirements. Employer will accept a Master's degree in Electronics Engineering, Electrical Engineering, Computer Engineering, Computer Science, or related field. Position requires: 1. C/C&#43;&#43; or Python; 2. Debugging interfaces, including GDB and PDB; 3. LPDRAM technology; 4. Computer Architecture; 5. Memory controller

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Act as a module owner to conduct root cause investigations and failure analysis in time-sensitive environments. Drive improvements in yield, cost efficiency, and quality. Run Design of Experiments (DOE) to enhance process capability and margin. Monitor trends and sustain line stability. Address top detractors to improve device yield and reliability. Lead workshops during technology transfer for next-generation devices. Start up, develop, and optimize processes for product quality and reliability. Identify and resolve process-related issues using FMEA, 8D, SPC/FDC methodologies. Coordinate and execute process, equipment, and material evaluations. Validate and qualify new processes, tools, and materials for new product introduction. Manage and audit material suppliers to meet quality, cost, and risk objectives. Support internal and external audits. Be willing to travel internationally for 3&#43; months for tech transfer/training. Be prepared to work a shifted schedule as required. Required Qualifications Bachelor’s degree in Materials Science, Electrical, Electronics, Chemical, or related engineering fields. Basic understanding of MOSFET and DRAM operation. Knowledge of CMOS and characterization methods. Familiarity with DOE, SPC, and JMP. Ability to support SPC/FDC/RMS/APC systems and site-to-site portability. Preferred Qualifications Internship experience in a 300mm semicondu