Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) sits within the Technology and Products Group (TPG). We are developing High Bandwidth Memory (HBM) solutions for AI and ML applications! We stack multiple DRAM chips on a high-speed memory controller using TSV (Through Silicon Via) technology, dramatically increasing memory density and bandwidth. Our designs span custom digital and RTL2GDS flows, and we are targeting the lowest power per bit in the industry. Join us as a Senior Verification Engineer and contribute to modular, scalable verification solutions for next-generation HBM DRAM products! You will work independently within a multi-functional team of technical domain experts, spanning both IP-level and SoC-level verification. You will collaborate with Design Engineering, Product Engineering, and Business Units to complete the HBM verification roadmap. You will apply your solid understanding of testbench architecture, custom or SoC verification methodologies, and 2.5D & 3D package integration to evaluate issues, define solutions, and broaden your expertise. Responsibilities: Develop and implement verification plans and architecture collateral across IP-level and SoC-level verification for current and future HBM designs Support co-verification of the overall system and participate in customer interactions to gather feedback and provide recommendations for future HBM solutions Build and improve verification methodology components and GenAI applications aligned to HBM design cycles, broadening cross-disc
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Summary: As a Design Verification Engineer Intern at Micron, you will collaborate with highly innovative design and verification teams to support the development of advanced DRAM and emerging memory technologies. This role offers hands-on exposure to high-density memory products, complex verification methodologies, automation tools, and industry-leading semiconductor design practices. You will work within a global engineering environment while learning from experienced engineers and contributing to world-class memory solutions. Responsibilities Support verification activities while developing an understanding of chip-level and block-level functionality for advanced memory products. Assist in developing and maintaining digital and analog verification environments for DRAM technologies. Create test patterns, execute regressions, and help improve functional coverage of memory features and architectures. Analyze verification failures, support debugging efforts, and collaborate with engineers to identify root causes. Participate in automation, scripting, AI-assisted engineering solutions, and verification flow improvements while collaborating with global teams. Minimum Qualifications Currently pursuing the final year of a Bachelor's degree or a Master's degree in Electronics Engineering, Electrical Engineering, or a related field, with enrollment in an accredited university program. Basic understanding of digital logic
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary As a DRAM Architect, you will optimize DRAM solutions for power, performance, and cost while pioneering new memory features and system-level innovations. You will collaborate with global, multi-functional teams to deliver high-quality, reliable, and power-efficient DRAM solutions that meet aggressive performance and time-to-market goals. Responsibilities: Develop comprehensive DRAM system/component solutions, specifications, and methodologies to optimize DRAM performance, power efficiency, and cost. Collaborate with multi-functional teams to brainstorm and implement innovative ideas, assess solution efficiency, and make necessary adjustments. Drive innovation in future memory generations within a dynamic work environment. Analyze system behavior and assess solution effectiveness, make data-driven optimizations and trade-offs. Communicate complex technical concepts to engineers from various backgrounds. Minimum Qualifications: 3+ years of proven experience in memory design, product engineering, or system architecture and usage Self-motivated with exceptional problem-solving skills and a drive to discover new solutions. Excellent communication and interpersonal skills. Bachelor’s degree or equivalent experience in Electrical Engineering, Computer Engineering, or a related field. <
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron is seeking a Senior Digital Design Engineer to contribute to the development of advanced DRAM digital and mixed-signal blocks. This role is responsible for RTL design, implementation, synthesis, timing analysis, power optimization, and design quality throughout the RTL-to-GDS flow. The engineer will collaborate with architecture, verification, and physical design teams to deliver high-performance, power-efficient designs that meet product specifications and PPA (Power, Performance, Area) objectives for next-generation memory products. Responsibilities Design, develop, and deliver RTL for complex DRAM digital and mixed-signal blocks, ensuring alignment with product specifications and performance targets. Perform front-end design quality checks including linting, CDC/RDC analysis, logic synthesis, timing constraint development, and timing closure activities. Collaborate with architecture, verification, and physical design teams to optimize power, performance, area (PPA), and overall design quality. Develop and maintain synthesis and timing constraints (SDC), analyze timing reports, and drive timing closure across multiple operating scenarios. Improve design methodologies, automation, and RTL-to-GDS flows to enhance development efficiency, design quality, and time-to-market. Minimum Qualifications Master’s degree in Electrical Engineering (or equivalent) with 4+ years of experience, or Bachelor’s degree with 5+ years
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Design, implementation and integration of complex analog circuits such as CMOS Amplifiers, Comparators, Bandgap References, LDOs, Charge Pumps, Oscillators, DLL, IO Buffers, Analog Test Mux, Process Monitor, and Temperature sensors for advanced DRAM products. Design, implementation and integration of synchronous and asynchronous custom digital block Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Analog/Memory/Logic circuits. Parasitic modeling and design validation, reticle experiments and required tape-out revisions. Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product. Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality. Mentor and lead young designers. Also, strong AI proficiency, a solid understanding of agentic AI models, a
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron's Design-Technology Co-Optimization (DTCO) team plays a critical role in bridging semiconductor device technology and circuit design to enable next-generation DRAM products. The team evaluates emerging technologies, develops methodologies for performance assessment, and contributes to early design enablement activities that influence product power, performance, and area (PPA). Through close collaboration with device, process, modeling, and design engineering teams, DTCO helps guide technology development decisions that shape future memory solutions. As a DTCO Intern, you will gain hands-on experience evaluating advanced DRAM technologies and assessing their impact on future product architectures. You will use industry-standard electronic design automation (EDA) tools, perform circuit simulations and benchmarking, and apply data analysis techniques to support technology development decisions. This position provides an opportunity to work alongside world-class engineers while developing technical skills in semiconductor technology, circuit design, and AI-enabled automation workflows. Responsibilities Evaluate emerging DRAM technologies and analyze their impact on future product architectures and design tradeoffs. Perform transistor-level simulations and circuit benchmarking using industry-standard EDA tools such as HSPICE and FineSim. Develop and utilize Claude AI-based automation workflows and data analysis processes to improve simulation efficiency and engineering productivity. <li
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the Compute and Memory Business Unit (CMBU), driving the innovation behind Micron's next generation DRAM solutions for AI, data center, and client computing platforms. Our team collaborates across product architecture, design, validation, and system engineering to solve complex challenges in bandwidth, power, reliability, and scalability. Together, we help shape the future of memory technology for the world's most demanding compute environments. As a Product Architecture Engineer focused on Signal Integrity (SI) and Power Integrity (PI), you will define the electrical architecture that enables next-generation DRAM products. This highly visible role combines deep technical expertise with system-level thinking to influence product roadmaps, guide design decisions, and partner with industry-leading ecosystem stakeholders. Your work will help deliver memory solutions that power tomorrow's AI and high-performance computing platforms. Responsibilities: Lead SI/PI architecture pathfinding for next-generation DRAM products across AI, data center, and client platforms Define channel, package, board, and module-level SI/PI requirements and design targets for product development Evaluate DDR and LPDDR electrical performance, including timing, jitter, signal margin, crosstalk, impedance, reflections, and power delivery behavior Develop and apply modeling, simulation, and correlation methodologies using industry-standard EDA tools and validation data Partner across design, validation, package,
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Job Description We are the HBM Design Architecture team within Micron’s HBM DRAM Engineering Group. We work at the intersection of design, technology, and manufacturing to deliver next‑generation HBM solutions that power AI and ML workloads worldwide. Our team thrives on deep technical collaboration, global partnerships, and solving problems that truly push memory technology forward! In this full‑time onsite role, you will provide critical technology support for the design and development of advanced HBM DRAM products. You will serve as a bridge between internal design teams, foundries, and technology development groups, helping translate advanced process capabilities into scalable, high‑performance architectures. Your work will directly impact performance, power efficiency, reliability, and long‑term HBM roadmap success. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. The responsibilities outlined below represent key areas of focus for this role and are intended to be illustrative rather than exhaustive. Candidates are expected to demonstrate relevant experience in at least three of the five focus areas outlined below. Job Responsibilities Foundry Interface and Technology Alignment Act as the primary technical interface between foundry partners and Micron design organizations. Drive closure of design-process gaps through collaborative engagement with foundry process teams. Influence foundry
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description We are the HBM Design Architecture team within Micron’s HBM DRAM Engineering Group. We work at the intersection of design, technology, and manufacturing to deliver next‑generation HBM solutions that power AI and ML workloads worldwide. Our team thrives on deep technical collaboration, global partnerships, and solving problems that truly push memory technology forward! In this full‑time onsite role, you will provide critical technology support for the design and development of advanced HBM DRAM products. You will serve as a bridge between internal design teams, foundries, and technology development groups, helping translate advanced process capabilities into scalable, high‑performance architectures. Your work will directly impact performance, power efficiency, reliability, and long‑term HBM roadmap success. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Job Description The responsibilities outlined below represent key areas of focus for this role and are intended to be illustrative rather than exhaustive. Candidates are expected to demonstrate proven experience in at least three of the five focus areas outlined below. Foundry Interface and Technology Alignment Act as the primary technical interface between foundry partners and Micron design organizations. Drive closure of design-process gaps through collaborative engagement with foundry process teams. Influence foundr
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is a global leader in DRAM innovation, developing memory technologies that enable the next generation of computing, artificial intelligence, and data-driven applications. Within the Technology Development organization, the Process Integration team drives the development of future DRAM architectures by coordinating device, materials, and process innovations across multiple engineering fields. Team members work in a highly collaborative R&D environment to solve complex technical challenges and accelerate technology scaling. As a Process Integration Engineer Intern, you will contribute to the development of next-generation DRAM memory technologies through multi-functional collaboration involving process integration, device engineering, materials development, and process architecture. This role requires strong technical expertise, analytical problem-solving skills, and the ability to coordinate activities across multiple engineering organizations to achieve technology achievements and product objectives. Responsibilities Define technology achievements, design rules, structural requirements, and electrical specifications for next-generation DRAM technologies while supporting achievement of program targets and timelines. Collaborate with process development, simulation, process architecture, circuit design, and quality teams to ensure alignment with product and technology requirements. Develop and maintain documentation related to process integration plans, technical risks, issue resolution,
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Staff DFT Design Engineer, you will work on design, simulation, and validation of next generation High Bandwidth Memory (HBM) architectures and circuit blocks. The HBM DFT Design Engineer is responsible for defining, designing, and integrating Design for Test (DFT) architectures for next generation High Bandwidth Memory (HBM) products. This role ensures robust test coverage across wafer, die, stack, and system in package (SiP) test stages while balancing performance, power, area, and manufacturing cost. The engineer works in a multi-functional manner with HBM build, verification, product engineering, test enablement, packaging, and external partners to deliver manufacturable, high quality HBM solutions. Responsibilities will include, but are not limited to: Define and implement HBM DFT architectures, including scan, MBIST, JTAG, boundary scan, TSV test, redundancy test, and at‑speed test structures. Develop DFT solutions for both base die and DRAM die, considering stacked‑die and cube‑level test requirements. Design and integrate test access mechanisms to support wafer probe, cube test, and SiP/system test flows. Collaborate with Product Engineering and Test Enablement teams to align DFT features with manufacturing test flows and cost targets. Support yield learning, failure analysis, and debug by enabling observability and controllability in silicon. Work closely with logic, analog, layout, verification, and physical design teams to ensure DFT is
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Design, implementation and integration of complex analog circuits such as CMOS Amplifiers, Comparators, Bandgap References, LDOs, Charge Pumps, Oscillators, DLL, IO Buffers, Analog Test Mux, Process Monitor, and Temperature sensors for advanced DRAM products. Design, implementation and integration of synchronous and asynchronous custom digital block Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Analog/Memory/Logic circuits. Parasitic modeling and design validation, reticle experiments and required tape-out revisions. Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product. Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality. Mentor and lead young designers. Strong AI proficiency, a solid understanding of agentic AI model
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, our vision is to transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, Micron develops technologies that accelerate the transformation of information into intelligence. The DRAM Engineering Group (DEG) creates advanced memory solutions that enable modern applications, including artificial intelligence, high-performance computing, and immersive user experiences. Our team fosters innovation, collaboration, integrity, and continuous learning while solving some of the industry’s most complex engineering challenges. The Semiconductor Design Engineer will contribute to the design, simulation, optimization, and validation of digital and analog CMOS circuits for advanced DRAM and emerging memory technologies. This role provides opportunities to work across the full product lifecycle, from early technology development through product qualification, while collaborating with global design, verification, and manufacturing teams. The successful candidate will develop technical expertise in memory design, circuit analysis, and design automation while supporting the delivery of high-quality products. Responsibilities Design, simulate, analyze, and optimize CMOS memory circuits and functional blocks, including memory arrays, control logic, datapaths, address decoding, and input/output interfaces. Support physical design activities such as floor planning, placement, routing optimization, layout verification, and manufacturability improvements.
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a DRAM System Engineer in the DRAM System Validation Group at Micron Technology, Inc., you will be responsible for system-level validation, system characterization, failure analysis and experimentation as requested. We will be running and configuring diagnostic software, designing experiments, analyzing and interpreting data, crafting custom tools, and presenting data to customers both inside and outside Micron. Apply AI-enabled tools (e.g., data analytics, automation, or Copilot-based solutions) to improve system-level validation, failure analysis, and engineering productivity. On occasion, you may need to carry out these responsibilities at the customer site. We will work with colleagues in the Systems Compatibility Group, in Application Engineering Groups, Product Engineering, Return Material Authorization (RMA), and throughout Micron! Education: Bachelor’s Degree in Electrical Engineering, related field of study, or equivalent experience Successful candidates for this position will have: Familiarity with DRAM and System operations Good understanding system level debug Good multi-tasking, teamwork and problem solving skills Strong verbal and written communication skills in English Preferred Skills and Experience with: Application engineering or design experience related to memory testing and
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Design and maintain standard cells for new DRAM products on new technology Closely collaborate with DTCO team to develop stdcells architecture for emerging technologies Characterization and modeling of Standard cells to provide timing/power model Quality Analysis of characterized liberty models in terms of performance, Power and Functionality Develop automation test bench/flow/tools to improve the work efficiency and help data analysis Co-work with international colleagues on developing new flows and tools for stdcells design Ability to identify stdcells design & char pain points suitable for AI-based automation and collaborate with cross‑functional teams to deploy scalable solutions. Requirements Good understanding of CMOS circuit design Good knowledge of CMOS device physics and layout Experience in total stdcells flow from DTCO development/ spec definition till lib release RTL/GDS flow setup, block level timing analysis, ICC2 experience. Preferred Synopsys EDA flow Finefet & planner experience required. Experience in any characterization tools (Siliconsmart/Liberate)and Cadence Virtuoso preferred. Experience in Primetime, Solido Analytics Familiar with analog/digital simulation tools, i.e. HSPICE, HSIM, VerilogHDL, FINESIM, Simvision Experience in Standard Cell design, layout and verification Experience in Skill, TCL, Per
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