Dram Hardware Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a highly motivated Photo Engineer to join our Manufacturing Engineering (MFG-ME) team. This role is instrumental in driving business objectives related to capacity ramp-up and cost reduction for advanced DRAM semiconductor products. Key Responsibilities: Lead initiatives to improve productivity through process optimization on Track equipment and ensure stable equipment operation to support capacity expansion and cost efficiency. Collaborate with equipment vendors and suppliers of components and materials to develop and implement innovative technologies that address technical challenges. Facilitate cross-functional communication and drive improvement activities by working closely with managers, engineers, and technicians across various departments and operational areas. Contribute to company-wide technology deployment efforts by coordinating with both domestic and international fabrication sites. Preferred Qualifications: (Candidates are not required to meet all criteria) Proficiency in Microsoft Office applications (Outlook, Excel, PowerPoint, Word). Ability to communicate effectively in Japanese and English, including email correspondence and technical documentation. Strong initiative and problem-solving skills, with a proactive approach to proposing improvement strategies. Capability to manage complex issues through close collaboration with stakeholders and a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron-Boise, ID, we are undergoing a historic $15 billion investment in semiconductor manufacturing; construction began in early 2023, with DRAM production slated for the second half of the decade. As a leader in the semiconductor industry, we build solutions that inspire and transform technology. With plans to invest more than $150 billion globally over the next decade in leading-edge manufacturing, we are looking for passionate people to join our Boise expansion team and contribute to the growth and innovation of the semiconductor industry. As a Senior Dry Etch Equipment Engineer , with a strong focus on safety and quality, you will play a meaningful role in improving our manufacturing processes by focusing on the installation, maintenance, optimization, and development of our Dry Etch equipment. Your expertise will give to the production of high-quality semiconductor components that are pivotal to our customers' success. You will work closely with multi-functional teams to tackle equipment issues and implement solutions that improve efficiency and yield. Your passion for engineering and willingness to learn will help us overcome the challenges of this fast-paced industry. We are looking for someone who enjoys hands-on work, values collaboration, and is eager to dive deep into the technical aspects of semiconductor manufacturing. Responsibilities Installation and qualification of the cutting-edge dry etch equipment in our new cleanroom Dry etch equipment perform

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we build the memory and storage that powers everything from massive data centers to the devices people carry every day. Our DRAM IP Design team shapes the circuits at the heart of these products, carrying innovative designs from concept all the way to silicon. We work across global design, verification, and product teams, and the work we do here helps define where the semiconductor industry goes next! As a Principal Analog Design Engineer, you'll help shape the next generation of Micron's memory products, bringing circuit designs to life and directly influencing their performance, quality, and reliability. You'll partner with design, verification, and product teams around the world, operating with the independence and technical depth expected of a principal engineer. It's a role where your circuit decisions show up in silicon that ships at scale. Responsibilities: Design, optimize, and verify block-level analog and mixed-signal circuits for DRAM Propose, evaluate, and implement new or improved circuit topologies to enhance block PPAC Work with the internal data science team and EDA vendors to leverage agentic AI and AI-assisted design flows for circuit optimization Expand verification coverage to strengthen robustness and mass-production yield Partner with global design groups, guide layout through post-layout simulation, support silicon-to-simulation correlation, and operate independently to define solutions and methods Minimum Qualifications:

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Frontend Central Product Integration Engineering team strives to deliver leading edge process capability, best-in-class bits per wafer (Yield) with highest quality and fastest speed through innovation and collaboration with cross functional team. With the diversity of technology in DRAM/NAND and geography (TD development sites – Boise/Japan, 5 manufacturing sites – US (F6, ID1), Taiwan (OMT), Japan (F15) and Singapore (F10)), Frontend Central PIE team will be responsible to identify best-known-method holistically, align best-known-method timely and implement improvement systematically across the network. As FE Central Process Integration Senior Engineer, you will be responsible to develop best optimum process to achieve product maturity. Responsibilities and Tasks: Drive best-in-class product maturity which includes bits per wafers (yield), product grades (Repair Density and DPM) at the fastest speed and cycle of learning. In depth knowledge of processes across different loops or functions (FEOL, MOL, CELL, BEOL) to identify best optimum process integration solution to achieve the goal, knowledge on product and circuit design will be plus. Collaborate with YE, Device, RDA, Metrology team to resolve top yield issues, develop inline visibility to e

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary As an MTS Design Verification Engineer, you will serve as a technical leader driving innovation in DRAM verification for advanced memory products. This role focuses on leading design and verification strategy, influencing key technical decisions, and ensuring high-quality, functionally correct, and scalable memory solutions. You will collaborate with global teams, guide methodology improvements, mentor engineers, and act as a domain expert to support next-generation DRAM technologies. Responsibilities Lead DRAM verification innovation, driving key technical decisions, architecture, and strategy during product execution Collaborate with global teams to define and implement best-known methods for verification and product development Drive verification planning, coverage closure, and silicon debugging for advanced DRAM products Evaluate and implement new tools, methodologies, and flows to improve verification efficiency and quality Mentor engineers and provide technical leadership while contributing expert guidance to senior leadership teams Minimum Qualifications Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field 8+ years of experience in DRAM/memory or advanced CMOS verification Strong circuit analysis and debug skills at the transistor level — able to root-cause behavior, not only at the testbench level Experience with simulation tools such as HSPICE, Finesim, Verilog, or SystemVe

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a DFT (Design for Test) Product Development Engineer in the DRAM Technology group, you will be part of a forward-thinking team of engineers that solves complex problems to develop industry-leading DRAM. In this role, you will gain an in-depth understanding of semiconductor memory functionality and become an expert in the test manufacturing code and testing techniques used to develop, implement, validate, and ensure device performance. You will engage with new technology at the build start to cultivate DFT and Micron’s component test flow philosophy on modern architectures. This will be accomplished through innovation and by multi-functional engagement with partner groups – Build, Test, Technology Development, Manufacturing, Marketing, and Quality Assurance departments. Agentice AI. Responsibilities Partner with Test Manufacturing, Product Engineering, and Design Engineering to provide test guidance, set priorities, and drive improvements in product quality and yield. Develop new DFT concepts and test architectures to support future enhancements in test coverage, efficiency, and test time reduction. Debug and identify root causes of failures using data analysis, elec

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary As a Design Verification Engineer at Micron Technology, Inc., you’ll play a central role in validating complex memory architectures, ensuring speed, reliability, and innovation come together flawlessly. You’ll dive deep into advanced DRAM design, work on high‑density chips, and guide verification strategy from concept to silicon. Responsibilities Verify DRAM and emerging memory architectures through pattern development, regressions, and functional coverage Build and maintain digital and mixed‑signal test benches, vectors, and flows Debug failures, support design teams, track issues, and drive closure Collaborate with global teams Self-motived and team work spirit Minimum Qualifications Bachelor’s degree in Electrical or Computer Engineering or equivalent professional experience Understa

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are looking for Layout Design engineer at our Micron Technology’s DPG-IPDEV Team in Bangalore, India. DPG-IPDEV team is responsible for developing world-class analog and mixed signal IPs used in every cutting edge DRAM chip produced in Micron . As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high-performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Role and Responsibilities • Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. • Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. • Responsible for timely delivery of block-level layouts with acceptable quality. • Demonstrate leadership qualities in planning, area/time estimation, scheduling, and execution to meet project sche

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This role is within Micron’s Package Development Engineering (PDE) group, a global organization with teams in the United States, Singapore, Malaysia, China, Taiwan, and India. As a Package Device Product Engineer (PDPE), you will support new DRAM, NAND, or managed NAND (mNAND) products by coordinating resources, test readiness, and analysis throughout the product lifecycle. You will perform data analysis and modeling, create and maintain root cause analysis documentation, analyze parametric, front-end (FE) probe, and back-end (BE) electrical test data, and respond to product failures. Responsibilities and Tasks Enable new BE test signals to capture assembly-related failures. Collaborate with Test Solution Engineering (TSE) and Product Engineering (PE) to ensure standardized test coverage and characterization, define characterization limits, and approve test-related changes. Develop and sustain new out-of-control action plans (OCAPs). Provide lot disposition recommendations based on parametric data observations when out-of-control (OOC) conditions are triggered. Ensure silicon and assembly processes meet product requirements by analyzin

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. - Demonstrating deep knowledge of the fundamental device physics, structure, electrical operations, and a fab process of DRAM technology - Understanding the fundamental requirements for devices fabrication and engaging stakeholders - Debugging device-related issues, device analysis, failure analysis, and proposing effective solutions - Providing technical expertise and innovative ideas - Collaborating within an immediate teams and outside with networking (OCT/TD/F15/PE) - Mentoring - lead and guide junior members to help their growth and benefit to our team. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 43 years, Micron Technology has delivered world‑leading memory and semiconductor solutions. As an HBM Memory Design Engineer on the HBM Architecture Team, you will design, simulate, optimize, and floorplan advanced DRAM circuits for next‑generation High Bandwidth Memory products. You will work across digital, analog, and mixed-signal domains to ensure functional correctness, performance, and power efficiency. Your role includes collaborating with globally distributed teams developing modern HBM solutions for AI and ML applications. Responsibilities • Design, simulate, and optimize DRAM memory arrays, data paths, ECC, command/control logic, and high‑speed interface circuits • Evaluate block‑level and full‑chip functionality and propose solutions to ensure functional correctness • Analyze timing, area, power, and complexity trade‑offs in high‑speed DRAM and mixed‑signal designs • Perform pathfinding and feasibility studies for new architectures and future HBM products • Contribute to the design, layout, and optimization of memory, logic, and analog circuits • Support large‑scale verification, debug, and silicon validation activities • Collaborate across multi-functional teams involved in TSV‑based 3D stacking and vertical integration • Participate in design reviews and drive continuous improvement of design methodologies Minimum Qualifications • BSEE with 7+ years or MSEE with 5+ years of relevant engineering experience • Strong knowledge of

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an HBM Memory Design Engineer in Micron’s HBM Architecture Team, you will design, simulate, analyze, and floorplan digital and analog DRAM circuits used in advanced HBM technology. You will evaluate block-level and full-chip functionality, perform architectural pathfinding, and contribute to the development of next‑generation high‑bandwidth DRAM solutions. This role works across diverse engineering teams to deliver functionally accurate, low‑power, and high‑performance HBM products by bringing to bear 3D stacking and TSV-based integration. Responsibilities • Design, simulate, and optimize digital and analog DRAM circuits including data path, ECC, command/control, and high‑speed timing structures • Evaluate full‑chip and block‑level functionality and propose solutions to achieve correct circuit and system behavior • Perform timing, area, power, and complexity analysis for high‑speed DRAM and mixed‑signal circuits • Conduct pathfinding studies and feasibility analyses for future HBM architectures • Contribute to the development, layout, and optimization of memory, logic, and analog circuits • Analyze circuit behavior under varying PVT and parasitic conditions to ensure robust operation • Collaborate with multi-functional teams across build, verification, product engineering, process, and packaging • Support design reviews, documentation, and continuous improvement of design methodologies Minimum Qualifications • BSEE with 7+ years, or MSEE with 5+ years of releva

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. F15 ATE （ Alpha Technology Engineering ） Photo エンジニアは、研究開発チームから移管される新技術の量産導入、良品率（ Yield ）の向上、サイクルタイム短縮を推進し、関連するすべての部門および DRAM ネットワークと連携しながら成果を創出する役割を担います。 また、 ATE Photo EUV フォトマスクエンジニアとして、最先端リソグラフィ工程で使用される EUV フォトマスクの品質・信頼性・運用健全性を確保する専門エンジニアリングチームの一員として活動します。 プロセスエンジニア、スキャナー装置エンジニア、その他の関係パートナーと密に連携し、フォトマスク認定、コンタミネーション管理、欠陥低減など、 EUV パターニング性能に直結する重要業務を主導します。 この役割は、広島サイト（ Fab15 ）における EUV プロセスの安定稼働に不可欠であり、技術調査・改善、データドリブンアプローチ、業務効率化を通じて、 EUV フォトマスクに関連するリスクを プロアクティブに管理すること が求められます。 The F15 ATE (Alpha Technology Engineering) Photo Engineer plays a key role in driving the successful transfer of new technologies from the R&D organization into high‑volume manufacturing, improving yield performance, shortening cycle time, and delivering measurable results through collaboration with all relevant departments and the global DRAM network. As an ATE Photo EUV Photomask Engineer, you will be part of a specialized engineering team dedicated to ensuring the quality, reliability, and operational integrity of EUV photomasks used in advanced lithography processes. You will closely collaborate with process e

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron Technology is seeking a Principal RTL Design Engineer to lead the development of high-quality DRAM digital and mixed-signal IP. In this role, you will be responsible for the full RTL design lifecycle—from architecture and implementation through signoff—while delivering designs that meet aggressive power, performance, and area (PPA) targets. This position is in Boise, Idaho, offering strong opportunities for technical leadership, innovation, and collaboration across global teams. Responsibilities Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon-ready signoff. Architect and deliver high-performance, power- and area-efficient RTL designs aligned with product requirements. Perform and sign off front-end quality checks, including lint, CDC/RDC, synthesis, UPF, and timing QoR. Collaborate closely with physical design, verification, and architecture teams to achieve timing closure and PPA goals. Improve design quality and efficiency by refining methodologies, driving automation, and enhancing RTL design flows. Minimum Qualifications Master’s degree in Electrical Engineering with 8+ years of experience, or Bachelor’s degree with 10+ years of pre-silicon RTL design experience. Proven ownership of complex RTL/IP development from micro-architecture definition through handoff to physical design. Strong experience with ASIC low-power design methodologies, including UPF-based power inten

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary At Micron Technology, we are looking for a Senior RTL Engineer to build and develop DRAM digital and mixed-signal blocks for advanced memory products. In this role, you will support the RTL lifecycle from specification and implementation to signoff. You will collaborate with multi-functional teams to develop high-quality builds that meet power, performance, and area (PPA) targets. This position is based in Boise, Idaho, within a collaborative and innovative engineering environment. Responsibilities Contribute to RTL build of digital and mixed-signal components for DRAM using RTL-to-GDS flows. Implement and document high-performance, power- and area-efficient RTL designs meeting product specifications. Perform front-end quality checks including lint, CDC/RDC, synthesis, UPF, and timing QoR. Collaborate closely with physical design and implementation teams to achieve timing closure and PPA goals. Apply power-, clock-, and implementation-aware RTL design practices to minimize silicon risk. Minimum Qualifications Master’s degree in Electrical Engineering with 4+ years of experience, or Bachelor’s degree with 5+ years of pre-silicon RTL design experience. Demonstrated experience developing RTL for complex digital IP from specification through implementation handoff. Hands-on experience with ASIC low-power design methodologies, including UPF-based power intent and CDC/RDC analysis. Strong knowledge of ASIC design flows, including RTL design, logi