Dram Hardware Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Process Integration Module Engineer in the Central Process Integration department, you will be responsible for coordinating improvements in Yield, Quality, and Output for DRAM/NAND process and production line. Day-to-day responsibilities include but not limit to collaborating with network PI/YE/PQA/PEE teams to craft and analyze process experiments, to achieve best-in-class (BIC) yield and quality to establish documented best-known methods (BKMs) Responsibilities and Tasks Collaborate with multi-functional network teams from PIE, Process & Equipment Engineering, WLR, TD to improve product yields and reliability within your assigned process loop. May require travel to global Micron sites to foster collaboration and drive execution. Communicate module related issues to the Fab engineering and leadership teams. Design, execute, and analyze experiments to improve fab process, yield, and quality. Collect and interpret complex data to optimize Fab processes and increase yields. Engage and/or lead cross-area engineering teams to tackle process issues. Work closely with global partners to stay ahead of on module related topics and process alignment projects. Collaborate with oth

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Frontend Central Product Integration Engineering (PIE) team delivers best‑in‑class yield, quality, and cycle time through innovation and strong cross‑functional teamwork. Supporting diverse DRAM and NAND technologies across global development and manufacturing sites (Boise, Japan, and fabs in the U.S., Taiwan, Japan, and Singapore), the team identifies, aligns, and deploys best‑known methods across the network. As a Frontend Central Process Integration Senior Engineer, you will develop and optimize processes to drive rapid product maturity. Join us today and make a difference! Responsibilities and Tasks Drive rapid product maturity, improving yield (bits per wafer), repair density, and DPM through fast learning cycles. Apply deep process integration knowledge across FEOL, MOL, CELL, and BEOL to identify optimal solutions; design and circuit knowledge is a plus. Partner with Yield Engineering, Device, RDA, and Metrology teams to resolve key yield issues and build strong inline visibility for fast ramp and excursion prevention. Identify and standardize best‑known methods and business processes across DRAM and NAND sites. Travel to Micron sites as needed for onsite collaboration. Minimum Qualifications Bachelor’s degree in Engineering or a related field 5+ years of experience in process integration, product design, or equivalent technical roles Demonstrated ability to collaborate optimally with global, cross‑functional teams Proven t

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. A thorough understanding of semiconductor device physics, process operation, DRAM product specification and product reliability. Responsibilities include but are not limited to the following: rdV, UE_Row, PG, PTS yield improvement Burn dpm and module dpm improvement DL4 enhancement and shift left to probe for coverage MRB case management and postmortem for CAPA enhancement Fab deviation event disposition and hold lot release Product grade yield improvement Wafer level reliability monitoring and shift left to probe for coverage RMA management and analysis for process/probe improvement Problem solving and root cause analysis skills including developing systemic and specific CAPAs for RMA Monitors and drives the quality metrics improvements including, module production fails and RMAs. Monitor Global quality dashboard and report reliability metric not meeting spec and performance Leads the analysis of multiple data sources and ensures appropriate feedback is given to customer Working in collaboration with multiple engineering groups including Process Module Area/RDA/Manufacturing to help identify existing containment action and work towards continuous improveme

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s DRAM Technology Development group, where engineers operate at the leading edge of semiconductor process and product innovation. This role sits at the intersection of process technology, product requirements, and manufacturing execution, and is critical to enabling next generation DRAM technology. As a Principal Node Development Product Engineer, you will play a technical role in driving product readiness through close engagement with process integration, device, yield, test, design, and manufacturing teams. You will own deep process‑aware product knowledge, identify node‑specific risks, and translate silicon behavior into actionable decisions that ensure robust, scalable next generation DRAM products. Responsibilities Serve as a technical contributor during development stage of next gen DRAM! Drive process‑aware product optimization, identifying sensitivities, interactions, and integration risks Analyze silicon data (electrical, parametric, yield, reliability) to identify systematic process or integration limiters Partner with design, process integration, test, and device teams to debug yield and performance issues and converge on root cause Collaborate closely with manufacturing and TD to enable smooth node readiness, learning cycles, and factory ramp Translate process changes into product impact assessments, including PPA, yield, reliability, and test coverage Guide test content and monitoring strategies to ensure early detection of process

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s Technology Development Group, where we turn advanced materials into manufacturable memory technology. Our thin films teams work at the groundbreaking edge of DRAM scaling, partnering across R&D, manufacturing, and suppliers to enable future nodes. We operate in a fast paced, hands‑on environment where strong fundamentals and execution matter! As a Thin Films Engineer, you will develop and integrate deposition processes that directly enable Micron’s next-generation DRAM! This role owns thin film concepts from early development through high‑volume manufacturing, with a strong focus on EUV patterning films. You will work closely with cross‑functional teams and external partners to deliver robust, scalable processes that meet aggressive technology requirements. Responsibilities: Develop, optimize, and transfer thin film deposition processes for EUV‑enabled DRAM technology Lead process characterization, troubleshooting, and defect reduction through VME Drive thin film roadmap activities aligned to future technology nodes Collaborate with internal teams and suppliers to mature equipment, chemistries, and process solutions Analyze large physical and electrical datasets and communicate clear recommendations Minimum Qualifications: PhD or MS with 4+ years of semiconductor experience in materials or process development Strong foundation in materials science, chemical reaction engineering, and thin film physics H

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s Technology Development Group, where we turn advanced materials into manufacturable memory technology. Our thin films teams work at the groundbreaking edge of DRAM scaling, partnering across R&D, manufacturing, and suppliers to enable future nodes. We operate in a fast paced, hands‑on environment where strong fundamentals and execution matter! As a Thin Films Engineer, you will develop and integrate deposition processes that directly enable Micron’s next-generation DRAM! This role owns thin film concepts from early development through high‑volume manufacturing, with a strong focus on EUV patterning films. You will work closely with multi-functional teams and external partners to deliver robust, scalable processes that meet aggressive technology requirements. Responsibilities: Develop, optimize, and transfer thin film deposition processes for EUV‑enabled DRAM technology Lead process characterization, troubleshooting, and defect reduction through VME Drive thin film roadmap activities aligned to future technology nodes Collaborate with internal teams and suppliers to mature equipment, chemistries, and process solutions Analyze large physical and electrical datasets and communicate clear recommendations Minimum Qualifications: PhD or MS with 4+ years of semiconductor experience in materials or process development Strong foundation in materials science, chemical reaction engineering, and thin film physics H

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Design and maintain standard cells for new DRAM products on new technology Closely collaborate with DTCO team to develop stdcells architecture for emerging technologies Characterization and modeling of Standard cells to provide timing/power model Quality Analysis of characterized liberty models in terms of performance, Power and Functionality Develop automation test bench/flow/tools to improve the work efficiency and help data analysis Co-work with international colleagues on developing new flows and tools for stdcells design Ability to identify stdcells design & char pain points suitable for AI-based automation and collaborate with cross‑functional teams to deploy scalable solutions. Requirements Good understanding of CMOS circuit design Good knowledge of CMOS device physics and layout Experience in total stdcells flow from DTCO development/ spec definition till lib release RTL/GDS flow setup, block level timing analysis, ICC2 experience. Preferred Synopsys EDA flow Finefet & planner experience required. Experience in any characterization tools (Siliconsmart/Liberate)and Cadence Virtuoso preferred. Experience in Primetime, Solido Analytics Familiar with analog/digital simulation tools, i.e. HSPICE, HSIM, VerilogHDL, FINESIM, Simvision Experience in Standard Cell design, layout and verification Experience in Skill, TCL, Per

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Design and maintain standard cells for new DRAM products on new technology Closely collaborate with DTCO team to develop stdcells architecture for emerging technologies Characterization and modeling of Standard cells to provide timing/power model Quality Analysis of characterized liberty models in terms of performance, Power and Functionality Develop automation test bench/flow/tools to improve the work efficiency and help data analysis Co-work with international colleagues on developing new flows and tools for stdcells design Ability to identify stdcells design & char pain points suitable for AI-based automation and collaborate with cross‑functional teams to deploy scalable solutions. Requirements Good understanding of CMOS circuit design Good knowledge of CMOS device physics and layout Experience in total stdcells flow from DTCO development/ spec definition till lib release RTL/GDS flow setup, block level timing analysis, ICC2 experience. Preferred Synopsys EDA flow Finefet & planner experience required. Experience in any characterization tools (Siliconsmart/Liberate)and Cadence Virtuoso preferred. Experience in Primetime, Solido Analytics Familiar with analog/digital simulation tools, i.e. HSPICE, HSIM, VerilogHDL, FINESIM, Simvision Experience in Standard Cell design, layout and verification Experience in Skill, TCL, Per

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DRAM Technology group at Micron Technology develops and validates advanced memory solutions that enable the transformation of information into intelligence. The team operates in a collaborative, inclusive, and globally distributed environment, partnering closely with design, product, test, process, manufacturing, and quality organizations to deliver industry‑leading DRAM technologies. The Design Validation Product Engineer supports the validation of new DRAM products by focusing on real‑silicon behavior through bring‑up, characterization, and debug. This role builds a strong technical foundation in DRAM architecture, semiconductor devices, and validation methodologies while working closely with multi-functional engineering teams. Responsibilities Support DRAM design validation through silicon bring‑up, characterization, and validation testing of new memory products Analyze electrical and functional data to identify trends, marginalities, and failure mechanisms Assist with debug of validation issues using simulations, test results, and laboratory measurements Use engineering lab equipment and testers to characterize device behavior and performance Document validation results, test coverage, and observed behaviors while collaborating with design, test, manufacturing, and quality teams Minimum Qualifications Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field Strong fundamentals in digital logic,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks: • Establish and improve process condition and technology. • Upgrade process capability and reduce production cost. • Establish and modify process management projects. • Set up process parameters for a variety of semiconductor equipment. • Evaluation, promotion and planning of new equipment / materials. • Abnormal analysis and improvement. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact <a target="_blank" href="mailto:hrsupport_jp&#64;micron.c

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As RAM Detection (RDA and Metrology) Detection Strategy Senor Engineer/ Principal Engineer at Micron Technology, Inc., you will be collaborating with process, equipment, as well as process integration team, responsible for starting up, developing and optimizing detection to improve product yield, quality, and cost! Responsibilities include working closely with the NAND and DRAM sites, HVM and TD, and even suppliers, to achieve Inline Visibility and Inline Control for Detection enablement and improvement. This position is responsible in setting up BKM (Best Known Method) related to RAM Detection performance, RAM detection cost and RAM supplier engagement. This position also ensures BKM alignment and deployment, hence RAM Standardization across sites! What’s Encouraged Daily: Lead Detection SWAT (System Workforce Allocation Team) in identifying BKM and strategies to meet Detection goal Lead RAM network in BKM standardization across all sites Develop metrics and KPI to measure success and performance of the team Lead a team of engineers in projects, see opportunities and risks, and find solutions to clear roadblocks. Devise strategy, plans and roadmap for team for short term and long term Apply organizational skill in job assignment and task allocation Prioritize resources in the team to accomplish goals. Maintain good working relationship with partn

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a DRAM and Emerging Memory Quality and Reliability Assurance (DEMQRA) High Bandwidth Memory (HBM) Engineer at Micron Technology, Inc., your primary responsibility will be establishing quality criteria and monitoring quality indices based on FE and BE signals from NPI to high-volume manufacturing (HVM). You will define, lead and drive key action to bring Micron product quality to be the best in class and to prevent quality and reliability related issues from repeat occurrence. Meanwhile, you will involve in developing and supporting qualification stress flows and characterization for HBM and other high performance memory solutions. You will be driving the following: Collaborate with collaborators to define, deploy and monitor outgoing quality and reliability (OQR) metrics based on FE and BE production signals as well as reliability test results Partner with package development engineer and product engineer on latest products and technologies to define quality and reliability fail modes Proactively work to evaluate, characterize, and mitigate Quality and Reliability risks and fail modes for BE new products and HVM Collaborate with MFG Quality Assurance and Quality Engineer teams to improve QR fail mode list for HVM products. Engage with key teams to set and validate OQR specifications and address recognized and potential Quality and Reliability issues Dispo deviation material based on production signals and reliability test results with quick turnaround ti

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s Compute and Memory Business Unit (CMBU), where we shape how memory powers the world’s most demanding computing platforms. Our team works at the intersection of advanced DRAM technology, system architecture, and emerging AI workloads. We collaborate closely with customers, partners, and internal R&D teams to influence the future of memory-centric system design—and we have a lot of fun doing it! As a Product Architecture Engineer for DRAM, you will play a key role in defining how Micron memory technologies enable AI training and inference platforms. This role blends deep technical exploration with industry engagement and internal collaboration. You will help translate system-level challenges into differentiated DRAM solutions while influencing both customer designs and Micron’s product roadmap. Responsibilities : Explore and evaluate system architectures using modeling, simulation, and prototyping tools Engage customers and partners to identify system bottlenecks and future memory innovations Pathfind AI-focused architectures using LPDDR and DDR DRAM technologies Define and explore DRAM features that increase value in AI and high-performance systems Mentor and coach junior architects and engineers Minimum Qualifications : Bachelor’s degree in Electrical Engineering or equivalent practical experience 10&#43; years of experience in product engineering or product archit

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) sits within the Technology and Products Group (TPG). We are developing High Bandwidth Memory (HBM) solutions for AI and ML applications! We stack multiple DRAM chips on a high-speed memory controller using TSV (Through Silicon Via) technology, dramatically increasing memory density and bandwidth. Our designs span custom digital and RTL2GDS flows, and we are targeting the lowest power per bit in the industry. Join us as a Senior Verification Engineer and contribute to modular, scalable verification solutions for next-generation HBM DRAM products! You will work independently within a multi-functional team of technical domain experts, spanning both IP-level and SoC-level verification. You will collaborate with Design Engineering, Product Engineering, and Business Units to complete the HBM verification roadmap. You will apply your solid understanding of testbench architecture, custom or SoC verification methodologies, and 2.5D & 3D package integration to evaluate issues, define solutions, and broaden your expertise. Responsibilities: Develop and implement verification plans and architecture collateral across IP-level and SoC-level verification for current and future HBM designs Support co-verification of the overall system and participate in customer interactions to gather feedback and provide recommendations for future HBM solutions Build and improve verification methodology components and GenAI applications aligned to HBM design cycles, broadening cross-disc

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Advanced Packaging Technology Development is where Micron pushes the boundaries of 3D memory. We take ideas from early experiments to factory‑ready processes, working hands‑on with materials, tools, and partners across the industry. If solving foundational problems that shape future products excites you, you’ll feel right at home here! This role is a senior Process Engineering Technical Leader focused on chip‑to‑wafer and hybrid bonding. You’ll lead the development and scale‑up of bonding processes that enable high‑performance 3D memory products like HBM and 3DS DRAM. Your work will span early pathfinding through high‑volume manufacturing, with a clear impact on reliability, performance, and cost. Responsibilities: Set technical direction for chip‑to‑wafer and hybrid bonding processes across development programs Develop and mature process flows, materials, and integrations that meet performance, reliability, and cost needs Lead problem solving across wafer fab, die processing, bonding, thinning, and downstream packaging interactions Partner with integration, equipment, product, manufacturing, and quality teams to deliver TD breakthroughs Drive technology transfer into manufacturing with a focus on repeatability and high‑volume readiness Minimum Qualifications: Master’s degree or PhD in Materials Science, Electrical, Mechanical, or Chemical Engineering, or a related field 13&#43; years of semiconductor R&D experience, incl