Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a Global Supply Chain Manager to lead strategic sourcing and supplier management for our memory and storage portfolio, including DRAM components and modules, and NAND-based storage products such as solid-state drives (SSDs). You will own commodity strategy, commercial negotiations, and supply assurance from new product introduction through volume production. Working closely with Hardware Engineering, Operations, Finance, and Procurement, you will align supplier technology roadmaps, capacity commitments, and cost targets with our product requirements and build plans. This role is hybrid, based in Toronto, ON, Austin, TX, or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in strategic sourcing or commodity management for memory and storage, with knowledge of DRAM components and modules, including DDR memory, and NAND-based storage products including SSDs. You understand the supplier ecosystem, technology roadmaps, qualification requirements, and commercial dynamics of these commodities. Comfortable managing direct relationships with global memory and storage manufacturers and authorized distributor
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The role is junior level, only for fresh graduates.該職缺提供給畢業生。 The general responsibilities of the position are the following: DRAM Probe Testing Improve DRAM probe testing coverage and quality on DRAM products Own the DRAM probe test flow , review and sign off probe test program releases to ensure quality control Develop innovative DRAM test algorithms and Leveraging Artificial Intelligence to improve test efficiency and reduce test cost New Generation DRAM Product Development Responsible for new DRAM product startup and yield improvement Support design verification and in-depth DRAM circuit analysis using CAD tools and Verilog simulations Work with the wafer fab process / integration teams to address process-related defects impacting DRAM yield Identify design marginalities in DRAM circuits and recommend design fixes for circuit-related issues Functional and Design Validation (DRAM) Design novel DRAM test algorithms and develop test programs for validating DRAM features, modes, and commands Analyze failures generated from characterization and validation activities Automate DRAM test program development and engineering workflows using scripting and data processing tools DRAM Product Yield Enhance
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) within Micron's Technology and Products Group (TPG) leads the development of High Bandwidth Memory (HBM) solutions for AI and ML applications. Our modern designs use Through Silicon Via (TSV) technology. We stack multiple DRAM chips on a high-speed memory controller with a coordinated logic chip in one package. This new way improves memory density and bandwidth through parallelization. It aims to deliver the lowest power per bit solutions in the industry. You will join an inclusive, forward-thinking team dedicated to building technologies that power virtual reality, neural networks, and next‑generation computing. In this role, you will own design for test (DFT) solutions for complex high‑bandwidth memory (HBM) system‑on‑chip (SoC) base‑die designs. Your work will directly enable manufacturability, quality, and successful silicon bring‑up across current and future HBM generations. (LLM) Responsibilities will include, but are not limited to: Own SoC-level DFT structures and their implementation. This includes scan, memory built-in self-test (MBIST), logic built-in self-test (LBIST) where applicable, boundary scan (JTAG), and test access architectures for HBM base-die builds. Define and drive DFT architecture early in the design cycle, ensuring alignment with SoC integration, floorplanning, timing, power, and physical design requirements. Implement and integrate DFT logic at block, subsystem, and full‑chip levels while partnering closely with register‑transfer level (RTL) d
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s Technology Development organization, driving next-generation DRAM through advanced photolithography process development. Our team operates at the center of innovation, enabling rapid learning cycles and continuous process improvement in a fast-paced, 24/7 development environment. We value strong execution, collaboration, and building future technical leaders! This role combines people leadership, operations ownership, and deep photolithography expertise. You will lead a team across shifts, guide development execution, and remove barriers to accelerate technology learning. The position offers strong ownership, visibility, and direct impact on Micron’s technology roadmap. Responsibilities: Lead photolithography development execution and ensure high-quality wafer flow and data Manage and develop engineers across shifts through coaching and mentoring Drive operational performance including cycle time, tool readiness, and execution efficiency Partner with integration, process, and manufacturing teams to resolve issues Apply AI-Enabled approaches to improve decision making and development efficiency Minimum Qualifications: Bachelor’s degree in engineering or equivalent semiconductor experience Experience in photolithography process development and imaging fundamentals Demonstrated leadership in a technical or manufacturing environment Strong problem-solving and comm
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 47 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life for all. Become an Engineer CAD at Micron Technology in Guadalajara. Chip in to innovative memory designs impacting HBM, DRAM, and new technologies. Responsibilities: Provide day-to-day support for CAD tools, flows, and collateral, ensuring they meet the needs of HBM design teams at the Guadalajara Design Center. Collaborate closely with HBM design, layout, and verification methodology teams to propose and co-develop sophisticated capabilities, ensuring the deployment of outstanding practices and methodologies. Support all aspects of mixed-signal, transistor-level custom IC design, including logical design, custom layout, parameterized cells, automated place and route tools, physical design verification, ERC, Layout Parasitic Extraction, pre and post layout netlisting and simulation, digital and analog circuit simulation, timing and power analysis, reliability simulation and analysis, tape out, and mask generation. Minimum Qualifications: Bachelor’s or preferably a Master’s/PhD in Computer Engineering, Computer Science, or Electrical Engineering. 5+ years of direct CAD or Design experience in mixed-signal, custom IC design flows. Proven experience w
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s HBM Design Architecture organization, where we push the limits of memory technology every day. Our team works across global, multicultural engineering groups to build next-generation HBM solutions that power AI and machine learning. We believe the best ideas come from collaboration, curiosity, and a shared drive to innovate! This role plays a critical part in ensuring the reliability of Micron’s most advanced DRAM and HBM products. As an ESD & Latch Up Engineer, you will shape protection strategies from early design through high-volume manufacturing, working hands-on with silicon, layout, and foundry partners. If you enjoy solving deep technical problems and influencing product robustness at scale, this role offers both impact and growth. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Define and own chip-level and IP-level ESD and latch up strategies for HBM DRAM, base die, I/O, TSVs, and die-to-die interfaces Establish ESD and latch up requirements, targets, and sign-off criteria aligned with JEDEC/ESDA standards Enable ESD protection circuits and latch up safe layout practices across designs and technologies Lead silicon validation, failure analysis, and correlation of pre-silicon assumptions to silicon results Act as the technical interface to
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities include but are not limited to the following: Team oriented approach to create new strategies for DRAM DFT. New DRAM Test Flow Strategy. Fail Pattern Recognition. Improved methodology for test time reduction and improved quality. Assist in solutions to high visibility DRAM product issues. Create supporting software tools to assist in Engineering Analysis. Invent and Innovate anything and everything related to DFT. Employer will accept a Bachelor’s degree in Electrical Engineering, Computer Science, Electrical and Computer Engineering or related field. Position requires: 1) CMOS circuit knowledge 2) Basic programming skills in Python, Java, C or C++ 3) DRAM knowledge 4) Statistics 5) Basic lab experience or equivalent applied software profiling/analytics As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays.<s
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron-Boise, ID, we are undergoing a historic $15 billion investment in semiconductor manufacturing; construction began in early 2023, with DRAM production slated for the second half of the decade. As a leader in the semiconductor industry, we build solutions that encourage and transform technology. With plans to invest more than $150 billion globally over the next decade in groundbreaking manufacturing, we are looking for hardworking people to join our Boise expansion team and give to the growth and innovation of the semiconductor industry. ID1 High Volume Manufacturing Shift Equipment Engineer is responsible for monitoring, sustaining, and improving the equipment while working in partnership with process team members and area engineers. In this position you will supervise tool performance, schedule and perform preventative maintenance on assigned tool sets, and use mechanical, electronic and PC/software skills to solve and repair equipment issues. They are also required to assist with equipment installations, engineering tests, build and modify equipment procedures, increase tool uptime through systematic problem solving and quality workmanship, and thoroughly document all maintenance. This is a hands-on equipment focused role with time spent in the fabrication facility. Responsibilities: Accurately identifies and appropriately handles chemicals and associated hazards in work area Rec
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Participate in developing verification methodology and verification environments for sophisticated products. Co-work with international colleagues on developing new verification flows to take on the challenges in design. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Ability to identify verification pain points suitable for AI-based automation and collaborate with cross‑functional teams to deploy scalable solutions. Core Requirements Good communication skills and ability to work well in a team Exposure to gate level simulations ( with delays ) and Logic schematic analysis Analytical capability for complex CMOS and/or gate level circuit designs Proficient with Spice and Verilog simulations Qualifications & Skills Experience in DRAM, SRAM or other memory related fields Experience in python scripting Experience in timin
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Director, Technology Engineering & Innovation (TE&I) – India Location: Hyderabad, India About Micron Micron Technology is a global leader in memory and storage solutions, transforming how the world uses information to enrich life for all. Micron's portfolio of DRAM, NAND, and NOR technologies powers today's most innovative computing, networking, and mobile products, enabling advancements from data centers and artificial intelligence to intelligent edge devices. Micron is seeking an experienced technology leader to serve as Director, Technology Engineering & Innovation (TE&I) in Hyderabad, India. This role will lead the India-based TE&I organization, providing leadership across infrastructure engineering, operations, automation, reliability engineering, and service management functions. The Director will be responsible for building and scaling a high-performing organization that delivers critical capabilities supporting Micron's global IT infrastructure landscape. The successful candidate will bring extensive experience leading large teams within complex multinational enterprises, managing through senior managers and technical leaders, and driving operational excellence at scale. The individual will
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Senior High Bandwidth Memory (HBM) Electrical Failure Analysis (EFA) Engineer Job Description As a Global Quality (GQ) High Bandwidth Memory (HBM) Electrical Failure Analysis (EFA) Engineer on the DRAM/Emerging Memory Quality and Reliability Assurance team (DEMQRA) at Micron Technology, Inc., you will be responsible for the electrical characterization and electrical failure analysis (EFA) of all HBM products. You will need to distinguish whether it is package or device related failures. Preferably, you are equipped with knowledge of DRAM functionality, process, test program and device necessary for making solid judgment. You will also use a variety of test tools including the uMate tester, Merlin, Mongoose SM3 , Prober, CAD layout tool, and a variety of technical drawings and schematics to perform detailed characterization on HBM products. You will record and categorize failures in order to determine failure mechanisms and characteristics. In this role, you will communicate with various engineering groups, assist lab users with equipment setup and interpretation of data, and maintain critical EFA knowledge database. You will also be expected to apply AI to seek ways to improve the EFA process in order to reduce test time, increase throughput, and increase f
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Our Team as a STAFF ENGINEER, TDT PD CMP At Micron, we are driven by the pursuit of excellence and innovation. As a Chemical Mechanical Planarization (CMP) Process Development Engineer, you will play a key role on our Technology Development Taiwan (TDT) CMP team. You will contribute to the progress of our innovative DRAM technology. If you have a passion for semiconductor development and enjoy working in a dynamic and collaborative environment, we invite you to join us in defining the future of the semiconductor industry! Key Responsibilities Develop and refine CMP processes to support advanced DRAM technology acceleration. Collaborate with diverse teams to develop new outstanding semiconductor devices. Perform rigorous process characterization, develop new consumables, and evaluate new hardware. Conduct groundbreaking research and innovate to contribute to Micron’s extensive patent portfolio. Drive continuous process and efficiency improvements to meet yield, quality, and cycle time requirements. Direct and manage CMP consumables and equipment suppliers. Plan and complete well-designed experiments, presenting results in clear and concise reports. Minimum Qualifications Proficiency in both Chinese and English languages. Expertise in CMP process development. Hands-on experience with CMP polishing equipment, including familiarity with equipment operation, optical metrology, profilometry, common polishing
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Idaho Semiconductor Manufacturing (Triton) LLC Identify, diagnose and resolve DRAM (Dynamic Random Access Memory) process integration related problems; Coordinate and execute process, equipment and material evaluation / optimization initiatives and implement changes at process step; Lead / participate in continuous yield improvement and cost reduction activities; Validate and fan out new process baseline qualified, including new process, tools and/or materials for new product introduction; Support SPC/FDC/RMS/APC. Employer will accept a Master’s degree in Mechanical Engineering, Electrical Science, Material Science, Physics, Chemical Engineering, or related field. Position requires: 1. Validate and qualify processes, tools, and materials for product introduction 2. Manage and audit material suppliers to meet quality, cost, and risk objectives 3. Support internal and external audits 4. Sustain fab healthiness with daily monitoring 5. Drive effective process technology improvement that enables best-in-class yield, quality and cost As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that b
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron-Boise, ID, we are undergoing a historic $15 billion investment in semiconductor manufacturing; construction began in early 2023, with DRAM production slated for the second half of the decade. As a leader in the semiconductor industry, we build solutions that inspire and transform technology. With plans to invest more than $150 billion globally over the next decade in leading-edge manufacturing, we are looking for passionate people to join our Boise expansion team and contribute to the growth and innovation of the semiconductor industry. As a Senior CVD/PVD (Chemical Vapor Deposition/ Physical Vapor Deposition) Process Engineer you will be primarily responsible for starting up, developing, and optimizing processes to improve product quality, driving process yield improvements, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems. Your expertise will give to the production of high-quality semiconductor components that are pivotal to our customers' success. You will work closely with multi-functional teams to tackle process issues and implement solutions that improve efficiency and yield. Your passion for engineering and willingness to learn will help us overcome the challenges of this fast-paced industry. We are looking for someone who enjoys hands-on work, values collaboration, and is eager to dive deep into the technical aspects of semiconductor manufacturing. Responsibilities Process area knowledge DRAM development and
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is expanding its semiconductor manufacturing operations in Boise through a historic $15 billion investment that will support next-generation DRAM production and advanced manufacturing capabilities. This growth creates exciting opportunities for students to contribute to the future of semiconductor technology while working in a highly collaborative, data-driven manufacturing environment. The High Volume Manufacturing Process Engineer Intern supports process optimization, yield improvement, throughput enhancement, cost reduction, and issue resolution within a manufacturing area. This role partners closely with equipment engineering, operations teams, process owners, and cross-functional stakeholders to improve process performance and achieve key manufacturing objectives. Responsibilities Drive process optimization and manufacturing efficiency initiatives by monitoring process performance, analyzing data, and supporting area throughput and wafer output goals. Identify, troubleshoot, and resolve process issues that could result in yield loss, defects, equipment restrictions, excursions, or production impacts, escalating concerns when necessary. Apply SPC, FDC, Design of Experiments (DOE), and structured problem-solving methodologies, including 8D, to improve process capability and equipment performance. Partner with process owners, operations teams, and engineering stakeholders to address chronic process issues and support continuous improvement initiatives. Leverage Artificial Intelligence and data a
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