Firmware Engineer Data Center Solid State Drives Jobs

NVIDIA Silicon Co-Design Group (SCG) is a wide-ranging, multi-functional team at NVIDIA. We sit at the crossroads of design, architecture, marketing, operations, and productization. Our contributions span from the architecture stage through final product definition. We architect solutions for Datacenter, Server, Gaming, Robotics, Automotive, and Embedded markets. We are fast-paced, collaborative, and focused on making groundbreaking, impactful products. We are seeking a Senior Silicon Validation Methodology Engineer for Low-Power (LPWR). You will own the department LPWR validation methodology across GPU, SoC, and CPU, from architecture to silicon to product. What you'll be doing: Own architecture, design, and first-use of end-to-end LPWR validation methodology from silicon to product, covering corners, edge conditions, variability, and real-world scenarios. Set the department standard for LPWR validation so it is reused across a broad array of silicon products. Define what needs to be tested, why, and how — including coverage bounds, PVT/variability, test-time vs. schedule, signoff criteria, milestone playbooks, and SOL(speed of light) expectations. Invent and land new LPWR validation approaches that go beyond extending an existing test plan. Challenge current paradigms on performance, power, idle vs. active behavior, and corner-case coverage, and drive the resulting methods, tools, and metrics into org default practice. Set LPWR validation strategy and policy across teams, including long-lead items that outlive a single execution cycle. Translate architecture and product goals into multi-generation methodology, infrastructure, and tool investments. Drive cross-functional consensus with Architecture, Design, Firmware, and Software under conflicting PPA, coverage, latency, and schedule priorities. Improve validation workflow at department scale by building and adopting automation, coverage m

NVIDIA's Silicon Co-design Group (SCG) sits at a rare intersection: we own the full product development lifecycle, from early architecture definition through silicon bringup to product release. Our ArchDev team is the hub for silicon and system-level feature development, driving tradeoff analysis, system integration, and POR alignment across the entire organization. If you want to see your work go from whiteboard to world-class silicon, this is where that happens. What You'll Be Doing: Architect and integrate system-level performance and power management features, controllers, and policies to optimize product efficiency across datacenter and client products . Build feature roadmaps to address low-power, low-noise, and performance-per-watt product needs through prototyping, use-case analysis, and cost/benefit trade-offs. Partner with architecture, ASIC, board/platform, software/firmware, and marketing teams to drive design decisions and debug complex issues. Track industry trends and market needs and translate them into forward-looking roadmaps that keep NVIDIA's products ahead of the curve. Lead debug efforts, develop workarounds, and support bringup , validation, manufacturing, and customer escalations. What We Need to See: <

As one of the technology industry's most desirable employers, NVIDIA has been redefining accelerated computing, computer graphics and leading the Artificial Intelligence revolution. NVIDIA's innovation is fueled by its great technology—and amazing people. We are seeking a Senior Silicon and System Product Lead to influence, innovate and take our next generation products to the market. As part of the Silicon Solutions Team, we architect and deliver groundbreaking system solutions that integrate all aspects of the system from silicon design, software design to operations and final deployment in multiple market segments that NVIDIA serves. This position offers an unique opportunity to collaborate with multiple organizations in the company and grow your career in a high impact role. We need a passionate, hard-working and creative individual to lead the products all the way from market analysis to delivering the features on the final product. What you'll be doing: Drive product performance and power targets, trade-off features/configurations and provide innovative solutions to complex silicon and system level problems. Evaluate new market segments and use cases; translate market requirements to engineering problem statements and metrics. Innovate Performance, power, yield and quality optimizations and features for the world’s fastest power-shipping products in the GPU and SoC market segments spanning gaming, automotive, datacenter and DL/AI. Develop methodologies and requirements for multi-functional teams to drive silicon and system product features to production. Incorporate productization feedback to improve the next generation. Lead the team for feature requirements and schedule from architecture to silicon phase of projects. Work alongside system architects, designers, marketing teams, chip and board designers, software/firmware engineers, HW/S

NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 years. Today, we are tapping into the unlimited potential of AI to define the next era of computing. As an NVIDIAN, you will address challenges spanning architecture, silicon, firmware, software, and production — and excellent judgment matters as much as technical depth! Every major NVIDIA silicon product family—from the chips powering AI and datacentre systems to gaming, professional, embedded, and automotive platforms—passes through our productization work on its way to production. NVIDIA’s Silicon Co-Design Productization team works from pre-silicon strategy and feature development through bring-up, characterization, correlation, and optimization. Our charter spans power & performance modelling, bring up & tuning of low-power features, power & thermal controllers , and system-level optimization that ultimately shape how NVIDIA products are configured, binned, specified, and shipped. What you'll be doing Drive silicon power productization from pre-silicon planning through bring-up and production, including test strategy, feature readiness, characterization, and optimization. Partner with architecture and design teams to identify improvements, validate features, and help translate them into production-ready solutions. Correlate measured silicon behaviour with pre-silicon expectations, investigate gaps, and drive complex issues to root cause. Build power and performance models and characterization methodologies that decide silicon binning, product specifications, productization decisions, and customer guidance. Use AI/ML and data-driven methods to analyse characterization & telemetry data, identify anomalies & trends , and accelerate issue debug across silicon, board, power delivery, firmware,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This engineer primarily supports and coordinates the preparation for new product launch activities: setup test station validate firmware confirm low power setup and FW for THB verify test script generate and release training package in Workday conduct training attend PDT meeting Activities carried out by this engineer during high volume production phase: coordinate new testers transfer and setup in NVMQRA SSD Lab setup required tester and test script to initiate ongoing reliability testing monitor the ongoing and outgoing reliability performance of datacenter and client SSD products compile regular reliability reports for customer review provide electrical failure analysis supports coordinate the overall failure analysis flow including EFA, FW/HW verification. Pursue risk assessment, root cause and CAPA validation. The essential responsibilities of this engineer in failure investigation are including: maintain traceability of failure replicate and validate the failure perform first level electrical failure analysis (EFA) update FA status in external and internal JIRA chair FA meeting to drive for path forward coordinate root cause findings determine corrective action to effectively resolve quality and reliability issues monitor monthly turn-around time collaborate with the respective functional teams to impr

About the Team Security is at the foundation of OpenAI’s mission to ensure that artificial general intelligence benefits all of humanity. The Security team protects OpenAI’s technology, people, and products. We are technical in what we build but are operational in how we do our work, and are committed to supporting all products and research at OpenAI. Our Security team tenets include: prioritizing for impact, enabling researchers, preparing for future transformative technologies, and engaging a robust security culture. About the Role OpenAI is seeking a Security Engineer to join our Infrastructure Security (InfraSec) team. InfraSec protects the foundations of OpenAI’s research and production environments, spanning GPU supercomputing clusters, multi-cloud infrastructure, datacenters, networking, storage, and the critical services that power our frontier AI models. Our charter includes securing everything from bare-metal hardware and firmware, to Kubernetes clusters and service meshes, to data storage and access pathways for highly sensitive model weights and user data. In this role, you will: Design and build security controls across diverse layers (e.g., physical hardware, firmware/BMC, OS, Kubernetes, networks, and CI/CD) to defend against sophisticated adversaries and insider threats. Collaborate with engineering and security teams to drive deployment of security enhancements and control changes across broad-scale infrastructure. Tackle high-impact projects such as checkpoint encryption, network isolation, secret management, and machine identity, while continuously raising the security bar for emerging AI workloads. Take a generalist approach to building security controls, balancing a mix of security expertise and broad technical skillsets to adapt to evolving challenges. You will thrive in this role if you have: Deep understanding of security principles, best practices, and common vulnerabilities. A proactive mindset, with the ability to identify and address secu

About the Team Security is at the foundation of OpenAI’s mission to ensure that artificial general intelligence benefits all of humanity. The Security team protects OpenAI’s technology, people, and products. We are technical in what we build but operational in how we execute, and we support every product and research effort at OpenAI. Our tenets include prioritizing for impact, enabling researchers and developers, preparing for future transformative technologies, and fostering a strong, collaborative security culture. About the Role OpenAI is seeking a Security Software Engineer to join the Infrastructure Security (InfraSec) team. InfraSec safeguards the core of OpenAI’s research and production environments—GPU supercomputing clusters, multi-cloud infrastructure, datacenters, networking, storage, and the critical services that power our frontier AI models. Our charter spans everything from bare-metal hardware and firmware to Kubernetes clusters, service meshes, and the data pathways that carry highly sensitive model weights and user data. As a Security Software Engineer, you will design and build critical foundational services, such as authentication systems, egress/ingress proxies, access brokers, and key management platforms, that demand high standards of reliability, scalability, and software craftsmanship. These systems form the security backbone of OpenAI’s supercomputing environment and must remain robust under intense scale and adversarial pressure. In this role, you will: Architect and implement production-grade security services (e.g., auth services, access brokers, secure proxies, key-management infrastructure) that provide strong guarantees across hardware, operating systems, Kubernetes, networks, and CI/CD. Partner with infrastructure and research engineers to embed security into high-performance compute clusters, enabling rapid model training and deployment without compromising protection. Develop automation and detection tooling to continuously identif

About the Team Security is at the foundation of OpenAI’s mission to ensure that artificial general intelligence benefits all of humanity. The Security team protects OpenAI’s technology, people, and products. We are technical in what we build but operational in how we execute, and we support every product and research effort at OpenAI. Our tenets include prioritizing for impact, enabling researchers and developers, preparing for future transformative technologies, and fostering a strong, collaborative security culture. About the Role OpenAI is seeking a Principal Software Engineer to join the Infrastructure Security (InfraSec) team. InfraSec safeguards the core of OpenAI’s research and production environments: GPU supercomputing clusters, multi-cloud infrastructure, datacenters, networking, storage, and the critical services that power our frontier AI models. Our charter spans everything from bare-metal hardware and firmware to Kubernetes clusters, service meshes, and the data pathways that carry highly sensitive model weights and user data. As a Principal Software Engineer, you will set technical direction and drive execution of critical foundational services, such as authentication systems, egress/ingress proxies, access brokers, and key management platforms, that demand high standards of reliability, scalability, and software craftsmanship. These systems form the security backbone of OpenAI’s customer and supercomputing environment and must remain robust under intense scale and adversarial pressure. In this role, you will: Own the architecture and roadmap for one or more core security services (e.g., authN/Z, policy enforcement, secure proxies, key management), taking them from design to rollout to long-term operation. Design and implement planet-scale security systems that provide strong guarantees across hardware, operating systems, Kubernetes, networks, and CI/CD: balancing security, reliability, latency, and developer ergonomics. Lead cross-functional launches

About the Team Security is at the foundation of OpenAI’s mission to ensure that artificial general intelligence benefits all of humanity. The Security team protects OpenAI’s technology, people, and products. We are technical in what we build but are operational in how we do our work, and are committed to supporting all products and research at OpenAI. Our Security team tenets include: prioritizing for impact, enabling researchers, preparing for future transformative technologies, and engaging a robust security culture. About the Role OpenAI is seeking a Principal Security Engineer to join our Infrastructure Security (InfraSec) team. InfraSec protects the foundations of OpenAI’s research and production environments, spanning GPU supercomputing clusters, multi-cloud infrastructure, datacenters, networking, storage, and the critical services that power our frontier AI models. Our charter includes securing everything from bare-metal hardware and firmware, to Kubernetes clusters and service meshes, to data storage and access pathways for highly sensitive model weights and user data. As a principal engineer, you will set technical direction and drive execution on high-impact infrastructure security programs, partnering across various orgs at OpenAI to deliver durable controls that raise the security bar at OpenAI scale. In this role, you will: Own end-to-end security outcomes for one or more critical infrastructure areas, including multi-quarter strategy, roadmap, and delivery. Design and build security controls across diverse layers (e.g., physical hardware, firmware/BMC, OS, Kubernetes, networks, and CI/CD) to defend against sophisticated adversaries and insider threats. Lead cross-functional programs to deploy security enhancements and control changes across broad-scale infrastructure, balancing security guarantees with reliability and velocity. Take a generalist approach to building security controls, balancing a mix of security expertise and broad technical skillsets

Job Details: Job Description: Join an enthusiastic team of engineers in Intel's Networking Solutions Group (NSG) focused on enabling next generation of programmable Infrastructure Processing Units (IPUs) with our lead customers as part of the Customer Experience Support (CES) organization. Intel brings decades of leadership in networking, virtualization, packet processing, storage, and security to a new class of IPU products that accelerate host networking functions and support emerging use cases such as security, virtualization, storage, load balancing, and data path optimization. Working closely with major cloud service providers and Intel development teams, you will help deliver customized IPU based solutions that enhance isolation, security, performance, storage and system management for our customers. A big part of the day-to-day job is to help customers manage feature request processes, enable solutions, and debug issues. Projects and responsibilities include but are not limited to: • Gain our customers' trust, understand their needs, and build POCs to meet them. Work closely with internal and external partners to understand use cases and requirements. • Be the go-to technical resource for customers building complex Datacenters, AI infrastructure as well as helping them understand performance characteristics for solutions. • Prepare and deliver technical content to customers including presentations, workshops, etc. • Contribute across the full IPU lifecycle, including board and platform bring up, low-level device initialization, OS driver and kernel configuration, system management, feature enablement, use case testing, debugging, and verification. • Defines systems implementation and integration solutions and plans to ensure optimum performance and reliability across hardware, firmware and software w

Manufacturing Test Engineering Manager Position Summary We are seeking an experienced Manufacturing Test Engineering Manager to lead the development and execution of the end-to-end manufacturing test strategy for next-generation AI server platforms and datacenter infrastructure. This role is responsible for defining and driving the manufacturing test architecture from L6 board assembly through L11 rack-level integration and final system validation , ensuring world-class product quality, manufacturability, and production scalability. This leader will manage a team of 3–5 Manufacturing Test Engineers while partnering closely with Hardware, Firmware, Platform, Validation, Quality, Operations, and Joint Design Manufacturing (JDM) partners. The role owns the manufacturing test strategy, test coverage, factory test infrastructure, manufacturing capacity planning, and continuous improvement of manufacturing quality. Key Responsibilities Manufacturing Test Strategy Define and own the end-to-end manufacturing test strategy from L6 board assembly through L11 rack integration . Develop standardized manufacturing test methodologies that optimize quality, throughput, cost of test, and scalability across multiple products and JDM sites. Establish manufacturing test standards, best practices, and engineering processes that support high-volume server manufacturing. Technical Leadership & People Management Lead, mentor, and develop a team of 3–5 Manufacturing Test Engineers supporting multiple hardware programs. Establish team priorities, allocate resources, and ensure successful execution of manufacturing test deliverables. Foster a culture of technical excellence, accountability, collaboration, and continuous improvement. Serve as the primary technical escalation point for manufacturing test and production issues. Cross-Functional Engineering Collaboration Partner with Hardware, Platform, Firmware, Validation, Reliability, Quality, and Operations teams to ensure manufac

About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role Anthropic trains and serves frontier AI models on some of the largest accelerator fleets in the world, and we're now building the custom hardware systems that fleet will run on — from the package boundary out through boards, racks, interconnect, power, cooling, and the datacenter interface. We're looking for a Technical Program Manager to own execution of these hardware systems from concept through production deployment. You'll drive the program that turns architecture and specs into boards and racks that ship — managing ODMs, CMs, and component vendors on one side, and coordinating silicon, firmware, infrastructure software, supply chain, and datacenter teams on the other. This is a role on a new hardware team. You'll build the program cadence, review structure, and NPI process this team runs on. We need someone who has shipped hardware at scale, has a realistic view of ODM/CM schedules and where they break, and is comfortable owning consequential program calls without a large organization behind them. Key responsibilities Own the integrated hardware systems program plan across board, chassis, rack, and interconnect — from requirements through EVT/DVT/PVT, qualification, and production ramp — and be the source of truth on schedule, risk, and readiness. Drive execution with ODMs, contract manufacturers, and component/optics vendors: SOWs, build schedules, deliverable tracking, factory readiness, and escalation when they slip. Stand up and run the NPI cadence — build matrix, engineering reviews, DFx, issue triage, exit criteria — and keep it lightweight enough that a small, senior team actually uses it. Drive

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE Join our team as a Senior SSD Firmware Lead / Architect and help define the future of data storage. In this role, you will lead the architecture and development of firmware for our industry-leading DirectFlash™ SSD Modules, which power Pure Storage platforms used by both enterprise and hyperscale customers. You will work closely with hardware engineers, controller vendors, and systems teams to design firmware architecture, bring up new hardware platforms, and improve performance and reliability. WHAT YOU'LL DO Define and drive the firmware architecture for next-generation DirectFlash™ SSD modules, including subsystem design, firmware modularization, and system integration. Work with controller vendors and hardware teams to bring up new SSD controller SoCs and enable features such as PCIe, NAND interfaces, power-loss protection, and telemetry. Develop firmware components supporting NVMe and OCP SSD specifications, ensuring compliance, performance, and interoperability. Debug complex cross-layer issues involving firmware, controller hardware, NAND media, and host systems. Improve SSD data path performance and latency through firmware design and analysis. Review designs, mentor engineers, and improve development tools, testing, and automation. WHAT YOU BRING Extensive experience developing SSD firmware for enterprise or hyperscale systems, with strong knowledge of SSD architecture and controller design. Solid underst

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. We’re in an unbelievably exciting area of tech and are fundamentally reshaping the data storage industry. Here, you lead with innovative thinking, grow along with us, and join the smartest team in the industry. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE Join our team as a Firmware Engineer and help us innovate the future of data storage. You'll be a key player in designing and developing the firmware for our industry-leading DirectFlash™ SSD Modules. This is a unique opportunity to work on cutting-edge hardware, collaborating closely with our hardware and software engineering teams to create high-performance, resilient storage solutions that are foundational to our technology. WHAT YOU'LL DO Design, implement, and test firmware for our DirectFlash™ SSD Modules, leveraging your expertise in C/C++ to build robust, high-performance solutions. Lead the bring-up and integration of new hardware components, developing low-level firmware features to enable next-generation storage products. Investigate and debug complex firmware and hardware issues, creating advanced failure analysis tools and processes to ensure product reliability. Automate internal development workflows, including continuous integration and automated testing, to accelerate our engineering and release cycles.

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Join forces with us on our mission to build a better IT industry. We are currently looking for a highly skilled Embedded Software Engineer to our team in Stockholm or Malmö, Sweden. Please note that applicants must live in Sweden and hold a valid work permit at the time of application to be considered for this role. Responsibilities: Design, implement, and debug embedded firmware for 802.15.4 Thread-based devices (border routers, RCPs, sleepy/end devices) running on an RTOS and embedded Linux Integrate and maintain the OpenThread stack and Matter commissioning/data-model layers across the product line Work closely with hardware engineers on SoC/MCU bring-up and debug radio timing, RF, and low-power issues at the driver level Implement and troubleshoot Thread border routing, SRP, and network commissioning/joining flows, including bridging to Wi-Fi/Ethernet backbones Diagnose firmware-level issues using JTAG/SWD debuggers, logic analyzers, and protocol sniffers/packet captures Write and maintain unit and integration tests; participate in code review Contribute to OTA update pipelines and manufacturing/production test tooling Requirements: Strong proficiency in C++ (99 % code base) and C for embedded systems Hands-on experience with an RTOS (FreeRTOS, Zephyr, or similar) Solid MCU debugging skills Solid networking fundamentals, incl