Hbm 3d Power Delivery Network Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This job requisition is for a Dry Etch Lead Principal Engineer at Micron Technology, Inc. Micron is a Fortune 500 company and employs over 53,000 workers worldwide, with headquarters in Boise, ID. Micron offers the industry’s broadest portfolio of memory solutions—starting with foundational DRAM, NAND, and NOR Flash memory, extending to SSDs, MCPs, HBM, and other memory-based systems. As the only memory fab in the western hemisphere, Micron is in the industry for over forty-five years and continues to stay as the only U.S.-based DRAM manufacturer. Micron is one of the most prolific patent applicants in the world with over 60,000 patents granted and still growing. Responsibilities: Develop dry etch processes to meet physical and electrical product requirements Optimize processes to reduce cost, variability, and improve capability Collaborate with integration and process teams to develop innovative solutions Perform root cause and failure mode analysis and drive vendor improvements Support pilot line operations and transfer processes to production sites Minimum Qualifications: Bachelor’s degree in Engineering, Physics, or related field 3+ years of relevant experience including internships Strong analytical and creative problem‑solving skills Working knowledge of statistics and statistical process control Ability to manage multiple projects and work independently Preferred Qualifications:

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro: The Advanced Packaging Technology Development (APTD) team at Micron drives the technologies that enable the AI era. We work hands‑on with global R&D, suppliers, and manufacturing teams to turn breakthrough ideas into production‑ready solutions. Our work sits at the intersection of innovation, scale, and real‑world impact—and collaboration is how we win. Position Overview: Artificial intelligence is transforming the world, and High Bandwidth Memory (HBM) is at the center of that transformation. As a Senior or Staff Engineer on the Dry Etch R&D team, you will play a key role in developing and scaling plasma‑based etch processes that enable next‑generation packaging technologies. This role offers deep technical ownership, broad cross‑functional collaboration, and the opportunity to influence long‑term technology roadmaps from early research through high‑volume manufacturing. Responsibilities: Develop and optimize dry etch process modules to meet performance, yield, and reliability requirements for advanced packaging products Drive process capability, cost, and variability improvements using data‑driven experimentation and equipment innovation Collaborate closely with process integration and adjacent process teams including Wet Etch, Films, Lithography, CMP, Wafer Trim, and Bonding Perform root‑cause and failure‑mode analysis a

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description The MSH PDE Process Integration (PI) Manager leads a team of Process Integration engineers responsible for the successful execution of High Bandwidth Memory (HBM) New Product Introduction (NPI) from early development through High Volume Manufacturing (HVM) . This role combines people leadership, technical oversight, and cross‑functional execution , ensuring PI readiness, yield ramp, and risk mitigation across wafer fabrication, assembly, and test. The manager is accountable for delivering NPI commitments while developing a strong, scalable PI organization. Job Responsibilities People Leadership & Talent Development Lead, coach, and develop a team of MSH PDE PI engineers across multiple experience levels Set clear expectations, goals, and priorities aligned to NPI and business objectives Provide regular feedback, performance evaluations, and career development guidance Build organizational capability through hiring, onboarding, mentoring, and succession planning Foster a culture of accountability, collaboration, and technical excellence HBM NPI Execution & Delivery Own PI execution for HBM NPI programs, en

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. About the Role We are looking for a passionate and innovative ATE Test Engineer to design and deliver cutting-edge test solutions for HBM-DRAM devices using modern advanced ATE platforms. In this role, you will lead the development and implementation of test plans, ATE test programs, silicon validation, and test methodologies, while driving multi-site hardware design and development, product characterization, and high-volume production support. Success in this position requires a forward-thinking mindset and the ability to apply the right technologies to meet evolving challenges. Key Responsibilities Develop and implement robust test strategies, plans, and ATE programs for HBM-DRAM devices. Drive silicon validation, characterization, and yield improvement initiatives. Design and debug test hardware, including schematic capture and PCB layout. Collaborate cross-functionally to ensure seamless integration of test solutions into production. Support high-volume manufacturing and troubleshoot complex test issues. Qualifications & Skills Education: Bachelor’s or Master’s degree in Electrical, Electronics or Computer Engineering. Experience: A

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Product Development Engineer in the Media Health team, you will act as a key interface between a variety of engineering groups and specialties, improving a diverse range of expertise to innovate new and improved test strategies, features, and technologies! You will have or develop guide capability with Probe, and/or ATE test code and testing techniques used to validate and ensure device performance. You will assist in debugging code and aiding other specialists in the characterization of applicable HBM devices. In this role, your additional responsibilities include an in-depth understanding of general device functionality specific to HBM products as well as schematics and signal integrity. Responsibilities: Work with Design Engineering (DE) to run simulations pre-silicon to validate test strategies and Design for Test circuits. Provide feedback to DE, Test Engineering (TE), and others in Product Engineering (PE) Assist in pre-silicon checklist items and work with TE to define required tester resources Work with TE and PE to modify test programs for specific product requirements to ensure that silicon performance meets expectations Support TE by aiding in test program debug, data analysis, and test development Support fabrication sites and process integration through test development to increase effective process feedback Debug and identifying root causes for failures using test and experimental data, and elec

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description As a Senior/Staff Product Quality and Reliability Assurance Engineer (PQRA), you will support reliability qualification and quality monitoring of High Bandwidth Memory products (HBM), help develop product reliability methodologies, and respond to product deviations as they pertain to quality and reliability. You will establish and implement requirements, specifications and metrics such as Defects per Million (DPM), Failure in Time (FIT), and Lifetime. In this role, you will work with multi-functional Engineering teams to ensure product reliability methods are established and followed, perform risk assessments, and provide support for manufacturing teams regarding reliability issues. In this dynamic role, you will have opportunities to gain new product knowledge on an ongoing basis! You will: Conduct New Product Qualifications Define High Bandwidth Memory (HBM) qualification requirements Comprehend failures and failure rate within the scope of the qualification Perform risk assessment at all decision points within the qualification cycle Review qualification data and sign off that qualification requirements have been met Issue internal product release notifications for Qualification <

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description As a Senior/Staff Product Quality and Reliability Assurance Engineer (PQRA), you will support reliability qualification and quality monitoring of High Bandwidth Memory products (HBM), help develop product reliability methodologies, and respond to product deviations as they pertain to quality and reliability. You will establish and implement requirements, specifications and metrics such as Defects per Million (DPM), Failure in Time (FIT), and Lifetime. In this role, you will work with multi-functional Engineering teams to ensure product reliability methods are established and followed, perform risk assessments, and provide support for manufacturing teams regarding reliability issues. In this dynamic role, you will have opportunities to gain new product knowledge on an ongoing basis! You will: Conduct New Product Qualifications Define High Bandwidth Memory (HBM) qualification requirements Comprehend failures and failure rate within the scope of the qualification Perform risk assessment at all decision points within the qualification cycle Review qualification data and sign off that qualification requirements have been met Issue internal product release notifications for Qualification <

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The TSE Technician – HBM Probe supports Test Solutions Engineering (TSE) activities for High Bandwidth Memory (HBM) products at wafer probe. The role executes operational, data, and system‑level tasks that enable efficient HBM probe evaluations, production releases, and yield/debug activities , working closely with TSE engineers across NPI and high‑volume manufacturing phases. This position is critical in supporting fast‑paced HBM development cycles where tight execution, data discipline, and cross‑functional coordination are essential. Key Responsibilities Support HBM probe activities by executing requests from TSE engineers, including: Evaluation and production lot assignment, tracking, and coordination Lot handling, status monitoring, and execution follow‑up Attribute tagging, traveler setup, and hold / release execution Support experiments and investigations related to: Yield improvement Test time optimization Test errors and probe‑related issues Perform data mining and generate reports with basic analysis to support: Engineering debug and root‑cause investigations NPI learning cycles and ramp readiness Production

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Senior Engineer, MCT Operations Quality at Micron Technology, Inc., you will lead and collaborate closely with Global Assembly & Test (AT) sites, Global Quality, and various cross-functional stakeholders to drive on Manual Touchpoint Reduction. You will champion a Quality-First mindset by driving manufacturing solutions and end-to-end redesign initiatives to eliminate manual steps upfront that reduce operational error, prevent customer events and enhance product quality across Global AT network. Job Responsibilities: Lead global initiatives and collaborate with AT sites and Global Quality to identify and eliminate high-risk manual touchpoints across Assembly, Test/Post E, Module/SSD, HBM/PWF areas. Conduct onsite validation of the manual touchpoints at the source, identify quality risks, and propose improvements to eliminate the touchpoints. Collaborate with subject matter experts and drive the development and deployment of scalable solutions through physical automation/robotics, system automation, and Predictive Quality & Generative AI-enabled solutions. Collaborate with subject matter experts on end-to-end redesign initiatives to eliminate manual touchpoints upfront. Lead as the central team program governance to drive strategy, alignment, and execution consistency across all AT sites. Drive the rapid replication and scaling of proven solutions across AT sites through structured deployment frameworks

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Singapore Campus Hiring Build the Future of AI with Micron Singapore The next era of Artificial Intelligence depends on faster, more powerful, and energy-efficient memory. At Micron Singapore , you'll help create it. Join our global teams and help develop the memory and storage technologies behind AI, cloud computing, smartphones, and data centers. From NAND flash memory and High Bandwidth Memory (HBM) to solid-state drives (SSDs) and advanced chip packaging, you’ll work with experienced engineers to solve real-world challenges and turn new ideas into technologies used around the world. Micron Singapore is proud to be recognized as the #1 Best Workplace in Singapore (Large Category, 2025) and has earned Great Place to Work® recognition for seven consecutive years. <span style="

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Overview At Micron, we are committed to world-class performance and innovation. As a SR ENGINEER, MTB QE OPS, you will be essential in creating the initial quality defense for incoming materials. You will also drive quality management and support our ambitious projects. This is an outstanding chance to lead technological progress in the semiconductor industry! Key Responsibilities Set up the initial quality safeguard for incoming materials, including PSMC/TSMC wafers and UMC interposers. Lead excursion identification, containment, resolution, and supplier quality oversight to reduce yield, reliability, production, and customer risks. Assist HBM ramp, HBM4e, and IQP builds through active incoming quality assessment and supplier quality development. Work Schedule Regular day shift, Monday to Friday, 08:00 AM–05:00 PM. Candidate Qualifications At least 1 year of Semiconductor / Quality experience. Expertise in Incoming Material Quality, Supplier Quality, Excursion Management, and HBM/Wafer/Interposer quality governance. AI-Related Information Develop Generative AI and Agentic AI solutions for Quality operations. Build AI Assistants, knowledge management, intelligent search, and chatbot platforms. Leverage LLMs to improve engineering efficiency and decision-making. Integrate manufacturing, quality, and engineering data to enable intelligent analytics, Quality Digitalization, and

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities: Reliability Test Flow Development: Define and develop reliability stress, test flows and test plans to cover all Product Reliability aspects. Reliability Test Plan and Execution: Work closely with Global Quality team to define qualification plan, review and manage the qualification execution progress, and drive for qualification gating issue resolution. DPM reduction : Drive down and achieving Extrinsic Reliability (Time 0 and Field DPM) and Intrinsic Reliability through Optimized Manufacturing Test Flows and Test Strategy to meet critical KPI’s Quality, Cost and Cycle Time Root Cause and Resolution of Qual and RMA Device Issues pertaining to defectivity and intrinsic reliability: Debug and identify root cause and failures in reliability tests by electric failure analysis(EFA) and Physical Failure Analysis (PFA) and drive for resolution and improvements through cross functional team collaboration. Process Conversions and HVM: The role involves providing recommendation to fab teams for new process conversions to reduce cost, increase yields. This is critical as it directly impacts the yield, quality, reliability, and performance of HBM products, which are key components in

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a DLT Shift Engineer within Advanced Packaging Technology Development Manufacturing Development Engineering (APTD MDE), you will provide shift-based execution support for Die Level Technology development activities in Taiwan. You will sustain development lot movement, respond to process and equipment abnormalities, support issue containment and escalation, and help maintain safe, efficient development execution across rotating day and night shifts. You will collaborate with Process Development, Process Integration, Manufacturing, Equipment Engineering, and other cross-functional teams to support HBM technology development. This role provides hands-on experience in advanced packaging processes, new equipment and material evaluations, Statistical Process Control (SPC), redundancy tool deployment, structured problem solving, and data-driven execution improvement. Key Responsibilities Shift-Based Development Execution Support DLT technology development in a rotating day- and night-shift environment, including development lot execution, abnormal lot response, and shift-to-shift communication. Monitor assigned development devices and DL

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. To support our next-generation, high-performance RISC-V CPU architectures and advanced chiplet solutions, Tenstorrent is looking for a hands-on, experienced Post-Silicon Lab Manager. In this role, you will own the post-silicon lab infrastructure and manage operational workflows supporting bring-up, system validation, and customer enablement. You will scale the lab infrastructure to support multiple programs with varied requirements. You will direct post silicon validation engineers on cost building cost effective validation and debug infrastructure. This role is hybrid, based out of Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You hold a B.S. or M.S. in Electrical Engineering, Computer Engineering, or a similar technical field, and you have 8–12+ years in semiconductor hardware, including 3+ years leading a post-silicon validation, characterization, or hardware lab team focused on CPUs. You know high-speed interfaces (PCIe, DDR/GDDR/HBM, SerDes) and fabric links in depth, and you're hands-on with board-level debug tools. You bring a startup mindset. You stay calm and quick when troubleshooting physical hardware unde

The Silicon Co-Design Group (SCG) sits at the crossroads of architecture, design, marketing, operations, and productization. Our work spans early architecture through final product delivery across Datacenter, Gaming, Robotics, Automotive, and Embedded markets. We work closely across functions to deliver chips that change what is possible. NVIDIA’s Silicon Co-Design Group is hiring a Chip Lead to serve as the technical lead for one of our most consequential silicon programs! This is not project management, and it is not a senior IC role. You are the person the program partners with on its hardest technical questions — when the right answer is not obvious, and when leadership needs a single technical perspective to align on direction. You are accountable for the technical integrity of the chip end-to-end. You guide co-design feature integration, help resolve the toughest multi-functional bugs, and serve as the project-specific custodian of the qualification playbook. The program runs cleaner because you are on it! What you’ll be doing: You will partner across design, validation, software, and manufacturing to keep the program’s technical narrative clear and on track. Day to day, you will: Serve as the single technical point of contact for multi-functional decisions, issues, and trade-offs. Co-lead program-level feature integration from chip to system, surfacing inter-function dependencies and guiding them to resolution. Help resolve the program’s hardest multi-functional bugs by translating ambiguous, multi-team symptoms into root-cause closure on areas such as HBM, power and thermal, high-speed I/O, and packaging. Steward the qualification playbook. When the playbook does not fit a situation, guide the mitigations and capture the lessons as reusable methodology for other SSG programs. Shape the program’s technical narrative by surfacing key risks, trade