Hbm 3d Power Delivery Network Engineer Jobs

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology and amazing people. Today, we're harnessing the boundless possibilities of AI to build the next era of computing. An era in which our GPU acts as the brain of computers, robots, and self-driving cars that can understand the world. Accomplishing unprecedented goals calls for imagination, inventiveness, and exceptional talent from around the world. As a NVIDIAN, you'll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. Join our team and discover how you can build a lasting impact on the world. NVIDIA's Silicon Co-Design Group (SCG) leads the full product development lifecycle, from early architecture definition through silicon bringup to product release. The ArchDev team is the hub for silicon and system-level feature development, driving tradeoff analysis, system integration, and POR alignment across the entire organization. This is where ideas become chips, and chips become products that define the state of the art — and we're building that future with some of the most motivated engineers in the industry. We're looking for a Senior Memory Systems Engineer to own HBM and LPDDR integration in sophisticated SoCs. This role covers the full stack, including silicon, package, embedded software, testing, and product development. The engineer will resolve the toughest system-level memory challenges throughout the process, building solutions that hold up at scale. What you'll be doing: HBM & LPDDR System Integration and Bringup: Drive HBM and LPDDR system integration, bringup, characterization, and debug for next-generation SoCs — taking memory subsystems through the full arc from first silicon to production-ready at scale. Full-Stack Memory Closure: <s

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing . Location 1 North Coast Drive, Singapore Department Product Integration Engineering (PIE), Process Integration (PI ) Project Title Advanced Memory Process Integration Improvement Exploration and Device Reliability Study (NAND / DRAM / HBM) Project Description This internship provides a structured learning opportunity within the Process Integration Engineering team, focusing on advanced semiconductor memory manufacturing technologies, including NAND, DRAM, and HBM devices. The intern will gain exposure to reliability concepts, fail

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We are building a global Process Safety function that directly supports the next generation of memory technology. Our team partners across development, manufacturing, and EHS to ensure complex processes scale safely and consistently. If you’re energized by solving high-impact challenges and shaping global safety programs, you’ll find meaningful work here. In this role, you will help drive the Risk-Based Process Safety (RBPS) framework for High Bandwidth Memory (HBM) technologies. You’ll work across global teams to identify and handle safety challenges associated with processes in fast-paced development and manufacturing environments. Your expertise will influence how new technologies are safely developed, transferred, and scaled worldwide. Responsibilities: Lead Risk-Based Process Safety(RBPS) governance and drive consistency across sites supporting HBM processes Partner with engineering and manufacturing teams to identify, assess, and mitigate process safety risks tied to new materials and complex processes Support Management of Change (MOC), ensuring timely risk assessments and closure of actions for tool, chemistry, and process changes Facilitate hazard analyses, audits, investigations, and share findings to improve system-wide perfo

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 【職務概要】 SIC(Site Inventory Control) Planning Engineerとして、Fab15の生産能力を最大化し、顧客へのオンタイムデリバリーを確実に達成する重要な役割を担います。 SIC Planningは、Fab15、Supply Chain、そしてグローバルなDRAM Networkを結ぶ極めて重要な「コントロールタワー」です。需要・供給・生産能力・在庫・技術移行に関する情報を統合し、Fab15の代表として、短期・中期の生産計画と実行方針を迅速かつ明確に示します。 近年、Max-out要求の拡大、HBMを含む製品構成の変化、Metallization・EUV・W2W・クロスFabプロセスなどOffloadの複雑化により、SICの活躍領域と事業上の重要性は一段と高まっています。本ポジションでは、Fab15と他サイトの制約・余力を俯瞰し、シナリオ分析、Die Mix、Wafer Start、Output Profile、Offload Loopを一体的に設計し、全体最適につながる判断軸を提供します。 単に計画数値を策定するだけではなく、変化を先読みして論点を提示し、Supply Chain、MCT、Manufacturing、Engineering、NPI、各Fabと連携しながら、計画を実行へつなげる仕事です。データに基づく意思決定、AI活用、迅速なリスク検知、標準化・自動化、継続的改善を通じて、顧客コミットメントとFab15の安定運営を支えます。 Fab15の代表として、多くのステークホルダーを巻き込みながらグローバルDRAM Network全体の最適化に貢献できる、影響力と裁量の大きなポジションです。工場の運営だけでなく、グローバルネットワーク全体を動かす視点で仕事に挑戦したい方を歓迎します。 【職務内容】 Fab15、Supply Chain、DRAM Networkを結ぶコントロールタワーとして、短期・中期の生産計画および実行方針を策定・推進する 需要、供給、在庫、キャパシティ、サイクルタイム、歩留まり、顧客納期を統合的に分析し、Fab15としての判断軸および対応方針を提示する Max-out、Pull-in、Die Mix、NPIサンプル、TD品、Wafer Start、Output Profileを最適化し、生産能力と顧客コミットメントの両立を実現する Metallization、EUV、W2W、Probeなど複雑化するOffload運営において、送受計画、Capacity、Loop CT、優先度、実績およびリスクを管理する 複数Fabの制約と余力を可視化し、シナリオ分析を通じて全体最適となるクロスサイトのLoading・Offload戦略を提案する KPI&#xff08;Pace、Cycle Time、Wafer Out、Delivery Adherence、Inventory&#xff09;をモニタリ

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 【職務概要】 SIC(Site Inventory Control) Planning Engineerとして、Fab15の生産能力を最大化し、顧客へのオンタイムデリバリーを確実に達成する重要な役割を担います。 SIC Planningは、Fab15、Supply Chain、そしてグローバルなDRAM Networkを結ぶ極めて重要な「コントロールタワー」です。需要・供給・生産能力・在庫・技術移行に関する情報を統合し、Fab15の代表として、短期・中期の生産計画と実行方針を迅速かつ明確に示します。 近年、Max-out要求の拡大、HBMを含む製品構成の変化、Metallization・EUV・W2W・クロスFabプロセスなどOffloadの複雑化により、SICの活躍領域と事業上の重要性は一段と高まっています。本ポジションでは、Fab15と他サイトの制約・余力を俯瞰し、シナリオ分析、Die Mix、Wafer Start、Output Profile、Offload Loopを一体的に設計し、全体最適につながる判断軸を提供します。 単に計画数値を策定するだけではなく、変化を先読みして論点を提示し、Supply Chain、MCT、Manufacturing、Engineering、NPI、各Fabと連携しながら、計画を実行へつなげる仕事です。データに基づく意思決定、AI活用、迅速なリスク検知、標準化・自動化、継続的改善を通じて、顧客コミットメントとFab15の安定運営を支えます。 Fab15の代表として、多くのステークホルダーを巻き込みながらグローバルDRAM Network全体の最適化に貢献できる、影響力と裁量の大きなポジションです。工場の運営だけでなく、グローバルネットワーク全体を動かす視点で仕事に挑戦したい方を歓迎します。 【職務内容】 Fab15、Supply Chain、DRAM Networkを結ぶコントロールタワーとして、短期・中期の生産計画および実行方針を策定・推進する 需要、供給、在庫、キャパシティ、サイクルタイム、歩留まり、顧客納期を統合的に分析し、Fab15としての判断軸および対応方針を提示する Max-out、Pull-in、Die Mix、NPIサンプル、TD品、Wafer Start、Output Profileを最適化し、生産能力と顧客コミットメントの両立を実現する Metallization、EUV、W2W、Probeなど複雑化するOffload運営において、送受計画、Capacity、Loop CT、優先度、実績およびリスクを管理する 複数Fabの制約と余力を可視化し、シナリオ分析を通じて全体最適となるクロスサイトのLoading・Offload戦略を提案する KPI&#xff08;Pace、Cycle Time、Wafer Out、Delivery Adherence、Inventory&#xff09;をモニタリングし、逸脱の早期検知、影響評価、リカバリー方針の策定をリードする Supply Chain、MCT、Manufacturing、Engineering、NPI、IEおよび他Fabと連携し、計画と現場実行の整合を図る

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. JOB DESCRIPTION As a High Bandwidth Memory Test Engineer at Micron, you will develop, debug, and maintain code that enables the parallel testing of advanced memory devices. Micron Test Engineers support R&D, interacting closely with global teams, as well as taking part in the designing and debugging of test hardware. In this position, you will constantly learn new device specifications and operations in order to develop efficient and innovative solutions of production test flows thru test algo optimization. Additionally, you will take responsibility to gain a firm understanding of the functionality of advanced memory devices as defined in product data sheets. RESPONSIBILITIES AND TASKS: Independency of development of new tests and test algorithms for HBM, which covers test software and hardware requirements, defect coverage, characterization, trending, process flow, and test times. Experienced on test programs development for products using primarily Python and C coding on automated test equipment in the given area followed by test program release to manufacturing area. Be a lead to new product introduction (NPI) as well as pre/post silicon tasks management. Develop test Automation solutions as electrical validation and qualification of new test equipment and tools. Independently debug and identify root causes on test issues and provide solutions across internal/external groups. Provide meaningful statistical data analysis, analytics and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. JOB DESCRIPTION As a High Bandwidth Memory Test Engineer at Micron, you will develop, debug, and maintain code that enables the parallel testing of advanced memory devices. Micron Test Engineers support R&D, interacting closely with global teams, as well as taking part in the designing and debugging of test hardware. In this position, you will constantly learn new device specifications and operations in order to develop efficient and innovative solutions of production test flows thru test algo optimization. Additionally, you will take responsibility to gain a firm understanding of the functionality of advanced memory devices as defined in product data sheets. RESPONSIBILITIES AND TASKS: Independency of development of new tests and test algorithms for HBM, which covers test software and hardware requirements, defect coverage, characterization, trending, process flow, and test times. Experienced on test programs development for products using primarily Python and C coding on automated test equipment in the given area followed by test program release to manufacturing area. Be a lead to new product introduction (NPI) as well as pre/post silicon tasks management. Develop test Automation solutions as electrical validation and qualification of new test equipment and tools. Independently debug and identify root causes on test issues and provide solutions across internal/external groups. Provide meaningful statistical data analysis, analytics and

About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. Performance Engineer, Inference Engine About the Role Anthropic's inference engine is the software between the accelerator kernels and the routing layer. It manages the entire token path in between: batching requests, laying the model out across chips, managing memory for weights and activations, coordinating every forward pass, and managing model state across requests. Built in-house, it runs on all of our accelerator platforms, serving Claude to millions of users and running our research workloads. You will work on building and optimizing this system at Anthropic scale: improving throughput, cost, reliability, and latency across all accelerator and cloud platforms. You are intimately familiar with the hardware and bandwidth numbers (FLOPs, HBM, PCIe, RDMA, network links, etc.) and can model a problem quickly: where the time and bytes go, and what sets the bound. The role is deeply technical and high-impact, and suits engineers who enjoy working across accelerator programming, high-performance systems that seamlessly coordinate between host and device, and large-scale distributed systems. Familiarity with the transformer architecture is a plus. Some example recurring themes: Keep device utilization high. Accelerators should never be waiting due to other overheads. Reuse instead of recompute. Keep model state cached and reuse it whenever that is cheaper than computing it again. Measure, model, then change. We build the observability to see where the gaps are, model the impact of potential improvements, deploy them, and go around again, with Claude speeding up every turn of that loop. Tokens you can trust. Ensuring model quality matter

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Senior Engineer, MCT Operations Quality at Micron Technology, Inc., you will lead and collaborate closely with Global Assembly & Test (AT) sites, Global Quality, and various cross-functional stakeholders to drive on Manual Touchpoint Reduction. You will champion a Quality-First mindset by driving manufacturing solutions and end-to-end redesign initiatives to eliminate manual steps upfront that reduce operational error, prevent customer events and enhance product quality across Global AT network. Job Responsibilities: Lead global initiatives and collaborate with AT sites and Global Quality to identify and eliminate high-risk manual touchpoints across Assembly, Test/Post E, Module/SSD, HBM/PWF areas. Conduct onsite validation of the manual touchpoints at the source, identify quality risks, and propose improvements to eliminate the touchpoints. Collaborate with subject matter experts and drive the development and deployment of scalable solutions through physical automation/robotics, system automation, and Predictive Quality & Generative AI-enabled solutions. Collaborate with subject matter experts on end-to-end redesign initiatives to eliminate manual touchpoints upfront. Lead as the central team program governance to drive strategy, alignment, and execution consistency across all AT sites. Drive the rapid replication and scaling of proven solutions across AT sites through structured deployment frameworks

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a HIG IE Engineer, your responsibilities encompass tactical execution and planning to support tactical pillar, CAPEX and OCAP budget management, material planning for wafer probe C1-C4 to Micron IQP, build Business Processes to enable wafer level activities. Also to work as a window for wafer PRIME, pWLR and DOE material acquisition, drive sample deliveries to execution for Wafer Reliability and IQP Reliability. You are also expected to understand procurement of items, inventory logistic management, audits, continual improvements, 6S housekeeping, and project management. It is a must for a HIG PSE IE Engineer to be familiar with Claude Code, AI apps and leveraging AI for work productivity and quality improvements. Responsibilities include, but are not limited to: Able to utilize Claude Code and AI apps in regular work. Proven creation of Claude Code apps (Advantageous with more than one creation) Have clear knowledge of HBM wafer probe operations starting from Assembly to post C4. Have clear knowledge of wafer material acquisition from FE processes. Liaison with NPO, SIC, NPI teams from F15 and OMT. Have knowledge in MES/MAM attributes, tagging of lots from AAA, DAA and NAA lots. Familiar with CBG setting to ensure engineering wafers are not mixed with MFG wafers. Able to track E2E DOEs requests from start to CRD/MAD. Work closely with requestors on process needs. Able to work as a team with fellow members in a safe, cohesive, and collabo

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Senior Engineer, MCT Operations Quality at Micron Technology, Inc., you will lead and collaborate closely with Global Assembly & Test (AT) sites, Global Quality, and various cross-functional stakeholders to drive on Manual Touchpoint Reduction. You will champion a Quality-First mindset by driving manufacturing solutions and end-to-end redesign initiatives to eliminate manual steps upfront that reduce operational error, prevent customer events and enhance product quality across Global AT network. Job Responsibilities: Lead global initiatives and collaborate with AT sites and Global Quality to identify and eliminate high-risk manual touchpoints across Assembly, Test/Post E, Module/SSD, HBM/PWF areas. Conduct onsite validation of the manual touchpoints at the source, identify quality risks, and propose improvements to eliminate the touchpoints. Collaborate with subject matter experts and drive the development and deployment of scalable solutions through physical automation/robotics, system automation, and Predictive Quality & Generative AI-enabled solutions. Collaborate with subject matter experts on end-to-end redesign initiatives to eliminate manual touchpoints upfront. Lead as the central team program governance to drive strategy, alignment, and execution consistency across all AT sites. Drive the rapid replication and scaling of proven solutions across AT sites through struct

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We're advancing some of the most important technologies in modern computing. Our memory solutions power AI, cloud, enterprise, mobile, and high-performance computing platforms around the world. The Memory Systems Architecture team explores complex technical challenges across the memory stack and turns them into practical product innovations, helping shape the future of memory technologies and industry standards. As a Technical Staff Member, you will provide systems-level architecture leadership for next-generation memory solutions. This role combines analytical modeling, architecture development, reliability strategy, and cross-functional influence to help define future products. You will work across engineering disciplines to evaluate tradeoffs, guide technical decisions, and develop differentiated solutions that deliver value to customers and platforms. Responsibilities: Define architectures for DDR, LPDDR, HBM, CXL-attached memory, and emerging memory technologies. Develop analytical and simulation-based models to evaluate performance, reliability, power, thermal, and cost tradeoffs. Drive architecture requirements across DRAM, packaging, modules, controllers, platforms, and system software. Lead technical studies, roadmap development, and architecture recommendations supported by quantitative analysis. Influence cross-functional teams, mentor engineers, and contribute to patents, publications, and standards activities. Mi

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Micron’s vision is to transform how the world uses information to enrich life for all . Join a world-class global team focused on one thing: using our expertise in the relentless pursuit of innovation to enable high value technology driven solutions for customers and partners. The solutions we create help make everything from virtual reality experiences to breakthroughs in supercomputing and artificial intelligence possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can spark the very innovation we are pursuing. We are currently experiencing a ground-breaking period in artificial intelligence (AI), where AI is anticipated to become an integral component of daily life. This proliferation is being fueled by advances in memory and compute technologies. High bandwidth memory (HBM) is at the forefront of these innovations. Micron’s Advanced Packaging Technology Development (APTD) is responsible to deliver package development for high performance memory products and transfer to manufacturing. Job Summary The Package Health Test Engineer will contribute to the development and execution of package health monitoring, simulation, and characterization activities. This role involves hands-on en

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Senior Engineer, MCT Operations Quality at Micron Technology, Inc., you will lead and collaborate closely with Global Assembly & Test (AT) sites, Global Quality, and various cross-functional stakeholders to drive on Manual Touchpoint Reduction. You will champion a Quality-First mindset by driving manufacturing solutions and end-to-end redesign initiatives to eliminate manual steps upfront that reduce operational error, prevent customer events and enhance product quality across Global AT network. Job Responsibilities: Lead global initiatives and collaborate with AT sites and Global Quality to identify and eliminate high-risk manual touchpoints across Assembly, Test/Post E, Module/SSD, HBM/PWF areas. Conduct onsite validation of the manual touchpoints at the source, identify quality risks, and propose improvements to eliminate the touchpoints. Collaborate with subject matter experts and drive the development and deployment of scalable solutions through physical automation/robotics, system automation, and Predictive Quality & Generative AI-enabled solutions. Collaborate with subject matter experts on end-to-end redesign initiatives to eliminate manual touchpoints upfront. Lead as the central team program governance to drive strategy, ali

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Business Development Manager for the Cloud Memory Business Unit (CMBU), you will help to drive the worldwide inbound and outbound marketing and business development activities for a key customer in the cloud computing / hyperscale space. You will define long-term strategy for the key account, influence internal and external product roadmaps, and champion customer-centric innovation to capture market share in this high-growth segment. In this position, you will analyze segment and marketing data, align existing products as well as document requirements for next generation products, and work with the cross-functional teams to develop and implement the strategy to enable Micron to continue to gain market share in this high growth and rapidly moving segment! The cloud product portfolio encompasses a comprehensive range of DDR, LPDDR and HBM based memory solutions supporting the requirements of our end market focus. Based on increasing growth opportunities across Cloud and AI, the structural definition, development, and delivery of a market leading Cloud strategy is a key imperative for CMBU and Micron! Responsibilities: Define and lead the account strategy to drive long‑term growth and profitability Strengthen our position as a trusted advisor across DDR, LPDDR, and HBM technologies Shape and deliver customer business and technical review strategies Advocate customer requirements within Micron product planning and roadmap processes