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Hbm Hardware Emulation Architect Jobs

468 active opportunities · Updated for October 2026

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M
3mo ago

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an HBM Power Delivery Network (PDN) Engineer , you will be part of the Heterogeneous Integration Group (HIG), responsible for the design, analysis, and optimization of power delivery networks for next-generation HBM products. You will work closely with architecture, design, physical design, packaging, and product engineering teams to ensure robust, efficient, and manufacturable power delivery solutions that meet aggressive performance, power integrity, and reliability targets. This is a hands-on technical role focused on PDN design, EM/IR analysis, and cross-domain optimization across technology, design, and layout. Key Responsibilities Design and develop SoC-level and HBM-cube-level power delivery networks for HBM designs, including power grid architecture, routing strategies, and decoupling schemes. Perform EM/IR analysis and optimization using industry-standard tools (e.g., Cadence RedHawk, Ansys Totem) to ensure power integrity across dynamic workloads. Collaborate with physical design teams on floorplanning, placement, and routing strategies to enable efficient PDN implementation. Drive power integrity closure across multi-mode/multi-corner scenarios, identifying and mitigating droop, noise, and electromigration risks. Work with package and system teams to co-optimize die-package-system PDN interactions, including bump/pad assignment and current distribution. Develop and validate power models, including activity-based current profiles and transient analysis for realistic

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M
Micron
📍 United States• Full-time
4mo ago

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tape-out. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. Key Responsibilities Own physical implementation for SoC blocks and/or top-level, including floor-planning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust physical integration and timing/power integrity. Perform and/or coordinate physical signoff, including DRC/LVS, IR drop/EM, and timing signoff, addressing violations efficiently. Partner with DFT teams to ensure scan/MBIST requirements are physically realizable and do not compromise PPA or schedule. Work with packaging, assembly, test, probe, and manufacturing collaborators to ensure builds meet manufacturability and quality requirements. Support tape-out execution (checklists, ECO flows, signoff r

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsible for monitoring tool performance and scheduling and performing preventative maintenance on your assigned area's equipment. Use mechanical and electronic skills to troubleshoot and repair down equipment. Assist with equipment installs and upgrades and create and modify equipment procedures. Work to increase tool uptime through systematic problem-solving and troubleshooting, quality workmanship, and routine reviews of maintenance checklists and procedures. Supports engineering activities such as design, test, check-out, modification, fabrication, and assembly of prototype electro-mechanical systems, experimental design circuitry, or specialized test equipment. Applications may include analog, digital and/or video circuits and logic systems. Works from schematics, diagrams, written, and verbal descriptions, layouts or defined plans to perform testing, checkout, and trouble-shooting functions. Performs operational test and fault isolation on systems and equipment. Assists in determining methods or actions to remedy malfunctions. Assists in the design, construction, test, and check-out of test equipment. Uses manufacturing, test, development, or diagnostic equipment, including, but not limited to, test programs oscilloscopes, signal generators, and specialized test apparatus. Requirements: • Diploma in Electronics/Mechanical/Electrical/Mechatronics Engineering . • Interest/Experience in semiconductor and testing env

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M
Micron
📍 United States• Full-time
5mo ago

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. This is a hands-on technical role passionate about RTL build, IP integration, debugging, and pre/post-silicon support. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations. Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure. Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues. Contribute to design documentation, block specifications, and design reviews. Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds. Minimum Qualifications Bachelor’s or master’s degree in electrical engineering, Computer

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M
Micron
📍 United States• Full-time
5mo ago

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tape-out. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. Key Responsibilities Own physical implementation for SoC blocks and/or top-level, including floor-planning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust physical integration and timing/power integrity. Perform and/or coordinate physical signoff, including DRC/LVS, IR drop/EM, and timing signoff, addressing violations efficiently. Partner with DFT teams to ensure scan/MBIST requirements are physically realizable and do not compromise PPA or schedule. Work with packaging, assembly, test, probe, and manufacturing collaborators to ensure builds meet manufacturability and quality requirements. Support tape-out execution (checklists, ECO flows, signoff r

airecruitment
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks: • Establish and improve equipment condition and technology. • Upgrade process capability and reduce production cost. • Establish and modify equipment management projects. • Set up process parameters for a variety of semiconductor equipment. • Evaluation, promotion and planning of new equipment / materials. • Abnormal analysis and improvement. • Leverage AI-enabled tools and data-driven insights to improve operational efficiency, accelerate problem-solving, and support continuous improvement initiatives. Qualifications and Skills • Experience in wafer bonding, debonding, coating, lithography, thin film, or advanced packaging processes is preferred. ​ • Establish and improve process condition and technology.​ • Upgrade tool capability and improve product quality.​ • Establish and modify process management projects.​ • Set up process parameters for a variety of semiconductor equipment. ​• Evaluation, promotion and planning of new equipment / materials. ​• Abnormal analysis and improvement.​ • Leveraging AI and data analytics tools to enhance process monitoring, root cause analysis, predictive maintenance, and process optimization for semiconductor manufacturing operations. Requirement:​ • Preferred to have over 3-year of working experiences in production line.​ • Must have process maintain experience.​ • Bachelor degree or

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. • Leverage AI and advanced analytics tools to identify process variation, uncover hidden KPIVs, and accelerate root cause analysis. • Develop and deploy AI-assisted monitoring, anomaly detection, and predictive models to improve process stability, yield, and equipment performance. • Utilize digital solutions (Copilot, Power BI, AI Agents, dashboards, etc.) to automate routine engineering analysis, reporting, and decision-making workflows. • Drive data-driven process optimization through machine learning, pattern recognition, and large-scale manufacturing data analysis. • Partner with Automation, IT, and Data Science teams to implement smart manufacturing solutions and AI-enabled process control methodologies. • Establish and maintain digital twins, predictive maintenance models, and AI-based early warning systems for process and equipment health monitoring. • Identify opportunities to reduce engineering cycle time through AI-assisted experiment design, data mining, and knowledge management platforms. • Lead AI adoption initiatives within the manufacturing organization to improve productivity, quality, cost, and operational efficiency. AI in Job Requirements: •Baseline digital fluency, with the ability to

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