Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tape-out. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. Key Responsibilities Own physical implementation for SoC blocks and/or top-level, including floor-planning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust physical integration and timing/power integrity. Perform and/or coordinate physical signoff, including DRC/LVS, IR drop/EM, and timing signoff, addressing violations efficiently. Partner with DFT teams to ensure scan/MBIST requirements are physically realizable and do not compromise PPA or schedule. Work with packaging, assembly, test, probe, and manufacturing collaborators to ensure builds meet manufacturability and quality requirements. Support tape-out execution (checklists, ECO flows, signoff r
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HBM SOC Design Engineer — Richardson, TX. Apply via Workday.
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As Staff Engineer in Micron’s High Bandwidth Memory (HBM) Component Validation team, you will contribute as Subject Matter Expert (SME) and contribute to define new standards on validation development for advanced HBM products and ensure stable, scalable validation testing infrastructure with zero code-related escapes across MBIST, Native test modes and high speed memory validation. You own optimizing test flows, and lead technical problem solving for next generation HBM products. You’ll drive validation development deliverables and mentor junior engineers. Why Join Us You’ll gain hands-on experience with cutting-edge HBM technologies and validation platforms, working alongside global experts. This role offers opportunities to learn advanced validation techniques, drive and deliver product readiness, technology solutions and innovations, and grow into technical leadership roles. Responsibilities Test program development SME: Drive and develop and maintain test programs for HBM component validation Deliver timely test program releases aligned with validation milestones and drive code quality, reviews, and release best-practices Drive test time optimization and parallelism improvements Drive test stab
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. This is a hands-on technical role passionate about RTL build, IP integration, debugging, and pre/post-silicon support. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations. Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure. Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues. Contribute to design documentation, block specifications, and design reviews. Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds. Minimum Qualifications Bachelor’s or master’s degree in electrical engineering, Computer
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an HBM Power Delivery Network (PDN) Engineer , you will be part of the Heterogeneous Integration Group (HIG), responsible for the design, analysis, and optimization of power delivery networks for next-generation HBM products. You will work closely with architecture, design, physical design, packaging, and product engineering teams to ensure robust, efficient, and manufacturable power delivery solutions that meet aggressive performance, power integrity, and reliability targets. This is a hands-on technical role focused on PDN design, EM/IR analysis, and cross-domain optimization across technology, design, and layout. Key Responsibilities Design and develop SoC-level and HBM-cube-level power delivery networks for HBM designs, including power grid architecture, routing strategies, and decoupling schemes. Perform EM/IR analysis and optimization using industry-standard tools (e.g., Cadence RedHawk, Ansys Totem) to ensure power integrity across dynamic workloads. Collaborate with physical design teams on floorplanning, placement, and routing strategies to enable efficient PDN implementation. Drive power integrity closure across multi-mode/multi-corner scenarios, identifying and mitigating droop, noise, and electromigration risks. Work with package and system teams to co-optimize die-package-system PDN interactions, including bump/pad assignment and current distribution. Develop and validate power models, including activity-based current profiles and transient analysis for realistic
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsible for monitoring tool performance and scheduling and performing preventative maintenance on your assigned area's equipment. Use mechanical and electronic skills to troubleshoot and repair down equipment. Assist with equipment installs and upgrades and create and modify equipment procedures. Work to increase tool uptime through systematic problem-solving and troubleshooting, quality workmanship, and routine reviews of maintenance checklists and procedures. Supports engineering activities such as design, test, check-out, modification, fabrication, and assembly of prototype electro-mechanical systems, experimental design circuitry, or specialized test equipment. Applications may include analog, digital and/or video circuits and logic systems. Works from schematics, diagrams, written, and verbal descriptions, layouts or defined plans to perform testing, checkout, and trouble-shooting functions. Performs operational test and fault isolation on systems and equipment. Assists in determining methods or actions to remedy malfunctions. Assists in the design, construction, test, and check-out of test equipment. Uses manufacturing, test, development, or diagnostic equipment, including, but not limited to, test programs oscilloscopes, signal generators, and specialized test apparatus. Requirements: • Diploma in Electronics/Mechanical/Electrical/Mechatronics Engineering . • Interest/Experience in semiconductor and testing env
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Product Engineer in the High Bandwidth Memory (HBM) Media Health (MH) team, you will work with Fab, Yield Improvement, Design, and other engineering groups passionately focused on HBM. You will develop, deploy, optimize, and innovate test strategies for Micron's DRAM in HBM products. The team acts as a key partner of these engineering groups and specialties, focusing on innovating new and improved test strategies and features. You will guide development for Probe (wafer level test), Burn-in, and ATE test code and testing techniques used to validate and ensure device performance. You will assist in debugging code and aiding other specialists in the characterization of applicable HBM devices. In this role, your additional responsibilities include an in-depth understanding of general device functionality specific to HBM products as well as schematics and signal integrity. Responsibilities: Work with Design Engineering to run simulations pre-silicon to validate DFT circuits and test modes as well as communicate design issues found. Work on pre-silicon tasks with MH and test teams to define required tester resources. Work with Test Engineering and HBM Product Engineering to ensure specific product requirements or limitations are comprehended, leading to silicon performance matching expectations. This work includes test program debug, examination of data, and test development. Support the fabrication sites and Process Integration through test development to increase effective process feedba
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. • Leverage AI and advanced analytics tools to identify process variation, uncover hidden KPIVs, and accelerate root cause analysis. • Develop and deploy AI-assisted monitoring, anomaly detection, and predictive models to improve process stability, yield, and equipment performance. • Utilize digital solutions (Copilot, Power BI, AI Agents, dashboards, etc.) to automate routine engineering analysis, reporting, and decision-making workflows. • Drive data-driven process optimization through machine learning, pattern recognition, and large-scale manufacturing data analysis. • Partner with Automation, IT, and Data Science teams to implement smart manufacturing solutions and AI-enabled process control methodologies. • Establish and maintain digital twins, predictive maintenance models, and AI-based early warning systems for process and equipment health monitoring. • Identify opportunities to reduce engineering cycle time through AI-assisted experiment design, data mining, and knowledge management platforms. • Lead AI adoption initiatives within the manufacturing organization to improve productivity, quality, cost, and operational efficiency. AI in Job Requirements: •Baseline digital fluency, with the ability to
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Overview|職缺概述 Micron Taiwan is building a long‑term HBM talent pool to support the expansion of advanced memory manufacturing in Taichung. This evergreen posting is intended to attract talents across Engineering, Manufacturing, Quality, Automation, Facilities, and Operations Leadership functions. Micron 台灣持續擴展 HBM(High Bandwidth Memory)製造與營運團隊 ,此 evergreen 職缺用於建立長期人才庫,將依業務需求媒合合適職務。 Potential Roles|涵蓋職務方向(不限於) Manufacturing / Process 製造/製程工程師 Automation & Manufacturing Systems Engineer 自動化與製造系統工程師 Industrial Engineer 工業工程師 Product Quality Assurance / Quality Engineering (PQA / PQE) 產品品質保證/品質工程 HBM Manufacturing / Test Production Supervisor HBM 製造/測試產線主任 Assembly Equipment Engineer / Process Engineer 設備/製程工程師 Facilities Engineer 廠務工程師(水處理/HVAC/氣體系統/擴建工程專案/二次配) What You Will Do|工作內容摘要 Depending on role alignment, responsibilities may include: Support and improve HBM manufacturing, assembly, test, automation, or facility systems 支援並優化 HBM 製造、封裝、測試、自動化或廠務系統 Drive process optimization and yield improvement, enhance product quality, and support new product introduction and production ramp 負責分析與優化
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. HBM Core-Die Architecture & Circuit Design Engineer This role owns next‑generation HBM core‑die architecture and critical DRAM circuit design that directly impact bandwidth, power, area, thermal efficiency, and long‑term reliability. The engineer will drive architecture definition, circuit feasibility, and Architecture Reference Design (ARD) development across advanced 3D‑stacked HBM products. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Key Responsibilities Own HBM core‑die architecture including Bank/Bank‑Group organization, array partitioning, datapath, refresh, and reliability features Drive critical DRAM circuit design and timing closure for row, column, sensing, and datapath paths Develop and optimize architecture solutions for bandwidth, power, area, thermal, and reliability trade‑offs Define and validate refresh, row‑hammer mitigation, data‑retention, and power‑efficient operation schemes Lead architecture feasibility studies using transistor‑level simulation and physical implementa
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s High Bandwidth Memory Design Architecture team develops memory solutions for AI accelerators, high-performance computing, and data centers. We bring architecture and physical implementation together to shape products that are efficient, manufacturable, and ready for demanding applications! As a Custom Layout Architecture Engineer , you will use physical layout expertise to inform HBM architecture and implementation decisions from concept through tapeout. You will work with design, architecture, process, verification, and product engineering teams to balance performance, power, area, routability, and manufacturability. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Assess HBM architecture choices through layout feasibility, floorplanning, and performance, power, and area analysis Lead custom layout and full-chip integration for analog, mixed-signal, digital, and memory blocks Resolve antenna, latch-up, ESD, electromigration, IR drop, routability, and power-delivery constraints Complete DRC/LVS, parasitic extraction, post-layout validation, and tapeout support using industry-standard EDA tools Build scripts and automation that improve layout quality, verification, and design-cycle time Minimum Qualifications: Bachelor’s degree in Electrical Engineering, Electronics Engineering, or a related technical field 4+ years of semiconductor physical layout experience with a
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities: Handle several tasks at once and bring them to completion within the specified timeframe. Accurately examine and interpret production data to pinpoint and address abnormal issues. Collaborate with other departments to solve problems and improve production processes. Apply Generative AI to improve the efficiency of daily work. Carry out research to analyze process changes and propose improvements or alterations to equipment. Minimum Qualifications: Demonstrated skill in analyzing and interpreting data with precision. Demonstrated excellence in team building, mentoring, and coaching. Strong problem-solving skills and the ability to find solutions to improve production. Skill in managing several assignments concurrently and completing them on time. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. • Identify, diagnose and resolve assembly process related problems • Coordinate and execute process, equipment and material evaluation / optimization initiatives and implement changes at process step • Lead / participate in continuous yield improvement and cost reduction activities • Validate and fan out new process baseline qualified, including new process, tools and/or materials for new product introduction • Support SPC/FDC/RMS/APC • Support site to site portability • Manage / audit material suppliers to achieve quality, cost and risk management objectives • Support internal and external audits Requirement: 1 years of experience in semiconductor manufacturing, packaging, or assembly processes. Ability to work in a cleanroom environment and flexibility to support on-call rotations or shifts when critical production issues arise. Strong analytical thinking, proactive problem-solving mindset, and a high degree of self-motivation. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses infor
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The HBM Physical Design team is responsible for implementing advanced High Bandwidth Memory (HBM) SoC and base die designs that enable next-generation AI, high-performance computing, and data center solutions. The team collaborates across architecture, RTL, verification, DFT, and signoff engineering to deliver high-performance, power-efficient silicon while developing innovative design methodologies and automation solutions. As an SoC Physical Design Intern on the HBM team, you will work alongside experienced engineers to support the implementation of advanced HBM SoC designs. You will gain hands-on experience with physical design methodologies, timing analysis, signoff flows, and automation while contributing to the development of next-generation memory products that power AI and high-performance computing applications. Responsibilities Support the physical implementation of SoC design blocks, including floorplanning, placement, clock tree synthesis, routing, and physical optimization activities. Analyze timing, power, area, congestion, and physical verification results to find opportunities for design improvement and optimization. Assist with static timing analysis, timing closure, and debugging across multiple operating modes and process corners. Develop and enhance automation tools, scripts, reports, and workflows using Python, Tcl, shell scripting, and AI-assisted solutions. Collaborate with multi-functional engineering teams to document r
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities Validation Execution Assist in executing Validation Runs on IQP/ETV materials under defined timelines, ensuring coverage completeness across MBIST and Native Mode flows. Support time-bound data crunching (log parsing, statistical summaries) and contribute to summary report preparation. Platform & Test Program Support Operate and debug programs on SM3/Cobra (MBIST) and Advantest V93K (Native) . Assist in hardware readiness: handler, socket, loadboard, and probe card setup. Technical Analysis & Simulation Validate high-speed I/O (>11 Gbps) and assist with eye diagram and signal integrity checks. Support Verilog simulation tasks (testbench execution, waveform review) to reproduce sightings and validate fixes. Data & Automation Develop basic scripts in Python for log parsing and data visualization. Maintain documentation in Confluence/Jira and version control in Git/Perforce. Debug & Collaboration Participate
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