Hbm Process Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Staff Engineer in Micron’s HBM Product Engineering Component Validation team, you will be an individual contributor responsible for the validation of advanced High Bandwidth Memory (HBM) products. You will use proven knowledge in dynamic random-access memory and high-bandwidth memory architecture to compose validation coverage, implement and analyze validation runs, lead product debug and failure analysis toward a zero-escape validation goal across test modes and product achievements. You will also adopt AI-enabled ways of working, using enterprise AI tools to accelerate your engineering tasks and improve efficiency, work within Micron’s global validation organization and collaborate with groups at different locations. Responsibilities: Translate DRAM/HBM develop intent and architecture into effective verification scope and test cases. Contribute to validation of new and high-risk product features, working with Design Validation, and Systems Engineering. Review design specifications, schematics, and datasheets, provide design feedback and represent the Product Engineering perspective in Design and Verification reviews. Read, analyze, and debug circuit blueprints to detect design-related failure mechanisms, and recommend approaches for verification and fault diagnosis. Perform root-cause analysis and examination of electrical failures (debug) of validation findings, distinguishing developed marginality from process and test-related issues. Apply automation and modern tooling (including

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a HIG PSE IE Senior Technician , you will support HBM IQP Reliability, Device Reliability, Package Reliability, Wafer Reliability, and product debug activities . The role includes reliability testing, failure analysis, laboratory operations, inventory and logistics management, audits, safety compliance, and continuous improvement initiatives. You will leverage Artificial Intelligence (AI) and AI-assisted tools to improve IQP reliability run rate management, enhance debug capabilities, support wafer-level reliability testing, and drive automation and digital transformation within the lab environment. Key Responsibilities Support Device Reliability, Package Reliability, and Wafer Reliability execution. Monitor and manage IQP reliability run rates, sample flow, and hardware readiness. Perform first-pass failure analysis and product debugging using probe stations and other debug tools. Utilize AI-assisted tools to improve debugging efficiency, root cause investigation, and operational planning. Support automation projects, data analysis, dashboard reporting, and process improvements. Manage procurement, inventory, logistics, and laboratory readiness activities. Support audits, document control, ESD

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a HIG PSE IE Senior Technician , you will support HBM IQP Reliability, Device Reliability, Package Reliability, Wafer Reliability, and product debug activities . The role includes reliability testing, failure analysis, laboratory operations, inventory and logistics management, audits, safety compliance, and continuous improvement initiatives. You will leverage Artificial Intelligence (AI) and AI-assisted tools to improve IQP reliability run rate management, enhance debug capabilities, support wafer-level reliability testing, and drive automation and digital transformation within the lab environment. Key Responsibilities Support Device Reliability, Package Reliability, and Wafer Reliability execution. Monitor and manage IQP reliability run rates, sample flow, and hardware readiness. Perform first-pass failure analysis and product debugging using probe stations and other debug tools. Utilize AI-assisted tools to improve debugging efficiency, root cause investigation, and operational planning. Support automation projects, data analysis, dashboard reporting, and process improvements. Manage procurement, inventory, logistics, and laboratory readiness activities. Support audits, document contr

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Role Summary: We are currently experiencing a ground-breaking period in artificial intelligence (AI), where AI is anticipated to become an integral component of daily life. This proliferation is being fueled by advances in memory and compute technologies. High bandwidth memory (HBM) is at the forefront of these innovations. Micron’s Advanced Packaging Technology Development (APTD) is responsible to deliver package development for high performance memory products and transfer to manufacturing. Your responsibilities include but are not limited to developing and enabling deployment of processes related to the post-fab wafer finishing processes in semiconductor manufacturing to meet performance, cost, manufacturability, quality, reliability and schedule requirements. You will have opportunity to work with peers and partners across organizations to coordinate the development and launch of new technologies and integration flows for solutions that drive the future. Main Responsibilities: Process Development: Establish and improve process management projects to deliver technology node requirements and scaling for next node for wafer level process conditions and technologies including photolithography, dry etch, CMP, wet process, de

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. JOB DESCRIPTION As a High Bandwidth Memory Test Engineer at Micron, you will develop, debug, and maintain code that enables the parallel testing of advanced memory devices. Micron Test Engineers support R&D, interacting closely with global teams, as well as taking part in the designing and debugging of test hardware. In this position, you will constantly learn new device specifications and operations in order to develop efficient and innovative solutions of production test flows thru test algo optimization. Additionally, you will take responsibility to gain a firm understanding of the functionality of advanced memory devices as defined in product data sheets. RESPONSIBILITIES AND TASKS: Independency of development of new tests and test algorithms for HBM, which covers test software and hardware requirements, defect coverage, characterization, trending, process flow, and test times. Experienced on test programs development for products using primarily Python and C coding on automated test equipment in the given area followed by test program release to manufacturing area. Be a lead to new product introduction (NPI) as well as pre/post silicon tasks management. Develop test Automation solutions as electrical validation and qualification of new test equipment and tools. Independently debug and identify root causes on test issues and provide solutions across internal/external groups. Provide meaningful statistical data analysis, analytics and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. JOB DESCRIPTION As a High Bandwidth Memory Test Engineer at Micron, you will develop, debug, and maintain code that enables the parallel testing of advanced memory devices. Micron Test Engineers support R&D, interacting closely with global teams, as well as taking part in the designing and debugging of test hardware. In this position, you will constantly learn new device specifications and operations in order to develop efficient and innovative solutions of production test flows thru test algo optimization. Additionally, you will take responsibility to gain a firm understanding of the functionality of advanced memory devices as defined in product data sheets. RESPONSIBILITIES AND TASKS: Independency of development of new tests and test algorithms for HBM, which covers test software and hardware requirements, defect coverage, characterization, trending, process flow, and test times. Experienced on test programs development for products using primarily Python and C coding on automated test equipment in the given area followed by test program release to manufacturing area. Be a lead to new product introduction (NPI) as well as pre/post silicon tasks management. Develop test Automation solutions as electrical validation and qualification of new test equipment and tools. Independently debug and identify root causes on test issues and provide solutions across internal/external groups. Provide meaningful statistical data analysis, analytics and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a HIG IE Engineer, your responsibilities encompass tactical execution and planning to support tactical pillar, CAPEX and OCAP budget management, material planning for wafer probe C1-C4 to Micron IQP, build Business Processes to enable wafer level activities. Also to work as a window for wafer PRIME, pWLR and DOE material acquisition, drive sample deliveries to execution for Wafer Reliability and IQP Reliability. You are also expected to understand procurement of items, inventory logistic management, audits, continual improvements, 6S housekeeping, and project management. It is a must for a HIG PSE IE Engineer to be familiar with Claude Code, AI apps and leveraging AI for work productivity and quality improvements. Responsibilities include, but are not limited to: Able to utilize Claude Code and AI apps in regular work. Proven creation of Claude Code apps (Advantageous with more than one creation) Have clear knowledge of HBM wafer probe operations starting from Assembly to post C4. Have clear knowledge of wafer material acquisition from FE processes. Liaison with NPO, SIC, NPI teams from F15 and OMT. Have knowledge in MES/MAM attributes, tagging of lots from AAA, DAA and NAA lots. Familiar with CBG setting to ensure engineering wafers are not mixed with MFG wafers. Able to track E2E DOEs requests from start to CRD/MAD. Work closely with requestors on process needs. Able to work as a team with fellow members in a safe, cohesive, and collabo

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In the Technology Development — Advanced Modeling & AI Solutions (AMAIS) organization, you will be part of a multidisciplinary team developing next-generation Digital Twins, predictive modeling solutions, and AI-driven technologies that accelerate advanced memory development and manufacturing excellence. You will create predictive digital representations of semiconductor processes, materials, structures, equipment, and products across DRAM, NAND, and advanced packaging technologies including HBM. Leveraging physics-based modeling, computational methods, machine learning, GenAI, large language models (LLMs), and agentic AI frameworks, you will enable technology co-optimization, design-space exploration, process optimization, yield improvement, and accelerated technology learning. Working at the intersection of engineering fundamentals, manufacturing data, and digital engineering, you will develop scalable predictive and prescriptive solutions that connect process, structure, performance, yield, reliability, and cost. This role offers the opportunity to influence critical technology decisions, drive fab-technology co-optimization , and advance Micron's leadership in data-driven semiconductor memory innovation. Qualifications: Independence – be comfortable executing activities and needs Experience in algorithm development, numerical methods, and scientific computing Solid experience with Plasma, FPM, HAR etching, and MC modeling Experience with Wet Pr

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. What’s Encouraged Daily: Contribute to the development of new HBM products by assisting with the overall design, and layout. · Interpret product specifications and design circuits to meet the required functionality. · Design, implementation, and improvement of Complex Analog Mixed Circuits such as CMOS Amplifiers, Comparators, Bandgap references, V2I converters, LDOs, charge pumps, Oscillators , DLL, IO circuits (DDR/LPDDR), Delays, Process and temperature sensors in advanced semiconductor process nodes for advanced High Bandwidth Memory ( HBM ) products · Integration of modules with Power delivery network and propose design solution for optimum performance · Deep understanding of Array and its peripheral circuits. · Driving innovation into the future Memory generations within a dynamic work environment · Validate & optimize design for reliability (Device stress, Aging effect) · EM/IR simulation, optimize layout to achieve best circuit performance ·

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This job requisition is for a Dry Etch Lead Principal Engineer at Micron Technology, Inc. Micron is a Fortune 500 company and employs over 53,000 workers worldwide, with headquarters in Boise, ID. Micron offers the industry’s broadest portfolio of memory solutions—starting with foundational DRAM, NAND, and NOR Flash memory, extending to SSDs, MCPs, HBM, and other memory-based systems. As the only memory fab in the western hemisphere, Micron is in the industry for over forty-five years and continues to stay as the only U.S.-based DRAM manufacturer. Micron is one of the most prolific patent applicants in the world with over 60,000 patents granted and still growing. Responsibilities: Develop dry etch processes to meet physical and electrical product requirements Optimize processes to reduce cost, variability, and improve capability Collaborate with integration and process teams to develop innovative solutions Perform root cause and failure mode analysis and drive vendor improvements Support pilot line operations and transfer processes to production sites Minimum Qualifications: Bachelor’s degree in Engineering, Physics, or related field 3+ years of relevant experience including internships Strong analytical and creative problem‑solving skills Working knowledge of statistics and statistical process control Ability to manage multiple projects and work independently Preferred Qualifications:

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an HBM Memory Design Engineer in Micron’s HBM Architecture Team, you will design, simulate, analyze, and floorplan digital and analog DRAM circuits used in advanced HBM technology. You will evaluate block-level and full-chip functionality, perform architectural pathfinding, and contribute to the development of next‑generation high‑bandwidth DRAM solutions. This role works across diverse engineering teams to deliver functionally accurate, low‑power, and high‑performance HBM products by bringing to bear 3D stacking and TSV-based integration. Responsibilities • Design, simulate, and optimize digital and analog DRAM circuits including data path, ECC, command/control, and high‑speed timing structures • Evaluate full‑chip and block‑level functionality and propose solutions to achieve correct circuit and system behavior • Perform timing, area, power, and complexity analysis for high‑speed DRAM and mixed‑signal circuits • Conduct pathfinding studies and feasibility analyses for future HBM architectures • Contribute to the development, layout, and optimization of memory, logic, and analog circuits • Analyze circuit behavior under varying PVT and parasitic conditions to ensure robust operation • Collaborate with multi-functional teams across build, verification, product engineering, process, and packaging • Support design reviews, documentation, and continuous improvement of design methodologies Minimum Qualifications • BSEE with 7+ years, or MSEE with 5+ years of releva

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro: The Advanced Packaging Technology Development (APTD) team at Micron drives the technologies that enable the AI era. We work hands‑on with global R&D, suppliers, and manufacturing teams to turn breakthrough ideas into production‑ready solutions. Our work sits at the intersection of innovation, scale, and real‑world impact—and collaboration is how we win. Position Overview: Artificial intelligence is transforming the world, and High Bandwidth Memory (HBM) is at the center of that transformation. As a Senior or Staff Engineer on the Dry Etch R&D team, you will play a key role in developing and scaling plasma‑based etch processes that enable next‑generation packaging technologies. This role offers deep technical ownership, broad cross‑functional collaboration, and the opportunity to influence long‑term technology roadmaps from early research through high‑volume manufacturing. Responsibilities: Develop and optimize dry etch process modules to meet performance, yield, and reliability requirements for advanced packaging products Drive process capability, cost, and variability improvements using data‑driven experimentation and equipment innovation Collaborate closely with process integration and adjacent process teams including Wet Etch, Films, Lithography, CMP, Wafer Trim, and Bonding Perform root‑cause and failure‑mode analysis a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a High Bandwidth Memory Test Engineer at Micron, you will develop, debug, and maintain code that enables the parallel testing of advanced memory devices. Micron Test Engineers support R&D, interacting closely with global teams, as well as taking part in the designing and debugging of test hardware. In this position, you will constantly learn new device specifications and operations in order to develop efficient and innovative solutions of production test flows thru test algo optimization. Additionally, you will take responsibility to gain a firm understanding of the functionality of advanced memory devices as defined in product data sheets. RESPONSIBILITIES AND TASKS: Independency of development of new tests and test algorithms for HBM, which covers test software and hardware requirements, defect coverage, characterization, trending, process flow, and test times. Experienced on test programs development for products using primarily Python and C coding on automated test equipment in the given area followed by test program release to manufacturing area. Be a lead to new product introduction (NPI) as well as pre/post silicon tasks management. Develop test Automation solutions as electrical validation and qualification of new test equipment and tools. Independently debug and identify root causes on test issues and provide solutions across internal/external groups. Provide meaningful statistical data analysis, analytics and justification on program v

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a highly skilled Physical Design Engineer to drive the critical Die-to-Die (D2D) Physical Implementation from RTL to GDSII. This role demands deep expertise in full physical design flow with a specific focus on closing high-speed D2D interfaces for multi-die/chiplet architectures. This role is remote role open to any location in the U.S. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned ASIC Physical Design Engineer with 5+ years at advanced nodes (7nm or below) and multiple successful tapeouts. Strong in full-chip implementation, comfortable owning blocks from RTL to GDSII across synthesis, floorplanning, place-and-route, CTS, and sign-off. Deeply familiar with high-speed interfaces (D2D, PCIe, HBM, SerDes) and the physical challenges that come with them (timing, signal integrity, power integrity). Detail-oriented and methodical with STA, constraints, and closure for complex, high-speed designs. A hands-on problem solver who enjoys collaborating across analog, digital, and full-chip teams to debug tough issues. What We Need Lead Die-to-Die (D2D) physical implementation and closure, taking high-spe

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The High-Performance Integrated Group (HIG) is a division within the Technology and Products Group (TPG). We are dedicated to developing and optimizing High Bandwidth Memory (HBM) solutions for AI and ML applications! Our ultimate goal is to deliver the lowest power per bit solutions in the industry! Position Overview: We are searching for an HBM IO Design Architecture Engineer. This role will focus on HBM IO / TSV IO design and analysis including electrical modeling, Signal Integrity (SI) and Power Integrity (PI) analysis, and design optimization across the HBM development cycle. The ideal candidate brings hands-on experience in design execution, simulation to silicon correlation, and cross-functional methodology development, and embraces AI-driven analysis and data-driven decision making to accelerate quality improvement cycles. Responsibilities will include, but are not limited to: High-speed IO design architecture for HBM products Define and standardize IO design quality process from architecture to silicon Define IO architecture, TSV IO performance targets, and design quality requirements for future HBM products. Develop IO and TSV modeling methodologies to support architecture tradeoff analysis, SI/PI evaluation, and design optimization. Drive simulation-to-silicon correlation and post-silicon learning feedback to improve design quality across HBM product generations. Leverage AI Assisted analytics to accelerate root cause identification from comp