Hvm De Sr Mgr Jobs

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description The MSH PDE Process Integration (PI) Manager leads a team of Process Integration engineers responsible for the successful execution of High Bandwidth Memory (HBM) New Product Introduction (NPI) from early development through High Volume Manufacturing (HVM) . This role combines people leadership, technical oversight, and cross‑functional execution , ensuring PI readiness, yield ramp, and risk mitigation across wafer fabrication, assembly, and test. The manager is accountable for delivering NPI commitments while developing a strong, scalable PI organization. Job Responsibilities People Leadership & Talent Development Lead, coach, and develop a team of MSH PDE PI engineers across multiple experience levels Set clear expectations, goals, and priorities aligned to NPI and business objectives Provide regular feedback, performance evaluations, and career development guidance Build organizational capability through hiring, onboarding, mentoring, and succession planning Foster a culture of accountability, collaboration, and technical excellence HBM NPI Execution & Delivery Own PI execution for HBM NPI programs, en

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks Join our IE Modeling team at Micron and be a key player in driving our success in the semiconductor industry. You will give to daring projects that push technology and innovation boundaries. Apply industrial engineering concepts to model capacity thresholds, ensuring detailed support for both existing and future technologies. Lead capacity modeling projects, coordinating efforts across different departments and sites to achieve outstanding production metrics. Collaborate with site industrial engineering teams to continuously improve production capabilities and optimize capacity. Work closely with ATE and Satellite-Team to plan for future product capacity requirements and evaluate their impact on capital investments. Collaborate with ME, HR, and HVM-Planning teams to bridge the "Plan-To-Performance gap" (P2P gap) by providing comprehensive feedback and thoughtful planning. Capacity Modeling As part of the capacity modeling team, you will be responsible for developing extraordinary models to meet our fab output requirements. Your role will involve: Developing models that accurately reflect fab output capabilities, ensuring they meet the exacting requirements of our production goals. Understanding and facilitating the conversion process for future technology node tr

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description: New Product Operations (NPO) Product Manager (HBM) plays a critical role in driving successful planning and execution of early lifecycle phases for New Product Introduction (NPI) products and this role will support the enablement of industry leading High Performance memory products (HBM). This position ensures alignment across the value chain to achieve predictable manufacturing readiness and seamless transition to High Volume Manufacturing (HVM). Key Responsibilities: • Be the program Operations liaison in core HBM Product Development Teams (PDT’s) driving all Operations Requirements (Supply Chain, Manufacturing, Procurement, Compliance, Logistics) and representing Operations in executive reporting forums. • Participate early in the Product Lifecycle Management (PLM) process to address manufacturing operations and enterprise system concerns for new products. • Maintain schedules for ramp and a smooth transition to HVM, ensuring milestones are met. • Oversee sample processes, ensuring delivery meets specifications, customer expectations, and On-Time Delivery (OTD)

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Summary As the Sr Mgr, OMT Metro Application at Micron, you will have the opportunity to drive world-class solutions that support yield ramp, detection gap closure, and matching consistency. Join us in Taiwan to play a pivotal role in our ambitious journey to achieve flawless HVM/NPI execution across multiple technology nodes! Responsibilities Develop Metro application approach to support yield ramp, detection enhancement, and margin improvement. Collaborate with Metro related equipment suppliers on roadmap alignment, application gaps, and new function evaluation. Establish and share BKMs, lessons learned, and standard application methodologies across fabs. Manage cross-functional resources to close technical gaps and drive project execution. Collaborate with Cram, TD, and Global Procurement to drive supplier competitiveness and cost optimization. Develop Metro Application engineers through organized training, mentoring, and domain rotation. Requirements Masters/Bachelor’s in Engineering with over 10 years’ experience. At least 3 years in a management role. Relevant working experience in M

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As RAM (RDA and Metrology) Central Team Engineer at Micron Technology, Inc., you will be working with a team of other process and equipment engineers as well as process integration team, responsible for starting up, developing and optimizing detection to improve product yield, quality, and cost. This position will identify, diagnose and resolve detection gaps, as well as improving current detection. Responsibilities include working closely with the NAND and DRAM sites, HVM and TD, and even suppliers, to achieve Inline Visibility and Inline Control for Detection enablement and improvement. This position is responsible in setting up and aligning BKM (Best Known Method) related to RAM Detection performance, RAM detection cost and RAM supplier engagement. Responsibilities and Tasks: • Establish Detection to have 100% Inline Visibility and Inline control • Improve Detection strategy, system, and methods to continuously strengthen detection performance. • Enhance Detection capability and strategy to enable Yield improvement, improve Cycle of Learning and strengthen Defense Line. • Establish and improve BKM (Best Known Method) related to RAM Detection performance, RAM dete

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities : ​ •Coordinate and collaborate with the Layout team, AMHS, HVM, FAC, OI, and other cross-functional stakeholders to develop strategic space solutions that reduce cross-fab transfer moves. •Strong data analysis skills to leverage data-driven methodologies in support of layout optimization and strategic space planning decisions. •Apply continuous improvement concepts to proactively identify gaps, propose improvement opportunities, and drive sustainable space and operational efficiency enhancements. •Optimize fab space and operational efficiency using Best Known Methods (BKM), ensuring competitive space costs and flexibility for future expansion. •Define standardized processes and methodologies for layout planning optimization. •Develop long-term space strategies to support the planning and construction of a brand-new intelligent fab. •Develop and implement intelligent systems for space planning and space management. • Possible work locations: Taichung, Taoyuan, Miaoli, Tainan Requirements : • Outstanding project management skills, particularly in space related projects. • Ability to develop and implement intelligent systems for layout planning. • <

Job Details: Job Description: Shape the Future of Semiconductor Innovation at Intel Foundry Organization Overview Manufacturing Development Customer Engineering (MDCE) is a newly established organization within Intel Foundry Technology Manufacturing and is focused on accelerating technology ramp and manufacturing excellence. Our mission is to seamlessly transition cutting-edge technologies from development to high-volume production while making technology ramp a key competitive differentiator for Intel Foundry. Position Summary MDCE is seeking a Staff Chemical Mechanical Planarization (CMP) Engineer to drive module ownership and technical leadership across Intel's most advanced logic technologies (18A, Intel 3, Intel 12nm). This role requires a seasoned professional who can navigate the complexities of process development, cross-node standardization, and high-volume manufacturing readiness while delivering exceptional results for both Intel products and foundry customers. Core Responsibilities Technical Leadership Process Development & Optimization: Lead CMP process development from concept through HVM implementation across multiple advanced technology nodes Cross-Node Alignment: Drive standardization and best practices across Intel's technology portfolio to maximize efficiency and yield Problem Resolution: Own and resolve complex CMP-related yield and manufacturing issues using data-driven approaches and structured problem-solving methodologies Strategic Execution Customer-Centric Delivery: Align technical strategies with customer requirements and business objectives, ensuring on-time delivery of robust solutions Technology Transfer: Bridge technology development and manufacturing

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description Summary The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM). This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements. The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle. Key Responsibilities Probe Coverage Strategy & Ownership Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard‑bands. Define, release, and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As RAM Detection (RDA and Metrology) Detection Strategy Senor Engineer/ Principal Engineer at Micron Technology, Inc., you will be collaborating with process, equipment, as well as process integration team, responsible for starting up, developing and optimizing detection to improve product yield, quality, and cost! Responsibilities include working closely with the NAND and DRAM sites, HVM and TD, and even suppliers, to achieve Inline Visibility and Inline Control for Detection enablement and improvement. This position is responsible in setting up BKM (Best Known Method) related to RAM Detection performance, RAM detection cost and RAM supplier engagement. This position also ensures BKM alignment and deployment, hence RAM Standardization across sites! What’s Encouraged Daily: Lead Detection SWAT (System Workforce Allocation Team) in identifying BKM and strategies to meet Detection goal Lead RAM network in BKM standardization across all sites Develop metrics and KPI to measure success and performance of the team Lead a team of engineers in projects, see opportunities and risks, and find solutions to clear roadblocks. Devise strategy, plans and roadmap for team for short term and long term Apply organizational skill in job assignment and task allocation Prioritize resources in the team to accomplish goals. Maintain good working relationship with partn

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description Summary The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM). This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements. The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle. Career Growth & Impact Direct ownership of probe strategy and quality outcomes across the product lifecycle. Exposure to advanced technology nodes, customer‑driven requirements, and large‑scale manufacturing systems. Clear growth paths across senior technical contributor, product leadership, or people management tracks within STPG Product Engineering. <

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a DRAM and Emerging Memory Quality and Reliability Assurance (DEMQRA) High Bandwidth Memory (HBM) Engineer at Micron Technology, Inc., your primary responsibility will be establishing quality criteria and monitoring quality indices based on FE and BE signals from NPI to high-volume manufacturing (HVM). You will define, lead and drive key action to bring Micron product quality to be the best in class and to prevent quality and reliability related issues from repeat occurrence. Meanwhile, you will involve in developing and supporting qualification stress flows and characterization for HBM and other high performance memory solutions. You will be driving the following: Collaborate with collaborators to define, deploy and monitor outgoing quality and reliability (OQR) metrics based on FE and BE production signals as well as reliability test results Partner with package development engineer and product engineer on latest products and technologies to define quality and reliability fail modes Proactively work to evaluate, characterize, and mitigate Quality and Reliability risks and fail modes for BE new products and HVM Collaborate with MFG Quality Assurance and Quality Engineer teams to improve QR fail mode list for HVM products. Engage with key teams to set and validate OQR specifications and address recognized and potential Quality and Reliability issues Dispo deviation material based on production signals and reliability test results with quick turnaround ti

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The PFA & EFA Technician will provide comprehensive Electrical Failure Analysis (EFA) and Physical Failure Analysis (PFA) support for products across NPI, qualifications and high-volume manufacturing (HVM). A key part of this role is the disposition of maverick material triggered by the Statistical Bin Limit (SBL) system—using data-driven evaluation, structured troubleshooting, and effective collaboration with cross-functional partners. You will collaborate closely with key stakeholders to identify failure signatures, determine root cause and failure mechanisms, recommend lot disposition, and partake on continuous improvement to reduce and improve SBL fail rates. This position requires keen technical curiosity, disciplined execution, clear communication, and strict adherence to lab safety and quality systems in a fast-paced production environment. Key Responsibilities 1) Maverick Lot Disposition via SBL System & Deviation Management Extract, interpret, and analyze test data to support SBL-triggered investigations. Execute and follow up on FA actions (EFA and/or PFA) to determine disposition paths. Recommend and communicate lot dispositions clearly and timely to stakeholders for quality

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Technology Development Planning is where we keep complex programs moving fast and on track. We connect capacity, tools, and people to create the space teams need to learn and deliver. Our work directly shapes execution speed, risk reduction, and how smoothly development runs inside manufacturing! This role leads area‑level planning to ensure technology development stays on schedule and scales smoothly into high‑volume manufacturing. You’ll partner closely with process, equipment, and HVM teams to manage risk, guide smart capital decisions, and keep TD material flowing reliably through the fab. Responsibilities: Lead area planning to manage capacity, cycle time, and WIP for TD programs Identify and solve systemic issues impacting equipment efficiency and learning pace Partner with equipment, process, and HVM teams to assess risk and define mitigations Drive data‑based operational planning and scenario analysis for critical timelines Represent TD planning in cross‑functional and leadership forums Minimum Qualifications: Bachelor’s degree or equivalent practical experience Strong understanding of fab flow, process areas, and manufacturing systems Experience leading projects and driving execution across teams Ability to analyze data and make independent, prioritized decisions Strong communication and stakeholder alignment skills

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks: Lead HVM photo/overlay metrology yield, quality, productivity, and cost improvement initiatives Resolve complex photo/overlay metrology issues through data ‑ driven root ‑ cause analysis Define and deploy photo/overlay metrology Best Known Methods (BKM) across fabs for HVM and NPI Act as the technical point for cross-fab, complex photo/overlay metrology customer concerns Drive MOR–POR gap closure and cross ‑ fab/node alignment in collaboration with internal teams and suppliers Influence key suppliers and represent OCT in reviews, workshops, and governance forums Job Requirement and Qualifications: BS/MS/PhD in Electrical Engineering, Physics, Materials Science, Chemical Engineering, or related field 5&#43; years (Senior) or 8&#43; years (Principal) experience in semiconductor photolithography in NPI/HVM manufacturing Strong hands-on experience in photo/overlay metrology engineering (yield, quality, productivity, cost improvement) Proven experience in solving challenges involving overlay, CDU, metrology, reticle correction, MMM, destack, and yield matching Experience defining and deploying Best Known Methods (BKM) across tools, nodes, or fabs Ability

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Boise High-Volume Manufacturing (HVM) fab is at the leading edge of DRAM technology, driving sophisticated semiconductor innovation through EUV lithography. We operate in a fast-paced, data-driven manufacturing environment focused on achieving extraordinary yield, process capability, and operational excellence while maintaining strict safety and contamination-control standards. For this great opportunity as an EUV Photolithography Engineer, you will lead the development, optimization, and sustainment of EUV processes and scanner performance critical to advanced DRAM nodes. You will be responsible for ensuring process stability, improving yield and throughput, and driving continuous improvement through data analysis, multi-functional teamwork, and sophisticated process control techniques in a high-volume manufacturing environment. Responsibilities Own EUV lithography processes and scanner fleets, ensuring stable high-volume manufacturing performance through SPC monitoring, overlay/CD optimization, defectivity reduction, and tool matching. Lead rapid response to process excursions, including containment, root-cause analysis, wafer disposition, and implementation of corrective and preventive actions (CAPA). Collaborate with Operations, Equipment Engineering, Integration, and Metrology teams to align on production priorities, resolve risks, and optimize cycle time, capacity, and output. Drive continuous improvement of process capability, yield, and equipment productivity using sophist