Layout Designer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a DRAM Design Engineering Group at Micron Technology, Inc. you will be responsible for translating schematics into layout used for the creation of fabrication reticules. You will be required to meet all engineering and process related criteria needed for an assigned DRAM product. You will organize and prioritize logistics and resource allocations to meet scheduled deadlines, and proactively develop methodologies for issue resolution. In this role you will work with Design and other engineering groups to apply multiple layout techniques for the design and verification of digital and analog circuits. You will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tapeout processes and procedures. Responsibilities: Responsible for Design and development of IP layouts used in DRAM chips. Perform layout verification like LVS/DRC/EM, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/breakthroughs in multiple project environment. Contribute to effective project-management. Plan and detail your layout, presenting material for global teams to review Optimally connect with engineering teams in India, Japan the US, and other global teams to ensure the success of the layout project. Minimum Qualifica

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Location F10N Department Fab 10 Strategic Planning Project Title Enabling MSH Probe Ramp Through AI-Driven Layout Planning and Process Automation Project Description The intern will undertake a project focused on optimizing layout planning for the MSH probe manufacturing ramp. Under engineer guidance, the intern will evaluate planning workflows, conduct site assessments, and develop AI-Enabled solutions that improve planning accuracy, productivity, and decision-making. The project includes collaboration with Layout Engineering, Industrial Engineering, Production, and other stakeholders. Objective of the Project Improve layout-planning efficiency and standardization. Develop an AI-Enabled solution for a selected planning workflow. Reduce manual effort and accelerate planning decisions. Apply responsible AI practices to engineering information and workflows. Opportunities for Full Time Employment Interns may be considered for future internship or full-time employment opportunities based on business needs, role availability, academic completion, and demonstrated capabilities. Project Scope</b

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description: For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are looking for Layout Design engineer at our Micron Technology’s HBM Team in Guadalajara, Mexico. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Responsibilities: Design and development of analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Will bee leading planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Effectively communicating with Global engineering teams to assure the success of layout project. Minimum Qualification: 5&#43; years of experience in analog/custom layout design in advanced CMOS process, in various technology nodes (Planar, Fin

Staff Engineer - Analog Layout — Bengaluru, India. Apply via Workday.

STAFF ENG-HIG-HBM-LAYOUT — Hyderabad - Phoenix Aquila, India. Apply via Workday.

Staff Engineer - Analog Layout — Bengaluru, India. Apply via Workday.

NCG Pathfinding Design Layout Engineer — Jalisco, Mexico. Apply via Workday.

Pathfinding Senior Design Layout Engineer — Jalisco, Mexico. Apply via Workday.

Pathfinding Senior Design Layout Engineer — Jalisco, Mexico. Apply via Workday.

SENIOR ENGINEER HBM LAYOUT — Jalisco, Mexico. Apply via Workday.

STAFF Engineer -DEG Layout — Bengaluru, India. Apply via Workday.

STAFF ENG-HIG-HBM-LAYOUT — Jalisco, Mexico. Apply via Workday.

STAFF Engineer -DEG Layout — Bengaluru, India. Apply via Workday.

Sr AMS Layout Engineer-DPG-LPDDR — Hyderabad - Phoenix Aquila, India. Apply via Workday.

Pathfinding Senior Design Layout Engineer — Jalisco, Mexico. Apply via Workday.