Methodology Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron Boise, we are undergoing a historic $15B investment in semiconductor manufacturing, with DRAM production planned for the second half of the decade. We are looking for engineers who want to help drive innovation and operational excellence in advanced memory manufacturing. As an Implant Equipment Engineer , you will own the reliability, performance, optimization, and sustainment of ion implantation equipment supporting high-volume manufacturing. You will partner closely with process, integration, yield, manufacturing, and vendor teams to ensure robust tool performance, equipment availability, and safe execution in a fast-paced fab environment. Responsibilities Own ion implantation equipment performance and sustainment, including tool health metrics, maintenance strategies, and operational standards Drive equipment uptime, reliability, and defect reduction through data analysis, SPC, and structured root cause methodologies Lead equipment change reviews, risk assessments, qualifications, and implementations for new tools, upgrades, and hardware improvements Collaborate with process engineering, integration, manufacturing, and vendors to align equipment capability with production requirements Improve equipment productivity and operational efficiency through innovative automation, monitoring, and predictive maintenance solutions Minimum Qualifications Bachelor’s or Master’s degree in Engineering (Mechanical, Electrical, Chemical, Materials, Physics, or related fiel

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron Boise, we are part of a historic $15 billion investment to expand one of the world’s most advanced semiconductor manufacturing sites. As a leader in memory and storage innovation, we are building the future of DRAM technology while creating opportunities to solve complex engineering challenges in a collaborative, fast-paced environment. As a Vapor Etch Process Engineer, you will develop and optimize critical vapor-phase cleaning and etch processes that enable advanced DRAM manufacturing. Unique to Micron, vapor etch is integrated within Wet Process Engineering, offering the opportunity to work across both wet chemistry and gas-phase surface reactions while partnering with equipment, integration, and yield teams to drive manufacturing excellence. Responsibilities: Own and optimize vapor etch process modules to support high-volume manufacturing Develop, qualify, and maintain processes on single-wafer vapor etch platforms Drive defectivity reduction and improve process performance through data-driven analysis Perform root cause investigations using SPC, FDC, FMEA, and 8D methodologies Partner with equipment and integration teams to improve yield, cost, productivity, and process stability Minimum Qualifications: BS or MS degree in Engineering or equivalent industry experience 2+ years of direct vapor etch process experience in semiconductor manufacturing Experience owning semiconductor manufacturing processes in a high

Job Details: Job Description: The Role and Impact As a Product Failure Analysis Engineer at Intel, you will play a vital role in identifying and resolving product issues to enhance performance, quality, and reliability. You will conduct comprehensive failure analyses and collaborate with cross-functional teams to develop innovative solutions that improve product yield and reliability. Through your efforts, you will directly impact Intel's ability to deliver world-class technologies. Business group The role is part of Intel Corporation's Product Quality and Reliability organization, which focuses on ensuring Intel's products meet the highest standards of quality and reliability. This group supports Intel's mission by driving improvements in product performance, enhancing manufacturing processes, and advancing technology innovation. Key Responsibilities Perform failure analysis and root cause investigation on Intel products, including CPUs, SoCs, and AI interface graphic platforms. Conduct failure analyses to identify defects and recommend corrective actions to design, fab, assembly, and test teams to improve product reliability. Develop and refine failure analysis methodologies, tools, and processes to enhance efficiency and accuracy. Collaborate with cross-functional teams to implement process improvements and innovative solutions for future technologies. Maintain and optimize Failure Mode and Effects Analysis (FMEA) and control plans throughout product lifecycles. Support new product launches, enabling technology transfers and toolset improvements across Intel sites. Qualifications: Minimum Qualifications Bachelor's or Mas

JLL empowers you to shape a brighter way . Our people at JLL are shaping the future of real estate for a better world by combining world class services, advisory and technology for our clients. We are committed to hiring the best, most talented people and empowering them to thrive, grow meaningful careers and to find a place where they belong. Whether you’ve got deep experience in commercial real estate, skilled trades or technology, or you’re looking to apply your relevant experience to a new industry, join our team as we help shape a brighter way forward. About JLL Work Dynamics: Work Dynamics at JLL offers comprehensive workplace solutions designed to optimize the productivity, efficiency, and employee experience within organizations. Combining data-driven insights with innovative technologies, Work Dynamics assists businesses in creating tailored workplace strategies that align with their unique goals and objectives. By leveraging JLL's expertise in workplace strategy, space planning, change management, and workplace technology, the Work Dynamics team brings together the physical, digital, and cultural aspects of the workplace to drive employee satisfaction, collaboration, and overall business success. What the job involves: We are currently seeking a Summer 2027 Intern in Public Institutions Advisory to join our team. In this role, you will learn real estate valuation methodologies, strategic advisory for public sector clients, and comprehensive market analysis techniques. As a Summer Intern in Public Institutions at JLL, you will: • Analyze complex real estate portfolios : Evaluate development opportunities, asset portfolios, and operations for public institutions to determine highest and best use, market values, and advise on strategic initiatives • Develop financial models and valuations : Use valuation methodologies, research, an

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Design and maintain standard cells layout for new DRAM products on new technology Lead the stdcells layout projects from initial spec definition to till PPA qualified library release Closely collaborate with DTCO team to develop stdcells architecture for emerging technologies Perform layout verification like LVS/DRC/Latchup, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Guide junior team-members in their execution of Sub block-level layouts & review their work. Contribute to effective project-management. Develop new flows/methodologies to reduce the stdcells manual effort & increase the productivity Closely work with the Process team, CMOS and CAD to negotiate drc for new technology. Co-work with international colleagues on developing new flows and tools for stdcells layout & design Leverage AI tools to automate the tools and workflow Use AI-assisted workflows to improve design productivity About Micron Technology, Inc. We a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to ESD Architecture Leadership & Strategy Define and own ESD architecture and protection strategy for high-speed I/O portfolios including: HBM (High Bandwidth Memory) / DDR / LPDDR PHY I/Os PCIe, USB, Ethernet, MIPI, and proprietary interfaces Lead ESD–I/O co‑design trade‑off decisions, balancing: Aggressive ESD targets (HBM / CDM / MM).Ultra‑low capacitance and leakage requirements Eye margin , jitter , bandwidth , return loss, and impedance matching Drive architectural choices for: Snapback clamps, rail clamps, diode steering networks. Triggered and advanced ESD devices (technology‑dependent). Domain isolation and sequencing protection for sophisticated SoCs Advanced Circuit Design, Modeling & Signoff : Perform and guide ESD circuit design and analysis at block and full‑chip level. Establish simulation methodologies for: Transient ESD stress (TLP‑equivalent behavior). Dynamic clamp triggering and current handling. I/O performance impact (cap loading, ringing, overshoot/undershoot. Own ESD modeling correlation: Work with device/modeling teams on compact models (dynamic R, triggering, CV behavior). Drive correlation between SPICE simulations, TLP/VF‑TLP, and silicon results. Act as the final technical authority for ESD Design reviews and signoff. Silicon Debug, Reliability & Qualification Ownership : Lead silicon-l

Job Details: Job Description: Shape the Future of Semiconductor Innovation at Intel Foundry Organization Overview Manufacturing Development Customer Engineering (MDCE) is a newly established organization within Intel Foundry Technology Manufacturing and is focused on accelerating technology ramp and manufacturing excellence. Our mission is to seamlessly transition cutting-edge technologies from development to high-volume production while making technology ramp a key competitive differentiator for Intel Foundry. Position Summary MDCE is seeking a Staff Chemical Mechanical Planarization (CMP) Engineer to drive module ownership and technical leadership across Intel's most advanced logic technologies (18A, Intel 3, Intel 12nm). This role requires a seasoned professional who can navigate the complexities of process development, cross-node standardization, and high-volume manufacturing readiness while delivering exceptional results for both Intel products and foundry customers. Core Responsibilities Technical Leadership Process Development & Optimization: Lead CMP process development from concept through HVM implementation across multiple advanced technology nodes Cross-Node Alignment: Drive standardization and best practices across Intel's technology portfolio to maximize efficiency and yield Problem Resolution: Own and resolve complex CMP-related yield and manufacturing issues using data-driven approaches and structured problem-solving methodologies Strategic Execution Customer-Centric Delivery: Align technical strategies with customer requirements and business objectives, ensuring on-time delivery of robust solutions Technology Transfer: Bridge technology development and manufacturing

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is a global DRAM leader whose innovative builds push the boundaries of future semiconductors. We seek a dynamic BEOL Process Integration Expert with proven experience in developing, transferring, and optimizing advanced DRAM technologies. Our team enjoys solving complex integration challenges and improving yield, reliability, and manufacturability. Known for technical leadership, strategic vision, and passion for semiconductor advancement, this role suits ambitious and determined candidates eager to make a big impact. Responsibilities In this role, you will need to have strong semiconductor Process Integration skills in an R&D department. You will be developing the future generation DRAM technologies. This position is intended to be part of Micron's Technical Leadership Program (TLP). This is a career path for individuals seeking to advance as technical leaders and industry innovators. TLP members are expected to influence, lead, and mentor others. Define and implement BEOL process flows, build rules, and specifications for advanced DRAM products. Lead troubleshooting and resolution of complex integration issues spanning multiple modules and fields. Drive yield improvement and reliability enhancement initiatives using data-driven methodologies. Coordinate technology transfers, ensuring robust process qualification and rapid ramp to high-volume manufacturing. Engage in industry benchmarking and collaborative projects to maintain te

NVIDIA's GPUs and SOCs are the world leaders in power, performance and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in the world through their contributions! This position will collaborate with Technical Package Lead and different design teams in the design and development of sophisticated, detailed layout of IC substrates for NVIDIA products. In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical design issues. What you'll be doing: As part of a Layout team, you will collaborate to implement high speed/density ASIC packages. Perform substrate breakout patterns for ASIC packages. Optimize package pinout incorporating system level trade-offs of pins assignment. Help perform package routing, placement, stack-up, reference plane and power distribution using Cadence APD or SiP tool suite. Propose layout design trade-offs to the Technical Package Lead for resolution and implementation. Conduct design feasibility studies to evaluate the Package design goals for size, cost, and system performance. Develop symbols and CAD library databases using Cadence APD design tools Develop methodologies to improve layout productivity What we need to see: Hold a B.S. Electrical Engineering or equivalent experience 5+ years experience in PCB Layout of graphics cards, motherboards, line cards or other related technology. Experience with HDI designs is a plus Proven experience in substrate layout of wire bond and flip chip packages, preferred Significant background with Cadence AP

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, our vision is to transform how the world uses information to enrich life. Our commitment to people, innovation, tenacity, collaboration, and customer focus enables us to deliver leading memory and storage solutions that power artificial intelligence, data centers, mobile devices, automotive applications, and other emerging technologies. The DRAM Lithography team develops and optimizes advanced photolithography processes tha t support current and future semiconductor manufacturing technology. As a DRAM Lithography Intern, you will contribute to projects focused on advancing next-generation semiconductor manufacturing processes. You will collaborate with engineers across Photolithography, Metrology, Dry Etch, Wet Process, and other process areas to develop innovative solutions for process optimization and technology development. During the internship, you will complete one or more technical projects with opportunities to apply AI and data-driven approaches to complex manufacturing challenges. Responsibilities Design and execute experiments (DOE) to optimize photolithography processes, including EUV lithography, photoresist performance, and related process technologies. Plan, run, and document experiments in a semiconductor cleanroom environment using advanced process equipment. Analyze process images and manufacturing data using commercial and in-house software tools, including AI-enabled methodologies where appropriate. Support projects focused on photolithography simulations, process window opti

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron in Boise, ID, we are investing $15 billion in semiconductor manufacturing, a historic initiative. As a global leader in memory and storage innovation, we drive information into intelligence that encourages the world to learn, communicate, and progress faster than before. We are looking for hardworking individuals to join our expansion team and contribute to growth and innovation in the semiconductor industry. As a High-Volume Manufacturing Shift Process Engineer, you will be a part of a world-class team supporting our critical high-volume manufacturing ramp. In this role you will drive operational excellence, maintain process stability, improve yield, and increase manufacturing output. Collaborating with equipment engineers, shift operations teams, process owners to quickly resolve issues, you will also help implement continuous improvements and ensure manufacturing goals are met safely and efficiently. This is a shift position rotating 3-4 days off a week. Responsibilities: Monitor and optimize manufacturing processes to improve yield, quality, efficiency, and overall equipment efficiency while supporting area benchmarks and wafer output goals. Analyze process performance using Statistical Process Control (SPC), Fault Detection and Classification (FDC), Design of Experiments (DOE), and other engineering methodologies to identify trends, resolve excursions, and drive detailed problem solving. Lead issue resolution activities by identifying, escalating, and addressing process

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Senior/Staff ESSD Validation Engineer at Micron Technology, Inc., you will be responsible for validating Micron NAND-based SSD systems and solutions by developing test strategies, test plans, test cases, and automation frameworks that ensure industry-leading product quality and reliability. You will work closely with firmware, hardware, systems, product engineering, and customer teams to verify SSD functionality, performance, interoperability, and customer qualification requirements. The ideal candidate will possess strong knowledge of SSD architecture, NVMe/PCIe technologies, storage systems, and validation methodologies, along with a passion for automation and AI-enabled engineering practices. You will play a critical role in accelerating validation efficiency, improving product quality, and supporting customer success through innovative test solutions and data-driven decision-making. Key Responsibilities Define and execute validation test plans, test cases, and automation content for SSD firmware validation. Develop and maintain automated test scripts covering functional, system-level, performance, reliability, and customer qualification requirements. Validate SSD firmware against NVMe, PCIe, OCP Cloud SSD, and customer-specific specifications. Work closely with firmware, hardware, and system engineering teams to identify, debug, and resolve product issues. Analyze test results, identify product quality risks, and provide recommendations to st

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of the Heterogeneous Integration Group within Technology and Products, where we build High Bandwidth Memory solutions that power AI and ML platforms. Our team works at the edge of what’s possible, stacking and integrating advanced silicon technologies to deliver industry‑leading bandwidth, density, and power efficiency. We move fast, solve hard problems, and set technical direction others follow! This role sits at the center of next‑generation HBM development. As a senior SI/PI technical authority, you will shape system‑level decisions that directly impact performance, reliability, and scalability across multiple product generations. If you enjoy deep technical ownership, complex problem solving, and influencing architecture from concept to sign‑off, this role offers both challenge and impact. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Lead signal integrity channel analysis for 2.5D and 3D silicon interposers, including frequency‑ and time‑domain evaluation Define and drive power delivery architecture, impedance targets, and transient analysis Perform electromagnetic extraction and modeling across PCB, package, and interposer designs Establish SI/PI standards, methodologies, and sign‑off criteria for HBM system designs Provide clear technical direction in ambiguous or incomplete design environments Minimum Qualifications: 7 years of experience in

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks: - PTS (Probe To Ship) yield enhancement to meet BP/LPI target - PTS detractors debugging and improvement actions control - Burn quality ARH/ABI/ABL monitoring, debug and improvement - module HMB1/QMON dpm improvement - Product grade improvement - RMA handling and drive CAPA solutions - product reliability improvement - New product qualification - Qual/QS sample health monitoring and tracking - Wafer outgoing inspection handling and engineering improvement - Global MRB case analysis and handling AI Relevant Job Responsibilities: - Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. - Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. - Ability to apply baseline digital fluency and role ‑ appropriate AI literacy to use AI ‑ enabled tools responsibly and effectively for research, analysis, content creation, problem ‑ solving, operational tasks, and achieving business - Leverage data analytics, automation, and AI solutions to improve engineering productivity and quality monitoring effectiveness. - Develop predictive monitoring methodologies to proactively dete

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Project Title Diffusion Capacity Optimization Through Constraint Workstation Improvement Project Description This internship provides an opportunity to work on projects focused on improving capacity and operational efficiency within the Diffusion manufacturing area. The intern will analyze manufacturing data, evaluate workstation performance, investigate recurring production constraints, and develop recommendations to improve equipment utilization, manufacturing throughput, and cycle time performance. The project will provide exposure to manufacturing engineering methodologies, capacity management, statistical analysis, and cross-functional collaboration within a semiconductor manufacturing environment. Objective of the Project Analyze Diffusion manufacturing performance and capacity utilization. Identify workstation constraints that impact throughput and cycle time performance. Investigate key sources of capacity loss and evaluate improvement opportunities. Develop data-driven recommendations to improve operational efficiency and manufacturing performance. Opportunities for Full Time Employment Successful interns who demonstrate strong analytic