Methodology Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join the world-class team at Micron, where we drive technology development and innovation in memory and storage solutions. As a Senior/Staff Device Characterization Engineer in Micron, you will drive technology development by being accountable for electrical device-level measurements on groundbreaking memory and storage solutions. In addition, you will leverage your subject matter expertise to enable test frameworks and propose methodologies to characterize novel/advanced devices. You will utilize your semiconductor instrumentation know-how to debug & resolve measurement related issues and perform device data analysis to summarize results for the customers. In this role you will partner with engineering teams from process integration, process development, design, product, and quality & reliability. Responsibilities will include Setup and perform measurements for several device flavors. Analyze and optimize the technology behavior including statistical analyses of the measured data from early technology lots and wafers. Leverage device background and measurement expertise to solve device problems. Track and improve the specifications through the different stages of the technology maturity. Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal req

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities As a Principal Engineer, Dry Etch Tool Installation Qualification for OCT, you will be considered an area domain expert in Dry Etch and will work as a site partner with Micron FABs globally and supplier partner with suppliers. Understand short-term and long-term Cost goals within Front End and ensure alignment to corporate business goals. Initiate and drive multi-functional programs to achieve department business goals Facilitate the definition of program scope, goals, work, timeline and resource requirements in collaboration with sponsors and partners Manage the definition, refinement, and implementation of core methodologies and tools for business process including reporting Collaborate with project teams to understand the business value of projects and programs in place and how they contribute to BIC plan. Provide program and project performance updates periodically with communication across functional groups. Ensure strategic roadmaps with important measures for Schedule and Cost are developed, maintained, and tracked to latest BIC targets. Lead and continuously improve the TIQ business processes, continual improvement project and BKM alignment. Prioritize and lead numerous projects based on Fab and corporate objectives. Move projects effectively through project lifecycle – definition, planning, implementation, acceptance and review. Facilitate and drive global peer groups to align strategy and roadmap to achieve area o

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Summary As an RDA.Metrology Equipment Maintenance Shift Engineer at Micron, you will play a crucial role in a top-notch team dedicated to improving excellence in semiconductor manufacturing. This unique opportunity allows you to: - Participate in a cooperative atmosphere where your efforts have a direct influence on the quality, reliability, and performance of the product. - Lead ambitious initiatives in yield improvement, cost reduction, efficiency enhancement, and risk mitigation. - Apply proven methodologies such as failure analysis, FMEA, 8D, and SPC to identify and resolve process-related challenges. - Implement and coordinate process, equipment, and material evaluations to drive continuous improvement across manufacturing steps. - Manage new process qualifications and collaborate with suppliers to ensure alignment with our quality, cost, and sustainability goals. Different outlooks are highly respected, and we encourage candidates from a range of backgrounds to apply. If you are enthusiastic about solving complex problems and driving meaningful change, we are excited to consider your application. In the position of RDA.Metrology Equipment Maintenance Shift Engineer, you play a key role in ensuring the flawless operation and dependability of brand new semiconductor equipment. Your duties encompass: - Diagnosing and resolving equipment issues through proactive troubleshooting and

A Career with Point72's Technology Team As Point72 reimagines the future of investing, our Technology team is constantly evolving our firm’s IT infrastructure and engineering capabilities, positioning us at the forefront of a rapidly evolving technology landscape. We’re a team of experts who experiment and work to discover new ways to harness open-source solutions, modern cloud architectures, and sophisticated Artificial Intelligence (AI) solutions, while embracing enterprise agile methodologies. Our commitment to building and innovating in the AI space provides the framework intended to drive smarter decision making and enhance how we build and operate our platforms and applications. As a member of Point72’s Technology team, we encourage and support your professional development from day one—helping you advance your technical skills, contribute innovative ideas, and satisfy your own intellectual curiosity—all while delivering real business impact for our multi-billion-dollar global business. What you'll do As a software engineer, you will help build the next generation of data infrastructure at the firm—thinking holistically about systems across APIs, data models, cloud infrastructure, and user experience. As demand for direct data access, enriched datasets, and AI-powered workflows grows, you will help create a unified, enterprise-grade data platform with clear ownership, shared standards, and the organizational structure to deliver trusted data at scale. Specifically, you will: Build and maintain agentic workflows and tooling that leverage large language models Define the service contracts, data models, and integration patterns that will serve as future firmwide standards for data access Build high-impact, enterprise-grade data services and pipelines that support research, trading, and AI projects across the firm Ensure backend systems are reliable, observable, and performant at scale Containerize services and orches

Job Summary Reporting to the Memory Validation leadership team, the Senior Silicon DDR/HBM Validation Engineer will be responsible for the bring-up, validation, characterization and debug of advanced memory subsystems used in next-generation AI compute platforms. The role will focus on DDR and HBM technologies, working closely with silicon design, firmware, characterization, platform and systems teams to ensure robust memory subsystem functionality, performance and reliability. The successful candidate will take ownership of significant validation activities, contribute to debug and root-cause analysis efforts, and help improve validation methodologies, automation and infrastructure. The Team The Memory Validation team sits within the Validation organisation and is responsible for the bring-up, validation, characterization and debug of memory subsystems across Graphcore silicon and platform products. The team supports DDR and HBM validation activities throughout the product lifecycle, from first silicon through production readiness. Engineers work closely with architecture, RTL, firmware, characterization, systems and platform teams to ensure memory technologies meet functionality, performance, reliability and performance objectives. Responsibilities and Duties Execute validation and bring-up activities for DDR and HBM memory subsystems Verify memory bring-up software, firmware and scripts against defined project requirements Debug firmware, hardware and system-level issues and contribute to root-cause analysis activities Analyse system logs, validation data and characterization results to identify failures and performance issues Perform PHY characterization and analog-level analysis during stress testing and validation activities Develop and execute functional, stress, performance and corner-case validation tests Perform signal integrity, voltage, frequency and timing measurements using laboratory instrumentation Char

 Manage site security operations in harmony with business objectives and Security Strategy Roadmap at major sites  Protect enterprise wide infrastructure to ensure business continuity, creating a safe environment for all employees and stakeholders and ensuring enhanced security and personal safety of “designated protectees”  Address fraud & misconduct through a well-established framework to prevent, detect, respond, and refine strategies and methodologies.  Identify potential threats and calibration of risks from detailed security risk assessments to eliminate, reduce or mitigate risks.  Responsible for ensuring security and protection of tangible and intangible assets, at the site  Responsible for managing security related automation and infrastructure projects Source: Adani Group | Job ID: 52925

About the Team: OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. Role Overview We are seeking a Package Reliability Engineer to lead reliability engineering for advanced packages used in high-performance AI and computing systems. The primary focus of this role is to assess package level mechanical and thermal reliability risks and apply thermal and mechanical modeling to optimize package design, material selection, and assembly processes. The engineer will also develop reliability test plans with external partners, identify failure mechanisms, perform root-cause analysis, and recommend practical corrective actions. In this role, you will assess package reliability risks from early architecture development through product qualification and high-volume manufacturing. You will work closely with package design, silicon design, system engineering, manufacturing, and ASIC partners to predict package behavior, develop qualification strategies, resolve reliability issues, and improve overall package robustness and lifetime. In this role you will: Lead reliability test plan and assessments for advanced HPC packages, including risk identification, potential failure-mechanism analysis, root-cause investigation, mitigation planning, and corrective-action development. Drive reliability-focused package design optimization based on thermo-mechanical modeling to improve package reliability, power integrity, thermal performance, mechanical robustness, and platform scalability. Develop, validate, and apply package reliability models and lifetime-prediction

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We're seeking a Security Engineer to join our First-Party Hardware team. In this role, you will own the end-to-end security foundation for OpenAI's first-party AI hardware systems, working across hardware security, embedded security, system security, and practical deployment at data center scale. You will partner with silicon, hardware, firmware, infrastructure, manufacturing, operations, and security teams to define and deliver system-level device trust. This includes boot integrity, device identity, provisioning, attestation, management-plane security, storage encryption, debug controls, firmware update and recovery, RMA, and decommissioning. You will be accountable for turning threat models into requirements, requirements into implementation, and implementation into validation evidence that can support launch decisions. Location: San Francisco, CA (Hybrid: 3 days/week onsite) Relocation assistance available. In this role, you will: Own security requirements, threat models, validation strategy, and launch-readiness evidence for first-party hardware platforms from early design through production deployment. Design and review secure boot, measured boot, roots of trust, platform firmware resilience, firmware signing, recovery, and anti-rollback strategies across heterogeneous devices. Own device identity, provisioning, enrollment, attestation, certificate lifecycle, and key-management requirements across manufacturing and data center bring-up. Harden management

About the Team OpenAI Finance is responsible for ensuring the organization is set up for success in pursuit of its mission to ensure that artificial general intelligence benefits all of humanity. The Controllership team delivers the financial truth that powers OpenAI’s growth. By translating operational activity into accurate, timely, and decision-grade financial data, we enable leadership to scale the business with confidence. Our commitment to rigorous controls and best-in-class systems ensures financial integrity as OpenAI grows. About the Role We are seeking a strategic and execution-oriented Inventory & Cost Accounting Lead to build and scale manufacturing accounting and product costing capabilities across consumer hardware and robotics businesses. This role partners closely with Finance, Supply Chain, Manufacturing Operations, Technical Accounting, Strategic Finance, and Systems teams to establish scalable costing methodologies, inventory valuation processes, manufacturing close procedures, and reporting infrastructure supporting rapid growth and product launches. The ideal candidate brings deep experience in consumer hardware manufacturing environments, including standard costing, inventory accounting, variance analysis, contract manufacturing, and ERP operationalization — particularly within Oracle Fusion. This person should thrive in ambiguity, balance strategic thinking with operational execution, and possess the executive presence and judgment to influence cross-functional stakeholders and senior leadership. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Manufacturing Costing & Inventory Accounting Lead product costing and inventory accounting across consumer hardware and robotics programs, including inventory valuation, manufacturing variances, reserves, and close processes. Partner with Supply Chain, Operations, and Str

About the Team: OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are seeking a Manufacturing Test Engineer to own and drive manufacturing test strategy, development, and execution for complex AI hardware systems. This role will define and implement test coverage across the product lifecycle, including ICT, functional circuit test, tray-level functional test, and system manufacturing test. You will work closely with hardware design engineering, diagnostic/software teams, manufacturing engineering, quality, and external system integrators and suppliers to translate product requirements into robust, scalable, and production-ready test solutions. You will also play a key role in reviewing test data, debugging failures, improving yield, and ensuring manufacturing test readiness from early development through volume production. In This Role, You Will: Define and drive the manufacturing test strategy for boards, trays, and system-level hardware assemblies across EVT, DVT, PVT, and production ramp. Develop and manage test coverage for: ICT / structural test FCT / board-level functional test Tray-level functional and integration test System-level manufacturing and bring-up test Partner closely with electrical engineering, system engineering, and diagnostic/software teams to define test requirements, review manufacturing test scripts and diagnostics, validate failure isolation needs, debug hooks, logging, and production screening strategies. Translate engineering requirements into practical, scalable manufacturing test plans that

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. About the Role We are looking for a passionate and innovative ATE Test Engineer to design and deliver cutting-edge test solutions for HBM-DRAM devices using modern advanced ATE platforms. In this role, you will lead the development and implementation of test plans, ATE test programs, silicon validation, and test methodologies, while driving multi-site hardware design and development, product characterization, and high-volume production support. Success in this position requires a forward-thinking mindset and the ability to apply the right technologies to meet evolving challenges. Key Responsibilities Develop and implement robust test strategies, plans, and ATE programs for HBM-DRAM devices. Drive silicon validation, characterization, and yield improvement initiatives. Design and debug test hardware, including schematic capture and PCB layout. Collaborate cross-functionally to ensure seamless integration of test solutions into production. Support high-volume manufacturing and troubleshoot complex test issues. Qualifications & Skills Education: Bachelor’s or Master’s degree in Electrical, Electronics or Computer Engineering. Experience: A

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We're seeking a System Software Engineer to join our First-Party Hardware team. In this role, you will design, build, integrate, and validate low-level system software for the manageability and health of OpenAI's first-party AI hardware systems. You will work across BMC, Linux, firmware interfaces, automation infra, boot and recovery, hardware diagnostics, telemetry, host and platform drivers, network software interfaces, and manufacturing and fleet readiness. A major part of this role is owning the acceptance path for partner-delivered system software: defining requirements, reviewing code and artifacts, reproducing builds, building tests, pushing fixes, and producing the evidence needed for launch decisions. This role is hands-on and high-ownership. You will write and review low-level software, debug issues across hardware and software boundaries, build infra and automation to test and manage devices in lab, guide partner deliverables, build validation evidence, and help carry platforms from bring-up through production deployment. Location: San Francisco, CA (Hybrid: 3 days/week onsite) Relocation assistance available. In this role, you will: Design, develop, and maintain low-level firmware and system software for first-party AI hardware manageability, including BMC software, Redfish services, gNMI telemetry, firmware update and recovery flows, BIOS/UEFI interactions, platform drivers, and hardware diagnostics. Own integration and acceptance of partner and ve

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description As a Senior/Staff Product Quality and Reliability Assurance Engineer (PQRA), you will support reliability qualification and quality monitoring of High Bandwidth Memory products (HBM), help develop product reliability methodologies, and respond to product deviations as they pertain to quality and reliability. You will establish and implement requirements, specifications and metrics such as Defects per Million (DPM), Failure in Time (FIT), and Lifetime. In this role, you will work with multi-functional Engineering teams to ensure product reliability methods are established and followed, perform risk assessments, and provide support for manufacturing teams regarding reliability issues. In this dynamic role, you will have opportunities to gain new product knowledge on an ongoing basis! You will: Conduct New Product Qualifications Define High Bandwidth Memory (HBM) qualification requirements Comprehend failures and failure rate within the scope of the qualification Perform risk assessment at all decision points within the qualification cycle Review qualification data and sign off that qualification requirements have been met Issue internal product release notifications for Qualification <

Title: Senior AI QA Engineer Location: Bengaluru (Bangalore) Opportunity: As a Senior AI QA Engineer for our Precision Patient Care Pipeline , you will go beyond traditional functional testing. You will be responsible for building the framework that ensures our clinical insights are accurate, safe, and reliable. This role requires a unique blend of high-level software testing and data engineering to validate complex, non-deterministic medical outputs using a hybrid of automated grading methodologies . Key Responsibilities: Architect Multi-Layered Validation Frameworks: Design and implement structured testing strategies that combine deterministic checks, semantic similarity metrics, and model-based evaluations. Automated Model Grading: Develop systems to evaluate clinical pipeline outputs for faithfulness, safety, and hallucination detection using various automated scoring techniques (e.g., BERTScore, ROUGE, or custom heuristics). Vibe-Driven Development: Leverage agentic AI tools to rapidly prototype complex test harnesses, "red-team" clinical logic, and build internal validation utilities at high velocity. Data Pipeline Integrity: Execute integration and regression tests for data-heavy backend processes, ensuring medical data remains consistent from ingestion to insight generation. Collaborative Strategy: Work closely with Data Scientists and Product Managers to define "Ground Truth" datasets and clinical evaluation rubrics. Root Cause Analysis: Deep-dive into complex system failures to identify whether issues stem from code logic, data drift, or model behavior. Requirements: 6+ years of technical experience in Quality Assurance, with a strong focus on system architecture and backend data validation. Advanced Python Proficiency: Expert-level skills in Python for building custom test scripts and working within AI/ML ecosystems. AI/ML Validation Experience: Proven experience testing model outputs using diverse metrics (e.g., Semantic Similarity, NLP metrics, an

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are seeking an experienced SoC Architect to lead the definition and development of next-generation custom AI silicon for edge deployments. This role will be responsible for shaping the architecture of highly efficient, high-performance SoCs optimized for machine learning inference and on-device intelligence. You will work cross-functionally with internal engineering teams and external ecosystem partners to translate product requirements into scalable silicon solutions, driving execution from concept through delivery. In this role you will: Define the architecture and technical roadmap for custom SoCs targeted for edge applications. Drive system-level tradeoff analysis across compute, memory, interconnect, power, thermal, and cost constraints. Architect energy-efficient ML compute subsystems optimized for inference workloads and real-world deployment environments. Collaborate with internal hardware, software, systems, and product teams to align architecture with platform needs. Partner with external silicon vendors, IP providers, and manufacturing partners to execute development plans. Lead hardware/software co-design efforts to maximize performance per watt and end-to-end system efficiency. Guide implementation teams through microarchitecture, RTL development, validation, and bring-up phases. Operate effectively in agile development environments and help teams deliver against aggressive schedules and milestones. You might thrive in this role if: Proven exper