Methodology Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron Technology, we transform how the world uses information to enrich life for all. The Heterogeneous Integration Group (HIG) HBM Architecture team develops next-generation High-Bandwidth Memory (HBM) solutions that power AI, high-performance computing, cloud infrastructure, and advanced networking systems. The team works across architecture, design, verification, packaging, product engineering, and technology development to evaluate innovative memory architectures and deliver scalable, high-performance semiconductor solutions. As an HBM Design Architect, New College Graduate, you will contribute to the evaluation and development of future HBM and DRAM architectures. Working with experienced architects and engineering teams, you will analyze system and block-level design tradeoffs related to performance, power, area, thermal behavior, reliability, and manufacturability. This role provides an opportunity to leverage AI, Large Language Models (LLMs), and data-driven engineering methodologies to accelerate architecture exploration and improve decision-making. Responsibilities Analyze HBM and DRAM architectures using analytic

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are seeking a Operations Program Manager (OPM) to serve as the single-threaded operational leader for new hardware introductions (NPI) and production ramps across OpenAI’s AI infrastructure systems. This role combines hands-on execution with strategic ownership. You will be responsible for defining the operating model, aligning cross-functional stakeholders, setting the critical path, making informed tradeoffs, escalating decisively, and ensuring hardware programs deliver on schedule, quality, cost, and scalability. Success in this role requires comfort operating in ambiguity, influencing without authority, and driving alignment across internal teams and external partners—while keeping eyes firmly on long-term system scalability and repeatability. In this role, you will: Strategic & Leadership Ownership Act as the single-threaded owner for operational readiness across NPI and ramp, accountable for outcomes from early bring-up through sustained production Translate OpenAI’s infrastructure strategy and engineering objectives into clear operating plans, execution priorities, and decision frameworks Drive alignment across Engineering, Operations, Strategic Sourcing, Finance, Capacity Planning, and Executive stakeholders by framing tradeoffs, risks, and recommendations Proactively identify inflection points where decisions or investments are required to protect long-term scale, reliability, or cost targets Influence operational strategy with manufacturing par

Secure Every Identity, from AI to Human Identity is the key to unlocking the potential of AI. Okta secures AI by building the trusted, neutral infrastructure that enables organizations to safely embrace this new era. This work requires a relentless drive to solve complex challenges with real-world stakes. We are looking for builders and owners who operate with speed and urgency and execute with excellence. This is an opportunity to do career-defining work. We're all in on this mission. If you are too, let's talk. Position Description: You will proactively construct and own an AI-forward research roadmap for key product pillars at Okta, operating at the intersection of Identity, Security, and Artificial Intelligence. As a Staff-level individual contributor, you will drive both qualitative and quantitative methodologies to define user experiences for non-deterministic AI agents, automated workflows, and enterprise platforms. Additionally, you leverage agentic tools and AI workflows internally to scale qualitative coding, synthesis, and research operations across the organization. In this role, you’ll get to: Drive Product-shaping Research: Lead foundational and evaluative research to inform strategic and tactical product decisions. Execute Balanced Mixed-Methods: Drive qualitative depth (contextual inquiry, cognitive walkthroughs) and quantitative rigor (large-scale surveys, behavioral telemetry, statistical modeling) to evaluate AI products. Pioneer AI Research Operations: Integrate AI tools, prompt engineering, and agentic research workflows into your daily practice to accelerate quality research outputs. Lead Cross-Discipline Collaboration: Facilitate research to drive cross-discipline clarity, executive alignment, and decision-making across complex security and admin workflows. Solve Complex Problems: Bring stakeholders together across multiple teams to scope problems and collaborate on research in ways that nurture a culture of curiosity and learning. Cultivate E

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Analyze inline/param/probe/DOE data to identify yield detractors and drive continuous improvement. Apply semiconductor device physics, process knowledge, and statistical tools to troubleshoot yield issues. Collaborate with module engineering teams to diagnose process/tool‑related yield variation and ensure timely resolution. Lead or participate in cross‑functional task forces to solve complex yield, defect, or process integration challenges. Perform root‑cause analysis using FMEA, 8D, SPC, and other structured methodologies. Publish clear Pareto analyses and maintain dashboards for assigned product lines. Support new technology transfer, process baseline setup, and qualification activities. Partner with equipment engineering, shift engineering, and quality teams to address long‑term defect or excursion issues. Conduct material, process, and equipment evaluations and recommend optimization strategies. Ensure product performance meets design and reliability requirements and propose corrective actions when gaps exist. Leverage AI-Enabled and AI-Assisted solutions, including Copilot, YMS Genie, Agentic AI, AI Agents, and Large Language Models (LLMs), to accelerate yield analysis, automate engineering workflows, summarize insights, and enhance diagnostic efficiency. <spa

Firmware Engineer BIOS/UEFI Description - The Firmware Engineer is responsible for ensuring that embedded firmware meets the highest standards of quality, robustness, and long‑term reliability. This role works closely with firmware developers, hardware engineers, architecture teams, QA, and cross‑functional partners to define quality metrics, validate system behavior, improve defect detection, and build processes that prevent regressions. Responsibilities Develop, execute, and maintain comprehensive firmware test plans, including functional, regression, stress, corner-case, and long-duration reliability tests. • • • Evaluates the firmware architecture, design and development plus testing methodologies to create strategy and implement methods to bring increased quality and reliability to the firmware. Reviews firmware code and test plans including functional, regression, stress, corner-case and long-duration reliability tests. Perform root-cause analysis for firmware defects, drive containment, corrective actions, and verification of fixes. Create and manage quality dashboards, KPI, failure rates, and reliability metrics. Evaluate failure modes exposed during design, development, manufacturing and field use; propose design or process improvements to prevent recurrence. Works with product architects, firmware teams, product managers and provides critical guidance, system-level debugging and troubleshooting to various teams, as a Subject Matter Expert. Reviews and evaluates designs and project activities for compliance with systems design and development guidelines and standards; provides tangible feedback to improve product quality and mitigate failure risk. Create and manage quality dashboards , KPIs, failure rates, and reliability metrics. Validate firmware integration with hardware, BIOS/UEFI, EC, micro

At NVIDIA, we push the boundaries of computing innovation. Our ASIC Verification Engineers focus on developing the world’s top SoCs and GPUs. Joining us as a Senior ASIC Verification Engineer - GPU means working on modern technology powering consumer graphics and AI applications. This position is ideal for those passionate about technology and eager to impact computing’s future. What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs. You will be responsible for verifying the ASIC build, architecture, golden models, and micro-architecture using advanced verification methodologies such as UVM or equivalent. Understand the design and implementation of your unit/cluster/chip, define the verification scope, develop the verification infrastructure, and verify the correctness of the design. Collaborate with architects, designers, and pre- and post-silicon verification teams to accomplish your task. What we need to see: Bachelor's Degree in EE, CS, or CE or equivalent experience. 5&#43; years of relevant experience. Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies. Experience with design and verification tools (VCS or equivalent simulation tools, debug tools like Verdi, Indago, GDB). Expertise in System Verilog or similar HVL. Strong debugging and analytical skills. Perl and C/C&#43;&#43; programming language experience desirable. Strong communication skills and the ability & desire to work as a great teammate are huge pluses. Experience in crafting test bench environments for unit and system level verification. #LI-Hybrid Your base salary will be det

NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will help to build the high-performance processor elements that implement programmable compute and graphics functionality. What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs You will be responsible for verification of the ASIC design, architecture, golden models and micro-architecture using advanced verification methodologies such as UVM Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure and verify the correctness of the design Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks What we need to see: Bachelors Degree in EE, CS or CE or equivalent experience 2&#43; years of relevant experience Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies Background with design and verification tools (VCS or equivalent simulation tools, debug tools like Verdi, GDB) Experience crafting test bench environments for unit and system level verification Strong background in System Verilog or similar HVL Expertise with C/C&#43;&#43; programmin

Job Details: Job Description: Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision. Life at Intel: https://jobs.intel.com/en/life-at-intel As a Yield Development Engineer, you will be at the forefront of advancing Intel's cutting-edge process technologies within our Logic Technology Development (LTD) organization. This pivotal role involves identifying root cause yield limiters and driving solutions that enhance manufacturability and yield across technology nodes. You will work within a dynamic, fast-paced environment to ensure the successful introduction of new products, process improvements, and robust methodologies to meet manufacturing goals. Your expertise will directly contribute to Intel's ability to deliver world-class semiconductor solutions and advance the future of computing. About Intel Foundry At Intel, the Foundry Technology Development (TD) unit is the driving force behind Moore's Law, enabling us to create groundbreaking technology that enriches lives globally. With over 15,000 dedicated employees, Foundry TD spearheads innovative research, develops next-generation processes and packaging technologies, and manages high-volume manufacturing in state-of-the-art facilities. Within Intel Foundry TD, our Logic Technology Development (LTD) organization is at the forefront of creating and refining each process technology node, paving the way for tomorrow's computing solutions. Your responsibilities as a Product Yield Development Eng

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The ASIC Validation team plays a critical role in bringing Micron's next-generation silicon products to life by validating and characterizing new devices as they return from fabrication. Working closely with design, verification, and firmware teams, the group develops innovative validation methodologies, automation solutions, and AI-enabled workflows to ensure product quality, performance, and reliability. As an ASIC Validation Intern, you will work alongside experienced engineers to validate newly developed silicon and enhance the validation infrastructure used across engineering teams. This role provides hands-on experience with hardware validation, lab equipment, automation, data analysis, and AI-assisted engineering workflows while contributing directly to the successful bring-up of next-generation ASIC products. Responsibilities Collaborate with validation, design verification, and firmware teams to support silicon bring-up, testing, and validation activities for new ASIC devices. Use laboratory equipment, automation tools, and validation environments to characterize device functionality and performance. Develop or enhance scripts, automation solutions, and AI-assisted workflows to improve validation efficiency, failure analysis, and reporting. Analyze validation results, debug complex issues, and evaluate AI-generated insights while applying sound engineering judgment. Document technical findings, communicate project results, and present recommendations to engineering teams. </

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Micron Technology is a global leader in memory and storage solutions. As a Validation Engineer for DRAM Compute Products , you will be responsible for preparing, executing, and analyzing validation tests to ensure product functionality and reliability. You will work closely with cross-functional teams to identify and resolve silicon issues, expand validation coverage, and contribute to the development of new testing methodologies. Additionally, we require the use of AI tools and methodologies to improve our efficiency and schedule, resulting in overall savings Responsibilities Prepare validation tests and hardware setups for silicon testing. Execute validation tests and analyze results for accuracy and completeness. Categorize and report silicon issues efficiently. Investigate functionality and margin-related test results. Mitigate software and hardware limitations during validation by working with Design teams to assure quality. Report findings confidently to Design and support root cause analysis. Use Artificial Intelligence (AI) to develop tools, improve processes and shorten overall schedule Minimum Qualifications Bachelor’s degree in Electronics or Electrical Engineering or Master’s degree. 2–5 years of relevant experience. Strong circuit-level understanding, including simulation and debugging. Advanced proficiency in C, C&#43;&#43;, and/or Pyth

About Supabase Supabase is the Postgres development platform, built by developers for developers. We provide a complete backend solution including Database, Auth, Storage, Edge Functions, Realtime, and Vector Search. All services are deeply integrated and designed for growth. About the Role We’re looking for a OrioleDB Deployment Engineer to join our OrioleDB Team and help elevate our OrioleDB offering. You’ll work closely with the OrioleDB team, playing an instrumental role in technical decision-making and refining internal methodologies. This role is ideal for someone who thrives in async, fast-paced environments and is excited about building developer tools that scale to millions. What You’ll Be Responsible For Package software into our supabase/postgres repo using Nix (with flakes), and help us transition our packaging from traditional to Nix packaging more over time. Manage OrioleDB release lifecycles, ensuring timely major, minor, and extension upgrades. Expand platform release systems to allow developers to increasingly self-service. Optimize CI/CD and tooling, specifically expanding GitHub Actions, team tooling, and testing/release approaches. Resolve production issues by proactively identifying and fixing problems in customer deployments. Maintain best practices and tests to ensure enhanced stability and decreased deployment risks. co-owning the integration of OrioleDB into the supabase product You Might Be a Good Fit If You Have 3+ years of experience with PostgreSQL and its ecosystem, including extensions and performance optimization. Are an Infrastructure Expert with proven experience in management, tooling, and optimization. Are proficient in the Nix package management system (including flakes) alongside Ansible, Packer, Docker, QEMU/KVM, AWS, and Kubernetes. Have experience building for multiple architectures , specifically Linux and Darwin/macOS aarch64 targets. Are comfortable with polyglot environments , including builds for C/C++, Go, JavaScript, a

A Career with Point72’s Technology Team As Point72 reimagines the future of investing, our Technology team is constantly evolving our firm’s IT infrastructure and engineering capabilities, positioning us at the forefront of a rapidly evolving technology landscape. We’re a team of experts who experiment and work to discover new ways to harness open-source solutions, modern cloud architectures, and sophisticated Artificial Intelligence (AI) solutions, while embracing enterprise agile methodologies. Our commitment to building and innovating in the AI space provides the framework intended to drive smarter decision making and enhance how we build and operate our platforms and applications. As a member of Point72’s Technology team, we encourage and support your professional development from day one—helping you advance your technical skills, contribute innovative ideas, and satisfy your own intellectual curiosity—all while delivering real business impact for our multi-billion-dollar global business. What you’ll do Develop and maintain the information security policy and standards library, aligning it with business priorities, regulatory expectations, and control objectives Lead independent assessments of the information security program, including regulatory examinations and third-party evaluations Identify technology risks across a complex business environment and drive mitigation aligned with our firm’s standards and control expectations Investigate data privacy inquiries and privacy-related events, assess business impact, and coordinate timely response activities Partner with technology, legal, compliance, and business stakeholders to translate risk findings into practical remediation plans Advise control owners on policy interpretation, risk treatment, and evidence expectations for assessments and examinations Prepare clear reports for management on team activity, emerging risks, remediation progress, and key decisions Maintain accurate risk, polic

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for a Rack Power Engineer with deep expertise in high-power conversion and distribution to design, qualify, and support power systems for AI supercomputers. You will own rack power solutions—including power shelves, AC/DC rectifiers, power supply units (PSUs), power management controllers (PMCs), and high-current distribution—from requirements and supplier development through deployment. You will also monitor fleet rack power health, lead debugging and root-cause investigations, and drive improvements into hardware, firmware, and qualification coverage. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Own rack power architecture and requirements for high-power AI supercomputing systems, including power budgets, AC input interfaces, DC distribution, redundancy, efficiency, serviceability, and integration with data center infrastructure. Drive the design and supplier development of power shelves, rectifiers, PSUs, PMCs, busbars, connectors, and protection circuits. Review electrical designs and control behavior, and evaluate performance, cost, reliability, and availability trade-offs. Define and execute component, shelf, and rack qualification plans covering load transients, current sharing, hot-swap, startup and shutdown, redundancy failover, fault protection and recovery, thermal limits, and AC disturbances and ride-through

At Freddie Mac, our mission of Making Home Possible is what motivates us, and it’s at the core of everything we do. Since our charter in 1970, we have made home possible for more than 90 million families across the country. Join an organization where your work contributes to a greater purpose. Position Overview: Are you curious and analytical? Do you thrive on working in a team environment? Are you looking for an inclusive company culture? Freddie Mac’s Single-Family Credit Analytics, Reporting and Decision Strategy group needs creative, forward-thinking individuals like you! We want to hire individuals who seek out complex business problems and develop viable solutions. The Quantitative Analytics Professional position is responsible for ensuring the reasonableness and consistency of statistical models, analytics and methodologies used in decision making in the Single Family guarantee business. Our Impact: Our team serves as the business user for multiple very high- and high-risk models. Our goal is to leverage all available models and tools to facilitate and optimize credit risk management and decision strategies. Our team is responsible for forecasting SF credit losses and enhancing company decision-making with respect to loan acquisition. Your Impact: SF (Single Family) model enhancement - oversight, documentation, and testing of new modeling frameworks Model tracking reports - reviewing and ensuring reports to SF Acquisition division are concise, complete, and transparent Mortgage modeling expertise - understanding default and prepayment modeling frameworks and providing insights Data quality - understanding data relationships and ensuring accuracy Testing and governance - assisting with UAT and model governance processes Qualifications: <

At Freddie Mac, our mission of Making Home Possible is what motivates us, and it’s at the core of everything we do. Since our charter in 1970, we have made home possible for more than 90 million families across the country. Join an organization where your work contributes to a greater purpose. Position Overview: Are you passionate about counterparty credit risk management? We're looking for someone who can navigate complex credit challenges across banks and corporates — identifying, measuring, and managing risk while delivering solutions that are innovative, thorough, and practicable. If that sounds like you, come join our team! You’ll have the opportunity to assess the credit strength of counterparties and perform financial continuous due-diligence activities, while playing an active role in the development of methodologies and related risk reporting on counterparty matters. Apply now and learn why there’s #MoreAtFreddieMac! Our Impact: Our team is responsible for managing Freddie Mac’s counterparty credit risk exposure to Banks and Corporates. Ensure that counterparty risks are adequately evaluated, and that adverse portfolio and/or individual counterparty trends are identified in a proactive manner. Your Impact: Assess on an ongoing basis the creditworthiness of Banks and Corporate counterparties. Assign internal counterparty ratings and document the corresponding rationale similar to a rating agency credit opinion. Conduct due diligence on new counterparty applicants as needed as part of internal approval processes. Develop recommendations for corrective actions to address counterparty non-compliance. Assist in the development and improvement of counterparty eligibility requirements and related policies and procedures. Manage and monitor internal counterparty risk exposures against corporate limits.