Packaging Engineer Jobs

Principal Wet Process Engineer, Advanced Packaging — Boise, ID - Main Site. Apply via Workday.

Principal/Staff, APTD - Advanced Packaging Wafer Level Technology Process Engineer — Fab 10A, Singapore. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Role Summary: We are currently experiencing a ground-breaking period in artificial intelligence (AI), where AI is anticipated to become an integral component of daily life. This proliferation is being fueled by advances in memory and compute technologies. High bandwidth memory (HBM) is at the forefront of these innovations. Micron’s Advanced Packaging Technology Development (APTD) is responsible to deliver package development for high performance memory products and transfer to manufacturing . Your responsibilities include but are not limited to developing and enabling deployment of processes related to the post- fab wafer finishing processes in semiconductor manufacturing to meet performance, cost, manufacturability, quality, reliability and schedule requirements. You will have opportunity to work with peers and partners across organizations to coordinate the development and launch of new technologi

About the Company: Nivagen is a global company devoted to improving lives by developing high-quality, affordable generic prescription drugs and over-the-counter products for the North American market. For over a decade, we have remained committed to our core values of excellence, integrity, and respect for people. Our dedicated team works collaboratively to advance manufacturing, distribution, and quality control, taking a comprehensive approach to healthcare. Through vertical integration of the pharmaceutical supply chain, state-of-the-art technology, and an unwavering focus on excellence, we continually strive to enhance medication accessibility and affordability. We prioritize our employees' well-being by offering competitive pay, comprehensive benefits, and strong training and development programs. By investing in our workforce and nurturing a culture of growth and support, we empower our team to drive innovation and make a positive impact in healthcare. Our mission at Nivagen is clear: to improve lives by providing high-quality, affordable medications while upholding the highest standards of integrity and excellence. As a leader in pharmaceutical manufacturing, Nivagen is committed to producing sterile products that meet the healthcare industry’s rigorous demands. Specializing in the production of vials, pre-filled syringes (PFS), and IV bags, we aim to make a meaningful impact on patient care. Join our team to help push the boundaries of sterile manufacturing, achieving the highest standards in safety, quality, and operational efficiency. Job Location: Nivagen Pharmaceuticals Inc., Sacramento, CA 3900 Duckhorn Dr, Sacramento, CA 95834 About the Job: Title of the Position : Equipment Maintenance Technician – Aseptic & Packaging Systems Department: Maintenance/Engineering/Manufacturing Operations Reports to: Maintenance Supervisor/ Facilities & Engineering Ma

Job Details: Job Description: The Advanced Packaging Technology Development (APTD) Substrate and Wafer Assembly organization is responsible for developing cutting edge substrate packaging and wafer assembly solutions for our customers. As a member of the Substrate Technology and Manufacturing Group, you will play a critical role in enabling new manufacturing capacity across advanced packaging suppliers. In this position, you will lead substrate supplier development and qualification activities for advanced technologies such as high density FCBGA, EMIB-T and glass core substrate, ensuring suppliers achieve the required readiness to support growing customer demand. This includes driving technical enablement, managing readiness milestones, and collaborating closely with cross functional engineering teams and supplier partners. A combination of detail-oriented project management, strong technical risk assessment / problem solving skills, and effective supplier / stakeholder management will be needed to be successful. Please note: This role requires periodic evening meetings with suppliers in East Asia, as well as occasional travel to supplier sites to support essential program objectives. Key Responsibilities Define process integration roadmaps and establish manufacturing procedures to meet technology transfer milestones. Extract insights from structured and unstructured data, applying statistical analysis and coding techniques for yield improvement. Lead low yield analysis and corrective actions to address quality excursions in high-volume production environments. Drive continuous improvement initiatives to minimize defects and optimize process reliability. Assess quality and reliability risks for manufacturing material and process changes, ensuring sustained product performance. C

Job Details: Job Description: The Role and Impact We are seeking a Silicon Packaging Design Architect to join our team, where you will drive end-to-end package solutions for physical, electrical, and cost requirements. In this senior engineering role, you will collaborate with cross-functional teams to design, troubleshoot, and continuously improve packaging standards and processes, ensuring high-quality package output. Your contributions will directly impact the seamless transition of designs to production and enhance Intel's advanced packaging technologies. Business Group As part of Intel Corporation's dynamic and innovative ecosystem, this role resides within the Silicon Packaging Architecture team, focused on developing advanced packaging solutions that enable Intel's cutting-edge silicon technologies. The team plays a vital role in ensuring packaging, and 3D IC designs meet technical, mechanical, and reliability standards while supporting Intel's broader mission to drive world-changing advancements in technology. Key Responsibilities Translate product requirements into detailed package architecture specifications. Drive technology tradeoff decisions to ensure silicon packages conform to electrical, mechanical, thermal, and reliability standards. Collaborate with silicon, hardware, and package teams to deliver high-quality package solutions and overcome roadblocks. Oversee the end-to-end package development process, including design, procedures, and continuous improvements to quality standards. Troubleshoot packaging designs and resolve issues related to materials and processes, providing innovative and cost-effective solutions. Implement co-design strategies between silicon and board design teams to optimize product

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department overview The Advanced Packaging Technology Development (APTD) team at Micron leads the creation of cutting‑edge memory and storage solutions that power the AI era. We work hands-on with global R&D groups, suppliers, and manufacturing teams to turn breakthrough ideas into real, production-ready technologies. We thrive on innovation and collaboration! Job summary As a Principal Engineer within APTD, you will play a key role in driving innovation through strategic, industry‑informed leadership. Based at the Boise campus, you will shape advanced packaging technology roadmaps and investment priorities by applying deep technical expertise alongside rigorous cost and value analysis, enabling well‑balanced trade‑off decisions across performance, scalability, and total cost of ownership. Working in a highly collaborative, dynamic environment, you will influence solutions aligned with Micron’s business objectives, contributing directly to increased revenue, long‑term strategic success, and the development of leading‑edge packaging technologies. Responsibilities Deliver high-value, differentiated technology solutions by finding opportunities and driving technical innovation to provide business value. Collaborate continuously with internal and external partners to ensure seamless technology integ

Role Overview We are seeking a Senior Micro-Optics/Microlens Array Engineer to design, model, and validate microlens-array and wafer-level micro-optical components for high-density photonic packages. You will translate system-level optical requirements into manufacturable designs, build tolerance budgets, work with fabrication and packaging partners, and close the loop with measured data. Candidate note: We do not expect one person to match every item below. Strong candidates from micro-optics, optical packaging, semiconductor photonics, lithography/process integration, precision optics, or FDTD-Zemax co-design backgrounds are encouraged. What You Will Do Own micro-optical design: design microlens arrays and compact micro-optical components, including lens pitch, aperture, focal length, numerical aperture, sag, surface form, fill factor, array uniformity, substrate, material, and coating choices. Build connected optical models: use tools such as Zemax OpticStudio, Code V, FRED, LightTools, VirtualLab, Ansys/Lumerical, COMSOL, or equivalent; combine ray, physical-optics, diffraction, and statistical methods where appropriate. Bridge EM-scale and package-scale design: where useful, connect FDTD, FEM, EME, RCWA, or similar electromagnetic simulations to Zemax/Code V/physical-optics models so local optical-interface behavior is represented in system-level trade studies. Drive tolerancing and yield: develop sensitivity studies and tolerance budgets across fabrication, placement, package stack-up, adhesive, thermal, refractive-index, coating, and surface-form variation; use Monte Carlo and DOE methods to connect design choices to expected yield. Bring semiconductor process awareness: partner with process and supplier teams across lithography, grayscale/direct-write patterning, imprint, etch transfer, deposition, thin-film coatings, wafer-level metrology, design rules, and process-window trade-offs. Translate design intent: create vendor-ready specifications, optica

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Lead and drive global Product Integration initiatives to improve yield, quality, and benchmark performance across technology nodes and products. Centralize and synthesize project information (design requirements, test challenges, yield learning) from multiple global teams and drive execution to closure. Drive yield breakthroughs by understanding the end‑to‑end test flow , product design and operation, packaging interactions, and manufacturing processes while balancing yield vs. reliability requirements. Foster technical innovation by characterizing device failure modes using deep knowledge of device architecture, physics, packaging interaction, and available test/process knobs . Define and drive strategies to ensure Packaging Technology and Chip‑Package Interaction are developed and qualified ahead of product qualification . Lead cross‑functional and cross‑site taskforces (Product, Test, Yield, Design, Fab, Packaging, Quality, TD) to resolve yield and quality challenges in a timely manner. Promote network Best‑Known‑Method (BKM) development, standardization, and business process creation or re‑engineering to improve productivity and efficiency. Maintain strong working relationships with stakeholders in Fab, Technology Development, Product Engineering, Test Engineering, Quality, and Packaging teams . Communicate project status, risks, an

Job Title: Engineering Shift Supervisor Reports To: Chief Engineer Department / Function: Engineering Job Purpose / Summary • The Lead Shift Engineer is a multiskilled engineering professional responsible for leading, coordinating and supervising all engineering activities on their assigned shift within a fast paced FMCG environment. • They provide technical leadership to Shift Engineers, ensure safe and effective maintenance across all plant and packaging machinery, prioritise engineering workload, and act as the first point of escalation for technical issues during the shift. • The role drives engineering reliability, reduces downtime and ensures compliance with safety, food safety and legal requirements while role modelling engineering excellence. Other Information · The job holder is required to do all tasks considered relevant by their line manager · Responsible for Food Safety, Quality and Legality EQUAL OPPORTUNITIES: The Company strives to be an equal opportunities employer. This means that decisions concerning recruitment, promotion, dismissal or any other aspect of employment will be based on the needs of the business and not any assumptions based on sex, race, age, disability, gender reassignment, sexual orientation, married or civil partnership status, pregnancy or maternity, religion or belief. This is an important commitment which all employees are expected to share. Key Accountabilities Shift Leadership & People Responsibilities Day‑to‑day leadership of Shift Engineers, including task allocation, prioritisation and performance during the shift. Coordinate maintenance workload in real‑time based on breakdowns, production needs and planned tasks. Provide technical guidance, coaching and hands‑on support to engineers on shift. Lead shift handovers, ensuring clear communication of ongoing issues, completed work, risks and priorities. Conduct informal skills assessments and support the Engineering Manager with identifying training needs. Role model enginee

About Atomic Industries Atomic Industries is reinventing how the world makes things. From cars and aerospace systems to medical devices and packaging, most physical goods begin life in a mold or are shaped by a manufacturing tool. Producing these tools has always been slow, manual, and dependent on scarce expertise, taking weeks or months. We’re changing that. At our Detroit headquarters, we combine the industrial DNA of America’s manufacturing heartland with the speed, intelligence, and precision of Silicon Valley. Our AI-driven platform tackles the hardest problems in geometry, process planning, and fabrication, collapsing production timelines from months to days and soon, minutes. We don’t just build software; we run a fully operational factory where our technology produces production-grade tooling every week, enabling tight feedback loops and rapid iteration. Backed by top-tier investors, we’re restoring speed, flexibility, and capability to the American industrial base. Our mission is to make manufacturing as agile and scalable as the digital world, and in doing so, rebuild the infrastructure of the physical economy. About the Role As an Automation Engineer at Atomic, you’ll build the systems that connect our physical factory to our software platform. You’ll work across sensors, electronics, industrial controls, robotics, machine interfaces, data infrastructure, and simulation to make our equipment observable, programmable, and increasingly autonomous. This is not a traditional plant controls role focused on maintaining an installed base of PLCs. You’ll help define the architecture, standards, and tools through which Atomic’s machines, molds, robots, and production workflows operate as one integrated system. This role is ideal for a software-capable automation generalist who enjoys building real hardware, commissioning it on the factory floor, and owning systems from first prototype through reliable production use. What You’ll Do Design, build, and commission a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Roles & responsibilities can include but are not limited to: Define the global DL4 matrices (Turnaround time, overdue matrices, detection compliance, Statistical Bin Limits (SBL) reactions etc) Ensure all sites adhere to globally aligned DL4 workflows Drive global automation and AI enhancements (YIT, Auto-contain, auto-disposition, Smart Manufacturing & Artificial Intelligence (SMAI) assisted detection) Oversee universal alignment so DL4 signal signals behave the same across sites Monitor the Assembly and Test specifications Improvements and optimization in existing DL4 systems via automation systems Spec limits (Analog values and limits, SBL Bins, Product level ESD) Test coverage/DL4 improvements (based on lessons learnt, Material review boards and Fail Mode Registers(FMR)) Network standardization (Dispositions/problems) FMR, Failure analysis, Failure analysis modelling and Defense Line Correlations Test program review and release Collaborate with cross-functional teams from Product Engineering, Media Health, Global Quality, Advanced Packaging Technology Development and Test Systems Engineering and drive projects to further enhance defense line 4 capabilities Mandatory Requirements: Strong understanding of semiconductor device physics Experience in device modelling and simulation using TCAD (Silvaco, Sentaurus, etc), as well as compact modelling. P

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Roles & responsibilities can include but are not limited to: Define the global Defense Line (DL) matrices (Turnaround time, overdue matrices, detection compliance, Statistical Bin Limits (SBL) reactions etc) Ensure all sites adhere to globally aligned DL workflows Drive global automation and AI enhancements (YIT, Auto-contain, auto-disposition, Smart Manufacturing & Artificial Intelligence (SMAI) assisted detection) Oversee universal alignment for DL signals behave the same across sites Monitor the Assembly and Test specifications Improvements and optimization in existing DL systems via automation systems Spec limits (Analog values and limits, SBL Bins, Product level ESD) Test coverage/DL improvements (based on lessons learnt, Material review boards and Fail Mode Registers(FMR)) Network standardization (Dispositions/problems) FMR, Failure analysis, Failure analysis modelling and Defense Line Correlations Test program review and release Collaborate with cross-functional teams from Product Engineering, Media Health, Global Quality, Advanced Packaging Technology Development and Test Systems Engineering and drive projects to further enhance defense line 4 capabilities Mandatory Requirements: Strong understanding of semiconductor device physics Experience in device modelling and simulation using TCAD (Silvaco, Sentaurus, etc), as well as compact modelling. <

About the Role Rubrik is seeking an innovative and strategic Services Engineering Leader to lead the lifecycle development of new Professional Services offerings. In this key leadership role, you will be responsible for creating, packaging, and launching high-value services that accelerate our customers' time-to-value for the entire Rubrik product portfolio. As a core member of the Global Professional Services Leadership Team , you will bridge the gap between product strategy and field execution. You will work extensively across Product Management, Product Engineering, Global Practice Leaders, Consulting Leadership, and PS Delivery teams to ensure our services offerings evolve in lockstep with our technology roadmap. Reports To: Vice President, Global Professional Services Key Responsibilities 1. Service Productization & Portfolio Strategy Design & Launch Offerings: Lead the end-to-end development of standardized, scalable Professional Services offerings, playbooks, and delivery methodologies that drive rapid customer adoption and time-to-value. Product & Engineering Alignment: Partner closely with Product Management and Product Engineering teams during early-stage product releases to build corresponding service packages, deployment frameworks, and best practices. Service Lifecycle Management: Continuously evaluate, refresh, and optimize the existing PS portfolio based on field feedback, customer outcomes, utilization data, and emerging market trends. 2. Strategic Leadership & Cross-Functional Collaboration PS Leadership Contribution: Serve as an active member of the Global PS Leadership Team, contributing to overall services strategy, operational strategy, and long-term business growth. Practice & Delivery Enablement: Collaborate with Global Practice Leaders and Field Delivery teams to ensure new services are operationally viable, efficiently packaged, and backed by robust delivery artifacts. Go-To-Market (GTM) Integration: Work alongside

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, our Technology Development team sits at the center of innovation. We build advanced modeling and AI solutions that shape how memory and storage technologies are designed, built, and scaled. Working at the intersection of physics, data, and engineering, we turn complex problems into practical breakthroughs that matter! This role is critical to how we accelerate semiconductor technology development using advanced AI and physics-based modeling. You will lead the design and deployment of agentic and LLM-powered solutions that directly influence process technology, packaging, and early manufacturing decisions. If you enjoy driving hard problems end to end and collaborating across hardware and software teams, this role offers real impact and visibility. Note: We are hiring for more than one role spanning Senior/Staff/Principal/Technical Staff Engineer. Responsibilities: Design and deploy physics-based, ML, and LLM-powered modeling solutions for semiconductor process, package, and manufacturing workflows Architect agentic AI systems that integrate with modeling tools, design automation environments, and fab/test platforms to enable digital twin development Define and promote best known methods for deploying LLMs and agentic systems reliably in production environments Evaluate and improve model performance using methods such as structured benchmarking, prompt tuning