Pde Mct Governance Senior Engineer Jobs

PDE MRDA PROCSS ENGINEER — Taichung - MTB, Taiwan. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The general responsibilities of the position are the following: AI Technologies Basic understanding of AI concepts and emerging technologies. Familiarity with generative AI tools (e.g., Copilot) is a plus. Interest in leveraging AI to improve productivity, automation, and decision-making. NAND Probe/ Back End Testing Improve Probe testing coverage, quality and on NAND products Own the probe test flow, review and sign off probe test program release to ensure quality control Utilize state-of-art in house engineering equipment to support product characterization and electrical failure analysis Develop creative testing algorithms to improve testing efficiency New Generation Product Development Responsible for new product startup and yield improvement Support design verification and in-depth circuit of new products using CAD tools and Verilog simulations Work with the wafer fab process/integration group to address process-related defects affecting product yield Identify design marginalities and recommend design fix for circuit-related problems Functional and Design Validation Design novel test algorithms and develop test programs for validating NAND features and commands Use high-speed tester hardware to perform validation of new NAND devices Analysis of failures generated from the evaluations Automation of

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Roles & responsibilities can include but are not limited to: Define the global DL4 matrices (Turnaround time, overdue matrices, detection compliance, Statistical Bin Limits (SBL) reactions etc) Ensure all sites adhere to globally aligned DL4 workflows Drive global automation and AI enhancements (YIT, Auto-contain, auto-disposition, Smart Manufacturing & Artificial Intelligence (SMAI) assisted detection) Oversee universal alignment so DL4 signal signals behave the same across sites Monitor the Assembly and Test specifications Improvements and optimization in existing DL4 systems via automation systems Spec limits (Analog values and limits, SBL Bins, Product level ESD) Test coverage/DL4 improvements (based on lessons learnt, Material review boards and Fail Mode Registers(FMR)) Network standardization (Dispositions/problems) FMR, Failure analysis, Failure analysis modelling and Defense Line Correlations Test program review and release Collaborate with cross-functional teams from Product Engineering, Media Health, Global Quality, Advanced Packaging Technology Development and Test Systems Engineering and drive projects to further enhance defense line 4 capabilities Mandatory Requirements: Strong understanding of semiconductor device physics Experience or know-how in device modelling and simulation using TCAD (Silvaco, Sentaurus, etc), as well as compact modellin

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description The MSH PDE Process Integration (PI) Manager leads a team of Process Integration engineers responsible for the successful execution of High Bandwidth Memory (HBM) New Product Introduction (NPI) from early development through High Volume Manufacturing (HVM) . This role combines people leadership, technical oversight, and cross‑functional execution , ensuring PI readiness, yield ramp, and risk mitigation across wafer fabrication, assembly, and test. The manager is accountable for delivering NPI commitments while developing a strong, scalable PI organization. Job Responsibilities People Leadership & Talent Development Lead, coach, and develop a team of MSH PDE PI engineers across multiple experience levels Set clear expectations, goals, and priorities aligned to NPI and business objectives Provide regular feedback, performance evaluations, and career development guidance Build organizational capability through hiring, onboarding, mentoring, and succession planning Foster a culture of accountability, collaboration, and technical excellence HBM NPI Execution & Delivery Own PI execution for HBM NPI programs, en

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Key Responsibilities Strategic Programs, Cost Savings & Execution Lead and enable cross-functional programs that deliver measurable cost savings, productivity improvement, and priority business outcomes. Establish disciplined governance for savings opportunities, program milestones, ownership, risks, dependencies, and closure plans to ensure strong leadership visibility and accountability. Translate strategic priorities into executable workplans, measurable deliverables, and timely decisions across technical, operational, and business stakeholders. Supplier Engagement, Scale & Capacity Readiness Support strategic supplier engagement by coordinating executive-level forums, preparing agendas and materials, tracking commitments, and ensuring timely follow-through across internal and external stakeholders. Coordinate scale and capacity readiness programs by consolidating inputs, identifying execution gaps, aligning stakeholders, and escalating risks or decisions as required. Prepare concise, leadership-ready updates on supplier engagement progress, capacity readiness, dependenci

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Roles & responsibilities can include but are not limited to: Define the global DL4 matrices (Turnaround time, overdue matrices, detection compliance, Statistical Bin Limits (SBL) reactions etc) Ensure all sites adhere to globally aligned DL4 workflows Drive global automation and AI enhancements (YIT, Auto-contain, auto-disposition, Smart Manufacturing & Artificial Intelligence (SMAI) assisted detection) Oversee universal alignment so DL4 signal signals behave the same across sites Monitor the Assembly and Test specifications Improvements and optimization in existing DL4 systems via automation systems Spec limits (Analog values and limits, SBL Bins, Product level ESD) Test coverage/DL4 improvements (based on lessons learnt, Material review boards and Fail Mode Registers(FMR)) Network standardization (Dispositions/problems) FMR, Failure analysis, Failure analysis modelling and Defense Line Correlations Test program review and release Collaborate with cross-functional teams from Product Engineering, Media Health, Global Quality, Advanced Packaging Technology Development and Test Systems Engineering and drive projects to further enhance defense line 4 capabilities Mandatory Requirements: Strong understanding of semiconductor device physics Experience in device modelling and simulation using TCAD (Silvaco, Sentaurus, etc), as well as compact modelling. P

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Roles & responsibilities can include but are not limited to: Define the global Defense Line (DL) matrices (Turnaround time, overdue matrices, detection compliance, Statistical Bin Limits (SBL) reactions etc) Ensure all sites adhere to globally aligned DL workflows Drive global automation and AI enhancements (YIT, Auto-contain, auto-disposition, Smart Manufacturing & Artificial Intelligence (SMAI) assisted detection) Oversee universal alignment for DL signals behave the same across sites Monitor the Assembly and Test specifications Improvements and optimization in existing DL systems via automation systems Spec limits (Analog values and limits, SBL Bins, Product level ESD) Test coverage/DL improvements (based on lessons learnt, Material review boards and Fail Mode Registers(FMR)) Network standardization (Dispositions/problems) FMR, Failure analysis, Failure analysis modelling and Defense Line Correlations Test program review and release Collaborate with cross-functional teams from Product Engineering, Media Health, Global Quality, Advanced Packaging Technology Development and Test Systems Engineering and drive projects to further enhance defense line 4 capabilities Mandatory Requirements: Strong understanding of semiconductor device physics Experience in device modelling and simulation using TCAD (Silvaco, Sentaurus, etc), as well as compact modelling. <

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Integrate AI-assisted tool and insights into daily work to improve efficiency, quality or effectiveness. Contribute to a culture of continuous improvement by identifying , testing and sharing AI-enablement enhancement within one scope of work. Driving New Product Introduction process through NPI Phase Gate Review. Coordinating new product start- up to achieve first pass qualification. Understand new product start-up datelines, product applications and customer requirements; and communicate this information to the new product start-up team Working with process / equipment / manufacturing / planning area owners to bring new product and packag

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities Own package architecture and execution from feasibility through tape-out, qualification, and production readiness, ensuring design intent is translated into manufacturable, reliable, and scalable solutions. Serve as the technical authority for complex package issues, leading cross-functional reviews, trade-off decisions, and risk closure across product, silicon, technology, assembly, quality, supplier, and OSAT teams. Balance performance, reliability, manufacturability, cost, quality, and schedule to deliver production-ready solutions while mentoring engineers through difficult technical decisions. Advance design rules, methodologies, automation workflows, and technology roadmaps for future products. Represent the packaging team in Silicon–package–board co-design by integrating floorplan, interface, interconnect, power, signal, thermal, and mechanical requirements, and resolve cost and manufacturing trade-offs to achieve a balanced package solution. Ability to apply baseline digital fluency and role-approp

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a PDE MRDA KEG Engineer / Senior Engineer , you will be responsible for developing, qualifying, deploying, and sustaining advanced defect inspection and metrology solutions that support New Product Introduction (NPI), HBM technology ramps, and High Volume Manufacturing (HVM). You will drive inspection capability readiness, equipment performance improvement, and defectivity reduction through close collaboration with cross functional team. The role requires strong expertise in semiconductor manufacturing, defect inspection technologies, data analytics, equipment qualification, and cross-functional problem solving to enable industry-leading process control and yield performance. Inspection Technology & Equipment Ownership Manage advanced inspection and metrology platforms throughout package development and manufacturing. Develop technology roadmaps and capability strategies to meet future packaging requirements. Drive equipment lifecycle management, capacity planning, and technology insertion activities. Equipment Qualification & Deployment Lead tool installation, qualification (TIQ), release, and production readiness activities. Establish equipment acceptance criteria, qualification methodologies, and deployment pla

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Overview As a Staff/Senior Process Development Engineer within PDE-CEM, you will leverage advanced semiconductor process characterization, failure analysis, yield analytics, and process integration expertise to accelerate product and technology development. The role focuses on developing robust assembly processes, improving yield and reliability, supporting New Product Introduction (NPI), and utilizing data-driven methodologies to optimize manufacturing performance. The ideal candidate combines strong semiconductor physics knowledge, advanced characterization skills, yield improvement experience, and cross-functional leadership capability to drive continuous process innovation and manufacturing excellence. Key Responsibilities Process Development & Characterization Develop and optimize Process of Record (POR) for assembly and packaging technologies. Establish process windows, process capability targets, and characterization strategies. Apply statistical methodologies including DOE, SPC, JMP, and Six Sigma to characterize and optimize manufacturing processes. Drive early process learning through advanced characterization and failure analysis techniques. Yield Improvement & Problem Solving</

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The general responsibilities of the position are the following: HBM development Improve Probe testing coverage, quality and on HBM products Own the probe test flow, review and sign off probe test program release to ensure quality control Utilize state-of-art in house engineering equipment to support product characterization and electrical failure analysis Develop creative testing algorithms to improve testing efficiency New Generation Product Development Responsible for new product startup and yield improvement Support design verification and in-depth circuit of new products using CAD tools and Verilog simulations Work with the wafer fab process/integration group to address process-related defects affecting product yield Identify design marginalities and recommend design fix for circuit-related problems Functional and Design Validation Design novel test algorithms and develop test programs for validating HBM features and commands Use high-speed tester hardware to perform validation of new HBM devices Analysis of failures generated from the evaluations Automation of program development and work processes using scripting Product Yield Enhancement Identify causes of low yield through systematic analysis Work closely with various engineering groups in resolving process/defects related issues Perform electri

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As an PDE Yield Enhancement (YE) Engineer within Package Development Engineering (PDE), you will be responsible for yield monitoring, excursion management, and yield stabilization during High Bandwidth Memory (HBM) New Product Introduction (NPI) . This role is critical to ensuring robust yield performance from first silicon through NPI ramp and early HVM , working closely with Process Integration (PI), MRDA, Process Engineering (PE), Assembly/Test Manufacturing, and Quality teams. You will act as a hands‑on yield owner during NPI builds, driving fast learning cycles, early risk detection, and disciplined yield recovery. Job Responsibilities: Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness,exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. Yield Loss Accounted For Account for HBM NPI builds across Post Wafer Finishing (PWF), Assembly, and

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The PDE Process Integration (PI) Engineer is responsible for driving process integration excellence for High Bandwidth (HBM) products during New Product Introduction (NPI) . This role ensures robust process readiness, yield ramp, and cross‑module integration across Post Wafer Finishing PWF, assembly, and test , enabling successful execution of HBM technology roadmaps. The PI Engineer works cross‑functionally with Fab, Assembly, Test, Yield, Quality, and central engineering teams to identify risks early, resolve complex integration issues, and deliver NPI milestones on time. Job Responsibilities Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. NPI Execution & Support Execute assigned HBM NPI PI tasks following defined procedures and phase‑gate requirements Support NPI builds through lot tracking, data collection, and

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. At Micron, we believe in encouraging a culture of innovation and excellence. The PDE Process Integration (PI) Senior Manager role offers an outstanding chance to lead a distributed team in defining, standardizing, and driving High Bandwidth Memory (HBM) New Product Introduction (NPI) success across several locations. This position blends strategic leadership, scaling of operations, and coordination across sites. It aims to ensure consistent PI readiness, faster yield ramp, and strong risk management from development through High Volume Manufacturing (HVM). Job Responsibilities Define and drive PI strategy, standards, and guidelines across HBM programs. Coordinate PI execution across multiple HBM NPI programs, ensuring delivery against network-level achievements and ramp targets. Ensure robust risk identification, early detection mechanisms, and mitigation strategies. Serve as the central PI leader collaborating with various engineering and manufacturing organizations. Champion the adoption of AI-enabled tools for yield analysis and risk prediction. Organizational Leadership & Talent Strategy Guide and grow a group of PI managers and senior engineers spanning several locations or departments.