Physical Therapist Jobs

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We are currently looking for motivated individuals to join Micron Technology Inc. Central Engineering (CE) - Product Yield Enhancement (PYE) Engineering Team. As CE PYE Failure Analysis (FA) Engineer for Micron Technology, Inc., you will be responsible for providing full fault isolation and failure analysis support for qualifications, customer returns, new device introduction, and test failures. You will become the subject matter expert on fault isolation and physical failure analysis methods. As the CE PYE FA Engineer, you will be responsible for understanding all relevant methodologies to isolate electrical failures by working closely with Product Engineering Teams. You will also have a thorough understanding of the product architecture, process flow, and test sequence to work with Process Integration, Product, Test, and Quality Reliability Assurance Engineering groups ensuring physical defects are root-caused and classified. Job Description: Responsibilities: • Perform sophisticated electrical device characterization to determine electrical fail mechanisms. • Operate fault isolation equipment to accurately narrow down failure defect locations. • Conduct physical failure analysis to identify and classify physical d

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We are currently looking for motivated individuals to join Micron Technology Inc. Central Engineering (CE) - Product Yield Enhancement (PYE) Engineering Team. As CE PYE Failure Analysis (FA) Engineer for Micron Technology, Inc., you will be responsible for providing full fault isolation and failure analysis support for qualifications, customer returns, new device introduction, and test failures. You will become the subject matter expert on fault isolation and physical failure analysis methods. As the CE PYE FA Engineer, you will be responsible for understanding all relevant methodologies to isolate electrical failures by working closely with Product Engineering Teams. You will also have a thorough understanding of the product architecture, process flow, and test sequence to work with Process Integration, Product, Test, and Quality Reliability Assurance Engineering groups ensuring physical defects are root-caused and classified. Job Description: Responsibilities: • Perform sophisticated electrical device characterization to determine electrical fail mechanisms. • Operate fault isolation equipment to accurately narrow down failure defect locations. • Conduct physical failure analysis to identify and classify physical d

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We are currently looking for motivated individuals to join Micron Technology Inc. Central Engineering (CE) - Product Yield Enhancement (PYE) Engineering Team. As CE PYE Failure Analysis (FA) Engineer for Micron Technology, Inc., you will be responsible for providing full fault isolation and failure analysis support for qualifications, customer returns, new device introduction, and test failures. You will become the subject matter expert on fault isolation and physical failure analysis methods. As the CE PYE FA Engineer, you will be responsible for understanding all relevant methodologies to isolate electrical failures by working closely with Product Engineering Teams. You will also have a thorough understanding of the product architecture, process flow, and test sequence to work with Process Integration, Product, Test, and Quality Reliability Assurance Engineering groups ensuring physical defects are root-caused and classified. Job Description: Responsibilities: • Perform sophisticated electrical device characterization to determine electrical fail mechanisms. • Operate fault isolation equipment to accurately narrow down failure defect locations. • Conduct physical failure analysis to identify and classify physical d

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tape-out. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. Key Responsibilities Own physical implementation for SoC blocks and/or top-level, including floor-planning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust physical integration and timing/power integrity. Perform and/or coordinate physical signoff, including DRC/LVS, IR drop/EM, and timing signoff, addressing violations efficiently. Partner with DFT teams to ensure scan/MBIST requirements are physically realizable and do not compromise PPA or schedule. Work with packaging, assembly, test, probe, and manufacturing collaborators to ensure builds meet manufacturability and quality requirements. Support tape-out execution (checklists, ECO flows, signoff r

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We are currently looking for motivated individuals to join Micron Technology Inc. Central Engineering (CE) - Product Yield Enhancement (PYE) Engineering Team. As CE PYE Failure Analysis (FA) Engineer for Micron Technology, Inc., you will be responsible for providing full fault isolation and failure analysis support for qualifications, customer returns, new device introduction, and test failures. You will become a domain expert in fault isolation and physical failure analysis methods. As the CE PYE FA Engineer, you will be responsible for understanding all relevant methodologies to isolate electrical failures by working closely with Product Engineering Teams. You will also have a thorough understanding of the product architecture, process flow, and test sequence to work with Process Integration, Product, Test, and Quality Reliability Assurance Engineering groups ensuring physical defects are root-caused and classified. Job Description: Responsibilities: • Perform sophisticated electrical device characterization to determine electrical fail mechanisms. • Operate fault isolation equipment to accurately narrow down failure defect locations. • Conduct physical failure analysis to identify and classify physical defects.</p

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Staff/Senior Staff Physical Design Floorplan & PDN Lead Experience: 10–14 Years Location: Bangalore/2 days to work Department: RTL-to-GDSII / Physical Implementation Role Overview We are seeking a high-caliber Staff or Senior Staff Physical Design Engineer with a specialized mastery of Floorplanning and Power Delivery Network (PDN) design. You won’t just be pushing buttons; you will be the architectural bridge between RTL/Systems and the final GDSII. This role requires a visionary who understands how a single floorplan decision ripples through the entire PPA (Power, Performance, Area) spectrum. As a technical lead, you will own the chip-top floorplan for complex, large-scale SoCs or Sub-chips, driving strategies that balance aggressive performance targets with robust power integrity. Key Responsibilities Architectural Floorplanning: Lead chip-level floorplanning, including macro placement, pin assignment, and partition definition for multi-million gate designs. Strategic PDN Design: Architect and implement complex Power Delivery Networks. You will define the metal stack usage and grid density to support high-performance cores while minimizing routing congestion. EMIR Mastery: Perform exhaustive IR-drop (Static/Dynamic) and Electromigration (EM) analysis. You must be able to diagnose root causes and propose ar

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Job Title: Staff/ Senior Staff Physical Design Engineer (Technical Lead) Experience: Staff 8-10 years Senior Staff 11-13 years Location: Bangalore Hybrid/Remote or Remote in India The Role We are seeking a high-impact Staff/ Senior Staff Physical Design Engineer to serve as a Technical Lead for our next-generation silicon products. This is a "player-coach" role designed for a versatile expert who is equally comfortable architecting a convergence strategy as they are mentoring a small team of engineers. You will own the physical delivery of a major sub-chip or complex block, pushing the absolute limits of PPA (Power, Performance, Area) . As a Staff/Senior Staff lead, you are expected to be the "anchor" of the project—assertive in your decision-making, highly analytical in your debugging, and adept at managing stakeholders to ensure we hit our tape-out milestones without compromise. Key Responsibilities Technical Leadership: Lead a small team of PD engineers, providing technical direction, workload management, and architectural oversight for a sub-chip or partition. SOC clocking , FEV/VCLP specialized skills are preferred. Complex Block/Sub-chip Ownership: Take personal hands-on ownership of the most critical, high-congestion, or timing-critical blocks in the desi

Intern - YE Physical Failure Analysis Engineer — Boise, ID - Main Site. Apply via Workday.

Staff Engineer - ASIC Physical Design — Bengaluru, India. Apply via Workday.

Lead Substation Physical Engineer — Atlanta, GA. Apply via Workday.

Yield Enhancement Engineer - Physical Failure Analysis — Boise, ID - Main Site. Apply via Workday.

Senior SOC Physical Design Engineer, HBM — Richardson, TX. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. About our Team: Micron’s Industrial and Physical AI team is driving the transformation of semiconductor manufacturing through Autonomous Operations, AI, robotics, and digital twin technologies! We develop and deploy innovative solutions across Micron’s global fabrication and assembly/test facilities, enabling smarter, safer, and more efficient operations at scale. Position Overview: We are seeking a hands-on Full-Stack AI Engineer to design, build, and deploy production-grade AI applications that support Micron's Autonomous Operations initiatives. This role owns the end-to-end development lifecycle, from data pipelines and AI models to APIs, web applications, digital twin integrations, and cloud/edge deployments, delivering impactful solutions for engineers, operators, and business leaders worldwide. Responsibilities: Design, architect, and deliver end-to-end AI products, including data ingestion pipelines, feature engineering, model training/inference, APIs, user interfaces, and application monitoring. Build and maintain modern front-end applications using React, Angular, or Streamlit, supported by backend services in Python and FastAPI. Develop scalable integrations between manufacturing systems, robotics platforms, AMRs, sensor networks, and enterprise applications to enable intelligent factory operations. Design and implement digital twin environments using platforms such as NVIDIA Omniverse, Gazebo, or Unity Robotics Hub to support simulation, validation, and o

Principal CPU Architect - High-Performance and Physical Design — 3 Locations. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We are currently looking for motivated individuals to join Micron Technology Inc. Central Engineering (CE) - Product Yield Enhancement (PYE) Engineering Team. As CE PYE Failure Analysis (FA) Engineer for Micron Technology, Inc., you will be responsible for providing full fault isolation and failure analysis support for qualifications, customer returns, new device introduction, and test failures. You will become the subject matter expert on fault isolation and physical failure analysis methods. As the CE PYE FA Engineer, you will be responsible for understanding all relevant methodologies to isolate electrical failures by working closely with Product Engineering Teams. You will also have a thorough understanding of the product architecture, process flow, and test sequence to work with Process Integration, Product, Test, and Quality Reliability Assurance Engineering groups ensuring physical defects are root-caused and classified. Responsibilities: Perform sophisticated electrical device characterization to determine electrical fail mechanisms. Operate fault isolation equipment to accurately narrow down failure defect locations. Conduct physical failure analysis to identify and classify physical defects. Establish and hypothesize potential electrical