Principal Hbm Design Architect Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Lead and drive global Product Integration initiatives to improve yield, quality, and benchmark performance across technology nodes and products. Centralize and synthesize project information (design requirements, test challenges, yield learning) from multiple global teams and drive execution to closure. Drive yield breakthroughs by understanding the end‑to‑end test flow , product design and operation, packaging interactions, and manufacturing processes while balancing yield vs. reliability requirements. Foster technical innovation by characterizing device failure modes using deep knowledge of device architecture, physics, packaging interaction, and available test/process knobs . Define and drive strategies to ensure Packaging Technology and Chip‑Package Interaction are developed and qualified ahead of product qualification . Lead cross‑functional and cross‑site taskforces (Product, Test, Yield, Design, Fab, Packaging, Quality, TD) to resolve yield and quality challenges in a timely manner. Promote network Best‑Known‑Method (BKM) development, standardization, and business process creation or re‑engineering to improve productivity and efficiency. Maintain strong working relationships with stakeholders in Fab, Technology Development, Product Engineering, Test Engineering, Quality, and Packaging teams . Communicate project status, risks, an

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Micron Technology’s vision is to transform how the world uses information to enrich life and our commitment to people, innovation, tenacity, collaboration, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community. As a Central Team Alignment Engineer at Micron Technology, Inc., you will be responsible for driving improvements to manufacturing capability, delivering industry benchmark methods at the lowest cost, and managing the execution of global standards across process areas. You will execute to this by focusing on Micron’s 4 pillars, and ensure priorities are aligned to Micron business plan and/or Strategic Objective requirements across manufacturing sites. Your objective is to leverage global internal and external resources to drive network process and equipment alignment to achieve world-class manufacturing performance. Examples include leveraging suppliers to achieve benchmark manufacturing performance, discovery and implementation of equipment and process best known methods (BKM), equipment utilization optimization, cash cost optimization, and continuous improvement project prioritization and execution globall

Frontend Organizations Central Team, Staff / Principal Photo Scanner Engineer — Fab 10A, Singapore. Apply via Workday.

L’équipe Livraison de programmes et gouvernance (Program Delivery & Governance) constitue la capacité de livraison et d’exploitation de l’organisation Produit et Technologie de Veriforce. Cette fonction est responsable de la livraison stratégique des programmes à l’échelle de l’entreprise, de la santé des livraisons et de la production de rapports, de la discipline de planification, des normes de gouvernance ainsi que des opérations de leadership et de la production d'informations stratégiques destinées aux dirigeants. L’équipe fonctionne comme une seule entité, avec un parcours de carrière commun et un modèle de collaboration permettant la couverture croisée des activités. Veriforce exerce ses activités aux États-Unis, au Canada, au Royaume-Uni, en Afrique du Sud, en Belgique ainsi que dans plusieurs autres marchés. Cette fonction soutient l’ensemble de ces régions et déploie des ressources dédiées lorsqu'un soutien régional spécifique est requis. Anglais de niveau avancé: Cette exigence est requise puisque dans le cadre de cette fonction, vous aurez à intervenir auprès des clients, partenaires et/ou nos filiales internationaux sur une base récurrente tant à l’oral qu’à l’écrit. Dans le présent document, le genre masculin est utilisé dans le seul but d'alléger le texte Retraites stratégiques de l'équipe de direction (Canada SLT Offsites) Les retraites de l'équipe de direction constituent le principal mécanisme d'alignement stratégique de la division. Il ne s'agit pas d'organiser un événement, mais bien de piloter le contenu stratégique, les décisions qui doivent être prises et les résultats attendus. Vous serez responsable de : Assurer la planification et la coordination complètes des retraites de l'équipe de direction canadienne, notamment la conception des ordres du jour, la préparation des documents préalables et la documentation des résultats. Élaborer et maintenir le calendrier annuel des retraites en veillant à ce que chacune soutienne les priorités stratégiq

OCT PH Mfg. Alignment (MA) Engineer/Sr Engineer/Principal Engineer — Boise, ID - Main Site. Apply via Workday.

Wet Process, CMP and Bond MDE Principal Lead Engineer — Boise, ID - Main Site. Apply via Workday.

Front End Central Product Integration Engineer – Test & Product Yield Integration (Senior / Staff / Principal) — Fab 10A, Singapore. Apply via Workday.

Front End Central Product Integration Engineer – Test & Product Yield Integration (Senior / Staff / Principal) — Boise, ID - ID1. Apply via Workday.

OCT DE Mfg. Alignment (MA) Sr Engineer/Principal Engineer — Fab 10A, Singapore. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Regional Governance, Risk, Compliance (GRC) Principal, you will serve as the senior Governance, Risk, Compliance, and Cyber Resilience leader for Japan, acting as the primary liaison between Micron's global GRC organization and regional business operations. This role is responsible for driving adoption of enterprise governance, cybersecurity, risk management, compliance, audit, resilience, and regulatory programs across Japan while ensuring alignment with Micron's strategic objectives, regulatory obligations, customer requirements, and evolving threat landscape. You will partner closely with regional business leaders, site leadership, Engineering, IT, Product Security, Physical Security, Legal, Privacy, HR, Internal Audit, BISOs, external auditors, regulators, customers, and government stakeholders to assess risks, coordinate compliance activities, facilitate audits, manage remediation efforts, and strengthen organizational resilience. This role serves as the voice of Japan within the global GRC organization and ensures local regulatory requirements, cultural considerations, customer expectations, and business priorities are effectively represented in enterprise governance decisions. The Regional GRC Principal will also champion AI-enabled governance and risk management capabilities, helping scale assessments, evidence management, risk monitoring, regulatory analysis, and compliance oversight while improving efficiency and consistency across the region. POSITION QUALIFICATIONS <p

ASIC/FPGA Design and Verification Engineer - (Lead, Senior, or Principal) — USA - Albuquerque, NM. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our team develops the innovations that power AI, mobile, and computing platforms around the world. Our DRAM Engineering team brings together experts across design, verification, manufacturing, and product development to solve complex technical challenges and deliver advanced memory solutions. We are passionate about innovation, collaboration, and building technology that enables the next generation of computing. As a Semiconductor Design Engineer, you will help develop advanced DRAM and emerging memory products from concept through silicon validation. This role offers opportunities to contribute across circuit design, simulation, verification, and optimization while working closely with global engineering teams. Depending on experience, you may also lead technical projects, mentor engineers, and influence future memory design strategies. Responsibilities: Design, simulate, and optimize digital, analog, and mixed-signal circuits for DRAM and emerging memory products. Translate product requirements into circuit solutions and validate performance across operating conditions. Perform circuit verification, silicon correlation, debug, and tape-out support activities. Collaborate with design, verification, layout, CAD, product, and process teams to improve product quality and manufacturability. Contribute to design automation, AI-assisted workflows, technical reviews, and engineering protocols. Minimum Qualifications: <

We are seeking a mission-driven Developer Relations Manager focused on Foundational AI Research to engage leading academic labs advancing the next generation of AI models, systems, and methods. In this role, you will work directly with top researchers building frontier AI systems, including large language models, multimodal models, reasoning systems, training methods, inference systems, model serving, and scalable AI infrastructure. You will help researchers adopt NVIDIA’s AI and accelerated computing platforms to push the boundaries of model performance, efficiency, and scale. The ideal candidate brings deep technical credibility in foundational AI, strong research engagement experience, and hands-on expertise in either AI inference research or AI training research. What you'll be doing: Serve as a trusted technical advisor to leading academic AI labs working on foundation models, LLMs, multimodal AI, reasoning, training, inference, and AI systems. Identify high-impact research workloads where NVIDIA software, systems, and accelerated computing platforms can advance model performance, scale, and efficiency. Engage principal investigators, postdocs, graduate researchers, and lab leadership to understand research goals, technical blockers, infrastructure needs, and collaboration opportunities. Track frontier AI research across papers, benchmarks, open-source projects, and academic labs to identify emerging trends and future platform opportunities. Partner with Research Account Managers, Solution Architects, Product, Engineering, and Business Development teams to support researcher adoption and long-term engagement. Represent researcher needs internally by translating academic feedback into actionable insights for product roadmaps, developer programs, education, and platform strategy. Support NVIDIA participation in major AI, ML, and systems research venues through technical content,

At Dscout, we’re building the most flexible and powerful UX research platform on the market—trusted by the world’s top brands in finance (JP Morgan Chase, Intuit, Charles Schwab, PayPal), healthcare (Aya, Headspace), consumer goods (Keen, Verizon, Target, Northface), and tech (Google, Amazon, Facebook, Meta, Spotify, AirBnB). Our tools help teams deeply understand the humans behind their products, so they can build better ones. We are expanding our smart and driven team and would love for you to join us. Our Platform: Our mobile apps are Swift and Kotlin. Our frontend is built with React. Our backend uses Elixir and increasingly more and more Python. GenAI has significantly impacted our system architecture, requiring us to adapt and evolve. We are in the midst of a shift from existing products augmented with AI to a full AI-first platform. You Are: A Mobile Principal Software Engineer who will lead our mobile team and evolve it to meet the shifting demand of a full AI-first platform — on a timeline measured in weeks, not quarters. You're deeply hands-on with AI coding agents, and you've used them to ship serious work, not just autocomplete. You're as comfortable architecting a thin mobile client backed by a powerful API as you are dropping into our Python backend (with AI assist) to add what mobile needs. You'll shape our participant experience across mobile with heavy influence on the web too. You're deeply product focused, energized by solving business problems, not just writing code. You ask "why" before "how," and you partner with Product and Design as a peer — shaping problems, not just taking specs. You know when to ship a scrappy prototype to test an assumption versus when to invest in a foundation built to last, and you can explain that call to a PM or designer. You can hold multiple projects in your head at once, spotting where they'll collide, depend on each other, or share a chance for reuse. You bring Principal/Staff-level scope as a product enginee

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a highly skilled and experienced Engineer to lead post-silicon power characterization and correlation activities for cutting-edge semiconductor products. In this role, you will be responsible for developing and executing detailed power measurement strategies on silicon, correlating results with pre-silicon models, and driving improvements across power architecture, design, and modeling methodologies. You will serve as a key technical leader, interfacing across design, architecture, validation, and systems teams to ensure silicon meets power and performance specifications under all operating conditions. This role is hybrid, based out of Toronto, ON or Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are A Principal-level engineer with 8+ years in silicon power analysis and characterization, and a Master’s or PhD in EE, CE, or related field. Deep understanding of digital and mixed-signal power domains, including DVFS, leakage vs. dynamic power, and power gating. Highly proficient in lab-based power measurement using oscilloscopes, current probes, power analyzers, and SMUs, plus Python/Perl/MATLAB